From 2cb1f1ae478643944cfa67707c3bbef2662b9b57 Mon Sep 17 00:00:00 2001 From: Matthias Date: Sun, 21 Apr 2024 13:21:00 +0200 Subject: [PATCH 1/4] Be more restrictive about code lints I've added a bunch of new directives for clippy and fixed the highlighted warnings, which got triggered in the process. Also updated the dependencies to their latest versions. Furthermore, I've added the `log::` prefix to debug output to make the use of logging more explicit. --- Cargo.lock | 23 ++++++++++++++++++ Cargo.toml | 4 ++-- src/cpu.rs | 59 ++++++++++++++++++++-------------------------- src/instruction.rs | 12 ++++++---- src/lib.rs | 21 ++++++++++++----- src/memory.rs | 5 ++-- src/registers.rs | 24 ++++++++++++------- 7 files changed, 92 insertions(+), 56 deletions(-) create mode 100644 Cargo.lock diff --git a/Cargo.lock b/Cargo.lock new file mode 100644 index 0000000..aff6643 --- /dev/null +++ b/Cargo.lock @@ -0,0 +1,23 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 3 + +[[package]] +name = "bitflags" +version = "2.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1" + +[[package]] +name = "log" +version = "0.4.21" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "90ed8c1e510134f979dbc4f070f87d4313098b704861a105fe34231c70a3901c" + +[[package]] +name = "mos6502" +version = "0.5.0" +dependencies = [ + "bitflags", + "log", +] diff --git a/Cargo.toml b/Cargo.toml index 481588c..55bb536 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -40,8 +40,8 @@ edition = "2021" name = "mos6502" [dependencies] -bitflags = "2.3.3" -log = "0.4.19" +bitflags = "2.5.0" +log = "0.4.21" [features] decimal_mode = [] diff --git a/src/cpu.rs b/src/cpu.rs index dea2f5f..5480bc6 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -188,21 +188,21 @@ impl CPU { pub fn execute_instruction(&mut self, decoded_instr: DecodedInstr) { match decoded_instr { (Instruction::ADC, OpInput::UseImmediate(val)) => { - debug!("add with carry immediate: {}", val); + log::debug!("add with carry immediate: {}", val); self.add_with_carry(val); } (Instruction::ADC, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("add with carry. address: {:?}. value: {}", addr, val); + log::debug!("add with carry. address: {:?}. value: {}", addr, val); self.add_with_carry(val); } (Instruction::ADCnd, OpInput::UseImmediate(val)) => { - debug!("add with carry immediate: {}", val); + log::debug!("add with carry immediate: {}", val); self.add_with_no_decimal(val); } (Instruction::ADCnd, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("add with carry. address: {:?}. value: {}", addr, val); + log::debug!("add with carry. address: {:?}. value: {}", addr, val); self.add_with_no_decimal(val); } @@ -273,7 +273,7 @@ impl CPU { (Instruction::BMI, OpInput::UseRelative(rel)) => { let addr = self.registers.program_counter.wrapping_add(rel); - debug!("branch if minus relative. address: {:?}", addr); + log::debug!("branch if minus relative. address: {:?}", addr); self.branch_if_minus(addr); } @@ -289,7 +289,7 @@ impl CPU { self.push_on_stack(self.registers.status.bits()); let pcl = self.memory.get_byte(0xfffe); let pch = self.memory.get_byte(0xffff); - self.jump(((pch as u16) << 8) | pcl as u16); + self.jump((u16::from(pch) << 8) | u16::from(pcl)); self.registers.status.or(Status::PS_DISABLE_INTERRUPTS); } @@ -384,32 +384,32 @@ impl CPU { } (Instruction::LDA, OpInput::UseImmediate(val)) => { - debug!("load A immediate: {}", val); + log::debug!("load A immediate: {}", val); self.load_accumulator(val); } (Instruction::LDA, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("load A. address: {:?}. value: {}", addr, val); + log::debug!("load A. address: {:?}. value: {}", addr, val); self.load_accumulator(val); } (Instruction::LDX, OpInput::UseImmediate(val)) => { - debug!("load X immediate: {}", val); + log::debug!("load X immediate: {}", val); self.load_x_register(val); } (Instruction::LDX, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("load X. address: {:?}. value: {}", addr, val); + log::debug!("load X. address: {:?}. value: {}", addr, val); self.load_x_register(val); } (Instruction::LDY, OpInput::UseImmediate(val)) => { - debug!("load Y immediate: {}", val); + log::debug!("load Y immediate: {}", val); self.load_y_register(val); } (Instruction::LDY, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("load Y. address: {:?}. value: {}", addr, val); + log::debug!("load Y. address: {:?}. value: {}", addr, val); self.load_y_register(val); } @@ -499,32 +499,33 @@ impl CPU { self.registers.status = Status::from_bits_truncate(val); let pcl: u8 = self.pull_from_stack(); let pch: u8 = self.fetch_from_stack(); - self.registers.program_counter = ((pch as u16) << 8) | pcl as u16; + self.registers.program_counter = (u16::from(pch) << 8) | u16::from(pcl); } (Instruction::RTS, OpInput::UseImplied) => { self.pull_from_stack(); let pcl: u8 = self.pull_from_stack(); let pch: u8 = self.fetch_from_stack(); - self.registers.program_counter = (((pch as u16) << 8) | pcl as u16).wrapping_add(1); + self.registers.program_counter = + ((u16::from(pch) << 8) | u16::from(pcl)).wrapping_add(1); } (Instruction::SBC, OpInput::UseImmediate(val)) => { - debug!("subtract with carry immediate: {}", val); + log::debug!("subtract with carry immediate: {}", val); self.subtract_with_carry(val); } (Instruction::SBC, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("subtract with carry. address: {:?}. value: {}", addr, val); + log::debug!("subtract with carry. address: {:?}. value: {}", addr, val); self.subtract_with_carry(val); } (Instruction::SBCnd, OpInput::UseImmediate(val)) => { - debug!("subtract with carry immediate: {}", val); + log::debug!("subtract with carry immediate: {}", val); self.subtract_with_no_decimal(val); } (Instruction::SBCnd, OpInput::UseAddress(addr)) => { let val = self.memory.get_byte(addr); - debug!("subtract with carry. address: {:?}. value: {}", addr, val); + log::debug!("subtract with carry. address: {:?}. value: {}", addr, val); self.subtract_with_no_decimal(val); } @@ -577,10 +578,10 @@ impl CPU { } (Instruction::NOP, OpInput::UseImplied) => { - debug!("NOP instruction"); + log::debug!("NOP instruction"); } (_, _) => { - debug!( + log::debug!( "attempting to execute unimplemented or invalid \ instruction" ); @@ -763,7 +764,7 @@ impl CPU { self.load_accumulator(result); - debug!("accumulator: {}", self.registers.accumulator); + log::debug!("accumulator: {}", self.registers.accumulator); } fn add_with_no_decimal(&mut self, value: u8) { @@ -795,7 +796,7 @@ impl CPU { self.load_accumulator(result); - debug!("accumulator: {}", self.registers.accumulator); + log::debug!("accumulator: {}", self.registers.accumulator); } fn and(&mut self, value: u8) { @@ -807,11 +808,7 @@ impl CPU { // A - M - (1 - C) // nc -- 'not carry' - let nc: u8 = if self.registers.status.contains(Status::PS_CARRY) { - 0 - } else { - 1 - }; + let nc: u8 = u8::from(!self.registers.status.contains(Status::PS_CARRY)); let a_before = self.registers.accumulator; @@ -853,11 +850,7 @@ impl CPU { // A - M - (1 - C) // nc -- 'not carry' - let nc: u8 = if self.registers.status.contains(Status::PS_CARRY) { - 0 - } else { - 1 - }; + let nc: u8 = u8::from(!self.registers.status.contains(Status::PS_CARRY)); let a_before = self.registers.accumulator; @@ -1031,7 +1024,7 @@ impl CPU { } fn compare_with_x_register(&mut self, val: u8) { - debug!("compare_with_x_register"); + log::debug!("compare_with_x_register"); let x = self.registers.index_x; self.compare(x, val); diff --git a/src/instruction.rs b/src/instruction.rs index b579c6d..f92edb0 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -107,7 +107,7 @@ pub enum Instruction { TYA, // Transfer Y to Accumulator..... | N. ...Z. A = Y } -#[derive(Copy, Clone)] +#[derive(Copy, Clone, Debug)] pub enum OpInput { UseImplied, UseImmediate(u8), @@ -115,7 +115,7 @@ pub enum OpInput { UseAddress(u16), } -#[derive(Copy, Clone)] +#[derive(Copy, Clone, Debug)] pub enum AddressingMode { Accumulator, // 1 LSR A work directly on accumulator Implied, // 1 BRK @@ -135,6 +135,7 @@ pub enum AddressingMode { } impl AddressingMode { + #[must_use] pub fn extra_bytes(self) -> u16 { match self { AddressingMode::Accumulator => 0, @@ -157,6 +158,7 @@ impl AddressingMode { pub type DecodedInstr = (Instruction, OpInput); /// The NMOS 6502 variant. This one is present in the Commodore 64, early Apple IIs, etc. +#[derive(Copy, Clone, Debug)] pub struct Nmos6502; impl crate::Variant for Nmos6502 { @@ -422,8 +424,9 @@ impl crate::Variant for Nmos6502 { } } -/// The Ricoh variant which has no decimal mode. This is what to use if you want to emulate the -/// NES. +/// The Ricoh variant which has no decimal mode. This is what to use if you want +/// to emulate the NES. +#[derive(Copy, Clone, Debug)] pub struct Ricoh2a03; impl crate::Variant for Ricoh2a03 { @@ -452,6 +455,7 @@ impl crate::Variant for Ricoh2a03 { /// Emulates some very early 6502s which have no ROR instruction. This one is used in very early /// KIM-1s. +#[derive(Copy, Clone, Debug)] pub struct RevisionA; impl crate::Variant for RevisionA { diff --git a/src/lib.rs b/src/lib.rs index 302a8c1..9f67933 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -25,15 +25,24 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. +#![warn(clippy::all, clippy::pedantic)] +#![warn( + absolute_paths_not_starting_with_crate, + rustdoc::invalid_html_tags, + missing_copy_implementations, + missing_debug_implementations, + semicolon_in_expressions_from_macros, + unreachable_pub, + unused_crate_dependencies, + unused_extern_crates, + variant_size_differences, + clippy::missing_const_for_fn +)] +#![deny(anonymous_parameters, macro_use_extern_crate, pointer_structural_match)] +#![allow(clippy::module_name_repetitions)] #![no_std] #[doc = include_str!("../README.md")] -#[macro_use] -extern crate log; - -#[macro_use] -extern crate bitflags; - pub mod cpu; pub mod instruction; pub mod memory; diff --git a/src/memory.rs b/src/memory.rs index dbe46b5..6f09814 100644 --- a/src/memory.rs +++ b/src/memory.rs @@ -47,7 +47,7 @@ pub const IRQ_INTERRUPT_VECTOR_HI: u16 = 0xFFFF; const MEMORY_SIZE: usize = (ADDR_HI_BARE - ADDR_LO_BARE) as usize + 1usize; // FIXME: Should this use indirection for `bytes`? -#[derive(Copy, Clone)] +#[derive(Copy, Clone, Debug)] pub struct Memory { bytes: [u8; MEMORY_SIZE], } @@ -70,6 +70,7 @@ pub trait Bus { } impl Memory { + #[must_use] pub fn new() -> Memory { Memory { bytes: [0; MEMORY_SIZE], @@ -103,7 +104,7 @@ mod tests { use super::*; #[test] - #[should_panic] + #[should_panic(expected = "range end index 65537 out of range for slice of length 65536")] fn test_memory_overflow_panic() { let mut memory = Memory::new(); memory.set_bytes(0xFFFE, &[1, 2, 3]); diff --git a/src/registers.rs b/src/registers.rs index 1b74fbc..89f7864 100644 --- a/src/registers.rs +++ b/src/registers.rs @@ -25,8 +25,10 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. +use bitflags::bitflags; + // Useful for constructing Status instances -#[derive(Copy, Clone)] +#[derive(Copy, Clone, Debug)] pub struct StatusArgs { pub negative: bool, pub overflow: bool, @@ -39,6 +41,7 @@ pub struct StatusArgs { } impl StatusArgs { + #[must_use] pub fn none() -> StatusArgs { StatusArgs { negative: false, @@ -71,6 +74,7 @@ bitflags! { } impl Status { + #[must_use] pub fn new( StatusArgs { negative, @@ -86,28 +90,28 @@ impl Status { let mut out = Status::empty(); if negative { - out |= Status::PS_NEGATIVE + out |= Status::PS_NEGATIVE; } if overflow { - out |= Status::PS_OVERFLOW + out |= Status::PS_OVERFLOW; } if unused { - out |= Status::PS_UNUSED + out |= Status::PS_UNUSED; } if brk { - out |= Status::PS_BRK + out |= Status::PS_BRK; } if decimal_mode { - out |= Status::PS_DECIMAL_MODE + out |= Status::PS_DECIMAL_MODE; } if disable_interrupts { - out |= Status::PS_DISABLE_INTERRUPTS + out |= Status::PS_DISABLE_INTERRUPTS; } if zero { - out |= Status::PS_ZERO + out |= Status::PS_ZERO; } if carry { - out |= Status::PS_CARRY + out |= Status::PS_CARRY; } out @@ -146,6 +150,7 @@ impl Default for Status { pub struct StackPointer(pub u8); impl StackPointer { + #[must_use] pub fn to_u16(self) -> u16 { let StackPointer(val) = self; u16::from_le_bytes([val, 0x01]) @@ -177,6 +182,7 @@ impl Default for Registers { } impl Registers { + #[must_use] pub fn new() -> Registers { // TODO akeeton: Revisit these defaults. Registers { From bdad29af7de98b21069e749b6e8b5731ad053a27 Mon Sep 17 00:00:00 2001 From: Matthias Date: Mon, 22 Apr 2024 16:02:27 +0200 Subject: [PATCH 2/4] Make sure `Cargo.lock` is not comitted --- .gitignore | 1 + Cargo.lock | 23 ----------------------- 2 files changed, 1 insertion(+), 23 deletions(-) delete mode 100644 Cargo.lock diff --git a/.gitignore b/.gitignore index 53c030a..b308928 100644 --- a/.gitignore +++ b/.gitignore @@ -66,3 +66,4 @@ TAGS.vi src/.DS_Store tmp.*.rs .vscode +Cargo.lock \ No newline at end of file diff --git a/Cargo.lock b/Cargo.lock deleted file mode 100644 index aff6643..0000000 --- a/Cargo.lock +++ /dev/null @@ -1,23 +0,0 @@ -# This file is automatically @generated by Cargo. -# It is not intended for manual editing. -version = 3 - -[[package]] -name = "bitflags" -version = "2.5.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1" - -[[package]] -name = "log" -version = "0.4.21" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "90ed8c1e510134f979dbc4f070f87d4313098b704861a105fe34231c70a3901c" - -[[package]] -name = "mos6502" -version = "0.5.0" -dependencies = [ - "bitflags", - "log", -] From 7579cd5d249181699e66e9cac0751953b50c22cf Mon Sep 17 00:00:00 2001 From: Matthias Date: Mon, 22 Apr 2024 16:16:19 +0200 Subject: [PATCH 3/4] fix some lints --- src/cpu.rs | 25 +++++++++++++++++-------- src/instruction.rs | 3 ++- src/lib.rs | 5 +++++ src/memory.rs | 21 ++++++++++++++++++++- src/registers.rs | 5 +++-- 5 files changed, 47 insertions(+), 12 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index 5480bc6..f78bf7d 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -49,6 +49,7 @@ where } impl CPU { + #[allow(clippy::needless_pass_by_value)] pub fn new(memory: M, _variant: V) -> CPU { CPU { registers: Registers::new(), @@ -58,10 +59,23 @@ impl CPU { } pub fn reset(&mut self) { - //TODO: // should read some bytes from the stack and also get the PC from the reset vector + //TODO: should read some bytes from the stack and also get the PC from the reset vector } + /// Get the next byte from memory and decode it into an instruction and addressing mode. + /// + /// # Panics + /// + /// This function will panic if the instruction is not recognized + /// (i.e. the opcode is invalid or has not been implemented). pub fn fetch_next_and_decode(&mut self) -> Option { + // Helper function to read a 16-bit address from memory + fn read_address(mem: &mut M, addr: u16) -> [u8; 2] { + let lo = mem.get_byte(addr); + let hi = mem.get_byte(addr.wrapping_add(1)); + [lo, hi] + } + let x: u8 = self.memory.get_byte(self.registers.program_counter); match V::decode(x) { @@ -89,12 +103,6 @@ impl CPU { let memory = &mut self.memory; - fn read_address(mem: &mut M, addr: u16) -> [u8; 2] { - let lo = mem.get_byte(addr); - let hi = mem.get_byte(addr.wrapping_add(1)); - [lo, hi] - } - let am_out = match am { AddressingMode::Accumulator | AddressingMode::Implied => { // Always the same -- no input @@ -185,6 +193,7 @@ impl CPU { } } + #[allow(clippy::too_many_lines)] pub fn execute_instruction(&mut self, decoded_instr: DecodedInstr) { match decoded_instr { (Instruction::ADC, OpInput::UseImmediate(val)) => { @@ -720,7 +729,7 @@ impl CPU { } fn add_with_carry(&mut self, value: u8) { - fn decimal_adjust(result: u8) -> u8 { + const fn decimal_adjust(result: u8) -> u8 { let bcd1: u8 = if (result & 0x0f) > 0x09 { 0x06 } else { 0x00 }; let bcd2: u8 = if (result.wrapping_add(bcd1) & 0xf0) > 0x90 { diff --git a/src/instruction.rs b/src/instruction.rs index f92edb0..6bbddf4 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -136,7 +136,7 @@ pub enum AddressingMode { impl AddressingMode { #[must_use] - pub fn extra_bytes(self) -> u16 { + pub const fn extra_bytes(self) -> u16 { match self { AddressingMode::Accumulator => 0, AddressingMode::Implied => 0, @@ -460,6 +460,7 @@ pub struct RevisionA; impl crate::Variant for RevisionA { fn decode(opcode: u8) -> Option<(Instruction, AddressingMode)> { + #[allow(clippy::match_same_arms)] match opcode { 0x66 => None, 0x6a => None, diff --git a/src/lib.rs b/src/lib.rs index 9f67933..e58110c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -40,6 +40,11 @@ )] #![deny(anonymous_parameters, macro_use_extern_crate, pointer_structural_match)] #![allow(clippy::module_name_repetitions)] +// Registers and ops follow the 6502 naming convention and have similar names at +// times +#![allow(clippy::similar_names)] +#![allow(clippy::match_same_arms)] +#![allow(clippy::too_many_lines)] #![no_std] #[doc = include_str!("../README.md")] diff --git a/src/memory.rs b/src/memory.rs index 6f09814..db83cc3 100644 --- a/src/memory.rs +++ b/src/memory.rs @@ -58,10 +58,29 @@ impl Default for Memory { } } +/// Trait for a bus that can read and write bytes. +/// +/// This is used to abstract the memory and I/O operations of the CPU. +/// +/// # Examples +/// +/// ``` +/// use mos6502::memory::{Bus, Memory}; +/// +/// let mut memory = Memory::new(); +/// memory.set_byte(0x0000, 0x12); +/// assert_eq!(memory.get_byte(0x0000), 0x12); +/// ``` pub trait Bus { + /// Returns the byte at the given address. fn get_byte(&mut self, address: u16) -> u8; + + /// Sets the byte at the given address to the given value. fn set_byte(&mut self, address: u16, value: u8); + /// Sets the bytes starting at the given address to the given values. + /// + /// This is a default implementation that calls `set_byte` for each byte. fn set_bytes(&mut self, start: u16, values: &[u8]) { for i in 0..values.len() as u16 { self.set_byte(start + i, values[i as usize]); @@ -71,7 +90,7 @@ pub trait Bus { impl Memory { #[must_use] - pub fn new() -> Memory { + pub const fn new() -> Memory { Memory { bytes: [0; MEMORY_SIZE], } diff --git a/src/registers.rs b/src/registers.rs index 89f7864..827d0ae 100644 --- a/src/registers.rs +++ b/src/registers.rs @@ -29,6 +29,7 @@ use bitflags::bitflags; // Useful for constructing Status instances #[derive(Copy, Clone, Debug)] +#[allow(clippy::struct_excessive_bools)] pub struct StatusArgs { pub negative: bool, pub overflow: bool, @@ -42,7 +43,7 @@ pub struct StatusArgs { impl StatusArgs { #[must_use] - pub fn none() -> StatusArgs { + pub const fn none() -> StatusArgs { StatusArgs { negative: false, overflow: false, @@ -151,7 +152,7 @@ pub struct StackPointer(pub u8); impl StackPointer { #[must_use] - pub fn to_u16(self) -> u16 { + pub const fn to_u16(self) -> u16 { let StackPointer(val) = self; u16::from_le_bytes([val, 0x01]) } From fe4422359d69c7f97a48352434ed68376ccb19f9 Mon Sep 17 00:00:00 2001 From: Sam M W Date: Tue, 23 Apr 2024 17:42:25 +0100 Subject: [PATCH 4/4] refactor away some casts --- src/cpu.rs | 31 +++++++++---------------------- 1 file changed, 9 insertions(+), 22 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index f78bf7d..a817b05 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -610,29 +610,18 @@ impl CPU { } } - fn set_flags_from_i8(status: &mut Status, value: i8) { - let is_zero = value == 0; - let is_negative = value < 0; - - status.set_with_mask( - Status::PS_ZERO | Status::PS_NEGATIVE, - Status::new(StatusArgs { - zero: is_zero, - negative: is_negative, - ..StatusArgs::none() - }), - ); + const fn value_is_negative(value: u8) -> bool { + value > 127 } fn set_flags_from_u8(status: &mut Status, value: u8) { let is_zero = value == 0; - let is_negative = value > 127; status.set_with_mask( Status::PS_ZERO | Status::PS_NEGATIVE, Status::new(StatusArgs { zero: is_zero, - negative: is_negative, + negative: Self::value_is_negative(value), ..StatusArgs::none() }), ); @@ -650,7 +639,7 @@ impl CPU { ..StatusArgs::none() }), ); - CPU::::set_flags_from_i8(status, *p_val as i8); + CPU::::set_flags_from_u8(status, *p_val); } fn shift_right_with_flags(p_val: &mut u8, status: &mut Status) { @@ -664,7 +653,7 @@ impl CPU { ..StatusArgs::none() }), ); - CPU::::set_flags_from_i8(status, *p_val as i8); + CPU::::set_flags_from_u8(status, *p_val); } fn rotate_left_with_flags(p_val: &mut u8, status: &mut Status) { @@ -680,7 +669,7 @@ impl CPU { ..StatusArgs::none() }), ); - CPU::::set_flags_from_i8(status, *p_val as i8); + CPU::::set_flags_from_u8(status, *p_val); } fn rotate_right_with_flags(p_val: &mut u8, status: &mut Status) { @@ -696,7 +685,7 @@ impl CPU { ..StatusArgs::none() }), ); - CPU::::set_flags_from_i8(status, *p_val as i8); + CPU::::set_flags_from_u8(status, *p_val); } fn set_u8_with_flags(mem: &mut u8, status: &mut Status, value: u8) { @@ -917,13 +906,12 @@ impl CPU { let value_new = val.wrapping_add(1); *val = value_new; - let is_negative = (value_new as i8) < 0; let is_zero = value_new == 0; flags.set_with_mask( Status::PS_NEGATIVE | Status::PS_ZERO, Status::new(StatusArgs { - negative: is_negative, + negative: Self::value_is_negative(value_new), zero: is_zero, ..StatusArgs::none() }), @@ -934,13 +922,12 @@ impl CPU { let value_new = val.wrapping_sub(1); *val = value_new; - let is_negative = (value_new as i8) < 0; let is_zero = value_new == 0; flags.set_with_mask( Status::PS_NEGATIVE | Status::PS_ZERO, Status::new(StatusArgs { - negative: is_negative, + negative: Self::value_is_negative(value_new), zero: is_zero, ..StatusArgs::none() }),