diff --git a/src/cpu.rs b/src/cpu.rs
index 94b059a..f346200 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -282,6 +282,16 @@ impl<M: Bus, V: Variant> CPU<M, V> {
                 self.branch_if_not_equal(addr);
             }
 
+            (Instruction::BIT, OpInput::UseImmediate(val)) => {
+                self.registers.status.set_with_mask(
+                    Status::PS_ZERO,
+                    Status::new(StatusArgs {
+                        zero: 0 == (self.registers.accumulator & val),
+                        ..StatusArgs::none()
+                    }),
+                );
+            }
+
             (Instruction::BIT, OpInput::UseAddress(addr)) => {
                 let a: u8 = self.registers.accumulator;
                 let m: u8 = self.memory.get_byte(addr);
diff --git a/src/instruction.rs b/src/instruction.rs
index 89ee8b0..3a3c659 100644
--- a/src/instruction.rs
+++ b/src/instruction.rs
@@ -640,6 +640,7 @@ impl crate::Variant for Cmos6502 {
             0xb2 => Some((Instruction::LDA, AddressingMode::ZeroPageIndirect)),
             0xd2 => Some((Instruction::CMP, AddressingMode::ZeroPageIndirect)),
             0xf2 => Some((Instruction::SBC, AddressingMode::ZeroPageIndirect)),
+            0x89 => Some((Instruction::BIT, AddressingMode::Immediate)),
             _ => Nmos6502::decode(opcode),
         }
     }