mirror of
https://github.com/mre/mos6502.git
synced 2024-11-25 02:33:26 +00:00
x and y are now unsigned and there's less casting all over
This commit is contained in:
parent
41b9b19be2
commit
665ee4193d
62
src/cpu.rs
62
src/cpu.rs
@ -212,7 +212,7 @@ impl CPU {
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(Instruction::DEY, OpInput::UseImplied) => {
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let mut r = u8::from_ne_bytes(self.registers.index_y.to_ne_bytes());
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self.decrement(&mut r);
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self.load_y_register(i8::from_ne_bytes(r.to_ne_bytes()));
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self.load_y_register(r);
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}
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(Instruction::DEX, OpInput::UseImplied) => {
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@ -257,22 +257,22 @@ impl CPU {
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(Instruction::LDX, OpInput::UseImmediate(val)) => {
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debug!("load X immediate: {}", val);
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self.load_x_register(val as i8);
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self.load_x_register(val);
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}
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(Instruction::LDX, OpInput::UseAddress(addr)) => {
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let val = self.memory.get_byte(addr);
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debug!("load X. address: {:?}. value: {}", addr, val);
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self.load_x_register(val as i8);
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self.load_x_register(val);
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}
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(Instruction::LDY, OpInput::UseImmediate(val)) => {
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debug!("load Y immediate: {}", val);
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self.load_y_register(val as i8);
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self.load_y_register(val);
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}
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(Instruction::LDY, OpInput::UseAddress(addr)) => {
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let val = self.memory.get_byte(addr);
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debug!("load Y. address: {:?}. value: {}", addr, val);
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self.load_y_register(val as i8);
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self.load_y_register(val);
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}
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(Instruction::LSR, OpInput::UseImplied) => {
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@ -377,20 +377,19 @@ impl CPU {
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(Instruction::TAX, OpInput::UseImplied) => {
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let val = self.registers.accumulator;
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self.load_x_register(val);
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self.load_x_register(val as u8);
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}
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(Instruction::TAY, OpInput::UseImplied) => {
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let val = self.registers.accumulator;
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self.load_y_register(val);
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self.load_y_register(val as u8);
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}
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(Instruction::TSX, OpInput::UseImplied) => {
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let StackPointer(val) = self.registers.stack_pointer;
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let val = val as i8;
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self.load_x_register(val);
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}
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(Instruction::TXA, OpInput::UseImplied) => {
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let val = self.registers.index_x;
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self.load_accumulator(val);
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self.load_accumulator(val as i8);
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}
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(Instruction::TXS, OpInput::UseImplied) => {
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// Note that this is the only 'transfer' instruction that does
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@ -401,7 +400,7 @@ impl CPU {
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}
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(Instruction::TYA, OpInput::UseImplied) => {
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let val = self.registers.index_y;
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self.load_accumulator(val);
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self.load_accumulator(val as i8);
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}
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(Instruction::NOP, OpInput::UseImplied) => {
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@ -436,6 +435,20 @@ impl CPU {
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);
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}
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fn set_flags_from_u8(status: &mut Status, value: u8) {
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let is_zero = value == 0;
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let is_negative = value > 127;
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status.set_with_mask(
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Status::PS_ZERO | Status::PS_NEGATIVE,
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Status::new(StatusArgs {
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zero: is_zero,
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negative: is_negative,
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..StatusArgs::none()
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}),
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);
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}
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fn shift_left_with_flags(p_val: &mut u8, status: &mut Status) {
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let mask = 1 << 7;
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let is_bit_7_set = (*p_val & mask) == mask;
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@ -497,21 +510,26 @@ impl CPU {
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CPU::set_flags_from_i8(status, *p_val as i8);
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}
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fn set_u8_with_flags(mem: &mut u8, status: &mut Status, value: u8) {
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*mem = value;
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CPU::set_flags_from_u8(status, value);
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}
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fn set_i8_with_flags(mem: &mut i8, status: &mut Status, value: i8) {
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*mem = value;
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CPU::set_flags_from_i8(status, value);
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}
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fn load_x_register(&mut self, value: i8) {
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CPU::set_i8_with_flags(
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fn load_x_register(&mut self, value: u8) {
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CPU::set_u8_with_flags(
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&mut self.registers.index_x,
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&mut self.registers.status,
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value,
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);
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}
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fn load_y_register(&mut self, value: i8) {
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CPU::set_i8_with_flags(
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fn load_y_register(&mut self, value: u8) {
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CPU::set_u8_with_flags(
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&mut self.registers.index_y,
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&mut self.registers.status,
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value,
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@ -692,7 +710,7 @@ impl CPU {
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fn dec_x(&mut self) {
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let mut r = u8::from_ne_bytes(self.registers.index_x.to_ne_bytes());
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self.decrement(&mut r);
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self.load_x_register(i8::from_ne_bytes(r.to_ne_bytes()));
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self.load_x_register(r);
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}
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fn jump(&mut self, addr: Address) {
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@ -778,12 +796,12 @@ impl CPU {
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debug!("compare_with_x_register");
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let x = self.registers.index_x;
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self.compare(x, val);
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self.compare(x as i8, val);
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}
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fn compare_with_y_register(&mut self, val: u8) {
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let y = self.registers.index_y;
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self.compare(y, val);
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self.compare(y as i8, val);
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}
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fn exclusive_or(&mut self, val: u8) {
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@ -1083,7 +1101,7 @@ mod tests {
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#[test]
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fn decrement_x_test() {
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let mut cpu = CPU::new();
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cpu.registers.index_x = -128;
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cpu.registers.index_x = 0x80;
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cpu.execute_instruction((Instruction::DEX, OpInput::UseImplied));
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assert_eq!(cpu.registers.index_x, 127);
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assert!(!cpu.registers.status.contains(Status::PS_ZERO));
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@ -1093,7 +1111,7 @@ mod tests {
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#[test]
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fn decrement_y_test() {
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let mut cpu = CPU::new();
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cpu.registers.index_y = -128;
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cpu.registers.index_y = 0x80;
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cpu.execute_instruction((Instruction::DEY, OpInput::UseImplied));
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assert_eq!(cpu.registers.index_y, 127);
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assert!(!cpu.registers.status.contains(Status::PS_ZERO));
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@ -1143,14 +1161,14 @@ mod tests {
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let mut cpu = CPU::new();
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cpu.dec_x();
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assert_eq!(cpu.registers.index_x, -1);
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assert_eq!(cpu.registers.index_x, 0xff);
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assert!(!cpu.registers.status.contains(Status::PS_CARRY));
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assert!(!cpu.registers.status.contains(Status::PS_ZERO));
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assert!(cpu.registers.status.contains(Status::PS_NEGATIVE));
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assert!(!cpu.registers.status.contains(Status::PS_OVERFLOW));
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cpu.dec_x();
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assert_eq!(cpu.registers.index_x, -2);
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assert_eq!(cpu.registers.index_x, 0xfe);
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assert!(!cpu.registers.status.contains(Status::PS_CARRY));
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assert!(!cpu.registers.status.contains(Status::PS_ZERO));
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assert!(cpu.registers.status.contains(Status::PS_NEGATIVE));
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@ -1176,7 +1194,7 @@ mod tests {
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assert!(!cpu.registers.status.contains(Status::PS_OVERFLOW));
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cpu.dec_x();
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assert_eq!(cpu.registers.index_x, -1);
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assert_eq!(cpu.registers.index_x, 0xff);
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assert!(!cpu.registers.status.contains(Status::PS_CARRY));
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assert!(!cpu.registers.status.contains(Status::PS_ZERO));
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assert!(cpu.registers.status.contains(Status::PS_NEGATIVE));
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@ -163,8 +163,8 @@ impl StackPointer {
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#[derive(Copy, Clone, PartialEq, Eq, Debug)]
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pub struct Registers {
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pub accumulator: i8,
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pub index_x: i8,
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pub index_y: i8,
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pub index_x: u8,
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pub index_y: u8,
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pub stack_pointer: StackPointer,
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pub program_counter: Address,
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pub status: Status,
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