mirror of
https://github.com/mre/mos6502.git
synced 2024-11-24 11:31:00 +00:00
wip
This commit is contained in:
Matthias
parent
0f882e974b
commit
6a65b375c4
269
Cargo.lock
generated
269
Cargo.lock
generated
@ -2,6 +2,15 @@
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||||
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@ -234,6 +325,23 @@ dependencies = [
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||||
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[[package]]
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||||
|
||||
@ -53,6 +53,7 @@ default-features = false
|
||||
skeptic = "0.13.7"
|
||||
|
||||
[dev-dependencies]
|
||||
env_logger = "0.10.0"
|
||||
skeptic = "0.13.7"
|
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[features]
|
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|
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@ -27,7 +27,6 @@
|
||||
|
||||
use crate::instruction::{self, AddressingMode, DecodedInstr, Instruction, OpInput};
|
||||
use crate::memory::Bus;
|
||||
|
||||
use crate::registers::{Registers, StackPointer, Status, StatusArgs};
|
||||
|
||||
fn arr_to_addr(arr: &[u8]) -> u16 {
|
||||
@ -62,6 +61,8 @@ impl<M: Bus> CPU<M> {
|
||||
|
||||
match instruction::OPCODES[x as usize] {
|
||||
Some((instr, am)) => {
|
||||
debug!("{instr:?}");
|
||||
|
||||
let extra_bytes = am.extra_bytes();
|
||||
let num_bytes = extra_bytes + 1;
|
||||
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||||
@ -113,7 +113,7 @@ pub enum OpInput {
|
||||
UseAddress(u16),
|
||||
}
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#[derive(Copy, Clone)]
|
||||
#[derive(Copy, Clone, Debug)]
|
||||
pub enum AddressingMode {
|
||||
Accumulator, // 1 LSR A work directly on accumulator
|
||||
Implied, // 1 BRK
|
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|
||||
@ -34,30 +34,37 @@
|
||||
// end: Address,
|
||||
// }
|
||||
|
||||
const ADDR_LO_BARE: u16 = 0x0000;
|
||||
const ADDR_HI_BARE: u16 = 0xFFFF;
|
||||
// const ADDR_LO_BARE: u16 = 0x0000;
|
||||
// const ADDR_HI_BARE: u16 = 0xFFFF;
|
||||
|
||||
pub const MEMORY_ADDRESS_LO: u16 = ADDR_LO_BARE;
|
||||
pub const MEMORY_ADDRESS_HI: u16 = ADDR_HI_BARE;
|
||||
// pub const MEMORY_ADDRESS_LO: u16 = ADDR_LO_BARE;
|
||||
// pub const MEMORY_ADDRESS_HI: u16 = ADDR_HI_BARE;
|
||||
pub const STACK_ADDRESS_LO: u16 = 0x0100;
|
||||
pub const STACK_ADDRESS_HI: u16 = 0x01FF;
|
||||
pub const IRQ_INTERRUPT_VECTOR_LO: u16 = 0xFFFE;
|
||||
pub const IRQ_INTERRUPT_VECTOR_HI: u16 = 0xFFFF;
|
||||
|
||||
const MEMORY_SIZE: usize = (ADDR_HI_BARE - ADDR_LO_BARE) as usize + 1usize;
|
||||
// const MEMORY_SIZE: usize = (ADDR_HI_BARE - ADDR_LO_BARE) as usize + 1usize;
|
||||
|
||||
// FIXME: Should this use indirection for `bytes`?
|
||||
#[derive(Copy, Clone)]
|
||||
pub struct Memory {
|
||||
pub struct Memory<const MEMORY_SIZE: usize> {
|
||||
bytes: [u8; MEMORY_SIZE],
|
||||
}
|
||||
|
||||
impl Default for Memory {
|
||||
impl<const MEMORY_SIZE: usize> Default for Memory<MEMORY_SIZE> {
|
||||
fn default() -> Self {
|
||||
Self::new()
|
||||
}
|
||||
}
|
||||
|
||||
impl<const MEMORY_SIZE: usize> Memory<MEMORY_SIZE> {
|
||||
pub fn new() -> Memory<MEMORY_SIZE> {
|
||||
Memory {
|
||||
bytes: [0; MEMORY_SIZE],
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub trait Bus {
|
||||
fn get_byte(&mut self, address: u16) -> u8;
|
||||
fn set_byte(&mut self, address: u16, value: u8);
|
||||
@ -69,15 +76,7 @@ pub trait Bus {
|
||||
}
|
||||
}
|
||||
|
||||
impl Memory {
|
||||
pub fn new() -> Memory {
|
||||
Memory {
|
||||
bytes: [0; MEMORY_SIZE],
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl Bus for Memory {
|
||||
impl<const MEMORY_SIZE: usize> Bus for Memory<MEMORY_SIZE> {
|
||||
fn get_byte(&mut self, address: u16) -> u8 {
|
||||
self.bytes[address as usize]
|
||||
}
|
||||
|
||||
@ -1,45 +1,49 @@
|
||||
extern crate mos6502;
|
||||
|
||||
use env_logger::Env;
|
||||
|
||||
use std::fs::File;
|
||||
use std::io::Read;
|
||||
|
||||
use mos6502::address::Address;
|
||||
use mos6502::cpu::CPU;
|
||||
use mos6502::memory::Bus;
|
||||
use mos6502::memory::Memory;
|
||||
|
||||
const PC_START: u16 = 0x400;
|
||||
// const MAX_CYCLES: usize = 100000000;
|
||||
|
||||
#[test]
|
||||
fn functional_test() {
|
||||
env_logger::init_from_env(Env::default().default_filter_or("mos6502=debug"));
|
||||
|
||||
let mut f = File::open("test-roms/6502_functional_test.bin").unwrap();
|
||||
let mut rom = Vec::<u8>::new();
|
||||
f.read_to_end(&mut rom).unwrap();
|
||||
let mut cpu = CPU::new();
|
||||
let mut cpu = CPU::new(Memory::<66560>::new());
|
||||
|
||||
cpu.memory.set_bytes(Address(PC_START), &rom);
|
||||
cpu.memory.set_bytes(PC_START, &rom);
|
||||
|
||||
cpu.run();
|
||||
// cpu.run();
|
||||
|
||||
/*
|
||||
let mut last_pc = PC_START;
|
||||
let mut last_pc = PC_START;
|
||||
|
||||
loop {
|
||||
cpu.step();
|
||||
// Prevent endless loop
|
||||
if cpu.interconnect.elapsed_cycles() > MAX_CYCLES {
|
||||
assert!(false, "Took too many cycles to complete");
|
||||
loop {
|
||||
cpu.single_step();
|
||||
// Prevent endless loop
|
||||
// TODO: We could add cycle count to the CPU struct to check that
|
||||
// if cpu.interconnect.elapsed_cycles() > MAX_CYCLES {
|
||||
// assert!(false, "Took too many cycles to complete");
|
||||
// }
|
||||
|
||||
if last_pc == cpu.registers.program_counter {
|
||||
if cpu.registers.program_counter == 0x3367 {
|
||||
// Success!
|
||||
break;
|
||||
} else {
|
||||
// assert!(false, "Trap detected");
|
||||
}
|
||||
|
||||
if last_pc == cpu.registers.pc {
|
||||
if cpu.registers.pc == 0x3367 {
|
||||
// Success!
|
||||
break;
|
||||
} else {
|
||||
assert!(false, "Trap detected");
|
||||
}
|
||||
}
|
||||
|
||||
last_pc = cpu.registers.pc;
|
||||
}
|
||||
*/
|
||||
|
||||
last_pc = cpu.registers.program_counter;
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user