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mirror of https://github.com/mre/mos6502.git synced 2024-11-25 02:33:26 +00:00

Rename machine to cpu and the crate to mos6502

This commit is contained in:
Matthias Endler 2017-11-13 23:34:31 +01:00
parent aa30ea6300
commit 6a9ce4e12e
5 changed files with 546 additions and 1860 deletions

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@ -26,17 +26,17 @@
# POSSIBILITY OF SUCH DAMAGE. # POSSIBILITY OF SUCH DAMAGE.
[package] [package]
name = "emu6502" name = "mos6502"
version = "0.0.1" version = "0.0.1"
authors = ["The 6502-rs Developers"] authors = ["The 6502-rs Developers"]
[lib] [lib]
# This will look in src/lib.rs # This will look in src/lib.rs
name = "emu6502" name = "mos6502"
[[bin]] [[bin]]
# This will look in src/bin/emu6502.rs # This will look in src/bin/mos6502.rs
name = "emu6502" name = "mos6502"
[dependencies] [dependencies]
bitflags = "0.9.1" bitflags = "0.9.1"

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@ -25,17 +25,17 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE. // POSSIBILITY OF SUCH DAMAGE.
extern crate emu6502; extern crate mos6502;
#[cfg(not(test))] #[cfg(not(test))]
use emu6502::machine; use mos6502::cpu;
#[cfg(not(test))] #[cfg(not(test))]
use emu6502::address::Address; use mos6502::address::Address;
#[cfg(not(test))] #[cfg(not(test))]
fn main() { fn main() {
let mut machine = machine::Machine::new(); let mut cpu = cpu::CPU::new();
// "Load" a program // "Load" a program
@ -67,51 +67,36 @@ fn main() {
// Code start // Code start
0xA9, // LDA Immediate 0xA9, // LDA Immediate
0x01, // Immediate operand 0x01, // Immediate operand
0x69, // ADC Immediate 0x69, // ADC Immediate
0x07, // Immediate operand 0x07, // Immediate operand
0x65, // ADC ZeroPage 0x65, // ADC ZeroPage
0x01, // ZeroPage operand 0x01, // ZeroPage operand
0xA2, // LDX Immediate 0xA2, // LDX Immediate
0x01, // Immediate operand 0x01, // Immediate operand
0x75, // ADC ZeroPageX 0x75, // ADC ZeroPageX
0x02, // ZeroPageX operand 0x02, // ZeroPageX operand
0x6D, // ADC Absolute 0x6D, // ADC Absolute
0x01, // Absolute operand 0x01, // Absolute operand
0x80, // Absolute operand 0x80, // Absolute operand
0xA2, // LDX immediate 0xA2, // LDX immediate
0x08, // Immediate operand 0x08, // Immediate operand
0x7D, // ADC AbsoluteX 0x7D, // ADC AbsoluteX
0x00, // AbsoluteX operand 0x00, // AbsoluteX operand
0x80, // AbsoluteX operand 0x80, // AbsoluteX operand
0xA0, // LDY immediate 0xA0, // LDY immediate
0x04, // Immediate operand 0x04, // Immediate operand
0x79, // ADC AbsoluteY 0x79, // ADC AbsoluteY
0x00, // AbsoluteY operand 0x00, // AbsoluteY operand
0x80, // AbsoluteY operand 0x80, // AbsoluteY operand
0xA2, // LDX immediate 0xA2, // LDX immediate
0x05, // Immediate operand 0x05, // Immediate operand
0x61, // ADC IndexedIndirectX 0x61, // ADC IndexedIndirectX
0x03, // IndexedIndirectX operand 0x03, // IndexedIndirectX operand
0xA0, // LDY immediate 0xA0, // LDY immediate
0x10, // Immediate operand 0x10, // Immediate operand
0x71, // ADC IndirectIndexedY 0x71, // ADC IndirectIndexedY
0x0F, // IndirectIndexedY operand 0x0F, // IndirectIndexedY operand
0xEA, // NOP :) 0xEA, // NOP :)
0xFF, // Something invalid -- the end! 0xFF, // Something invalid -- the end!
]; ];
@ -143,14 +128,13 @@ fn main() {
0x06, // ADC IndirectIndexedY target 0x06, // ADC IndirectIndexedY target
]; ];
machine.memory.set_bytes(Address(0x0000), &zero_page_data); cpu.memory.set_bytes(Address(0x0000), &zero_page_data);
machine.memory.set_bytes(Address(0x4000), &program); cpu.memory.set_bytes(Address(0x4000), &program);
machine.memory.set_bytes(Address(0x8000), &data); cpu.memory.set_bytes(Address(0x8000), &data);
machine.registers.program_counter = Address(0x4000); cpu.registers.program_counter = Address(0x4000);
machine.run(); cpu.run();
println!("{:?}", machine); println!("{:?}", cpu);
} }

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@ -27,7 +27,7 @@
use address::Address; use address::Address;
use address::AddressDiff; use address::AddressDiff;
use machine::Machine; use cpu::CPU;
// Abbreviations // Abbreviations
// //
@ -163,21 +163,19 @@ impl AddressingMode {
AddressDiff(x) AddressDiff(x)
} }
pub fn process(self, machine: &Machine, arr: &[u8]) -> OpInput { pub fn process(self, cpu: &CPU, arr: &[u8]) -> OpInput {
debug_assert!({ debug_assert!({
let AddressDiff(x) = self.extra_bytes(); let AddressDiff(x) = self.extra_bytes();
arr.len() == x as usize arr.len() == x as usize
}); });
let x = machine.registers.index_x as u8; let x = cpu.registers.index_x as u8;
let y = machine.registers.index_y as u8; let y = cpu.registers.index_y as u8;
let memory = &machine.memory; let memory = &cpu.memory;
match self { match self {
AddressingMode::Accumulator | AddressingMode::Accumulator | AddressingMode::Implied => {
AddressingMode::Implied => {
// Always the same -- no input // Always the same -- no input
OpInput::UseImplied OpInput::UseImplied
} }
@ -254,8 +252,7 @@ impl AddressingMode {
pub type DecodedInstr = (Instruction, OpInput); pub type DecodedInstr = (Instruction, OpInput);
pub static OPCODES: [Option<(Instruction, AddressingMode)>; 256] = pub static OPCODES: [Option<(Instruction, AddressingMode)>; 256] = [
[
/*0x00*/ /*0x00*/
Some((Instruction::BRK, AddressingMode::Implied)), Some((Instruction::BRK, AddressingMode::Implied)),
/*0x01*/ /*0x01*/

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@ -36,6 +36,6 @@ extern crate bitflags;
pub mod address; pub mod address;
pub mod instruction; pub mod instruction;
pub mod machine; pub mod cpu;
pub mod memory; pub mod memory;
pub mod registers; pub mod registers;

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