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mre-mos6502
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More stable future for this project. Change some casts from `as` to a `TYPE::from(x)` style so that the compile can warn us in the future for some things. 

See also https://rust-lang-nursery.github.io/rust-clippy/v0.0.212/index.html#cast_lossless
This commit is contained in:
Stefano Probst 2018-10-30 12:32:36 +01:00
parent 1301218e37
commit 7df3f75934
4 changed files with 18 additions and 19 deletions
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3
src/address.rs
View File

@ -42,8 +42,7 @@ impl Add<AddressDiff> for Address {
fn add(self, AddressDiff(rhs): AddressDiff) -> Address {
let Address(lhs) = self;
// TODO akeeton: Do a checked cast.
Address(((lhs as i32) + rhs) as u16)
Address(((i32::from(lhs)) + rhs) as u16)
}
}

14
src/cpu.rs
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@ -109,17 +109,17 @@ impl CPU {
}
(Instruction::BCC, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
self.branch_if_carry_clear(addr);
}
(Instruction::BCS, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
self.branch_if_carry_set(addr);
}
(Instruction::BEQ, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
self.branch_if_equal(addr);
}
@ -149,23 +149,23 @@ impl CPU {
}
(Instruction::BMI, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
debug!("branch if minus relative. address: {:?}", addr);
self.branch_if_minus(addr);
}
(Instruction::BPL, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
self.branch_if_positive(addr);
}
(Instruction::BVC, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
self.branch_if_overflow_clear(addr);
}
(Instruction::BVS, OpInput::UseRelative(rel)) => {
let addr = self.registers.program_counter + AddressDiff(rel as i32);
let addr = self.registers.program_counter + AddressDiff(i32::from(rel));
self.branch_if_overflow_set(addr);
}

18
src/instruction.rs
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@ -139,7 +139,7 @@ pub enum AddressingMode {
fn arr_to_addr(arr: &[u8]) -> Address {
debug_assert!(arr.len() == 2);
let x = (arr[0] as u16) + ((arr[1] as u16) << 8usize);
let x = u16::from(arr[0]) + (u16::from(arr[1]) << 8usize);
Address(x)
}
@ -187,19 +187,19 @@ impl AddressingMode {
// Use [u8, ..1] from instruction
// Interpret as zero page address
// (Output: an 8-bit zero-page address)
OpInput::UseAddress(Address(arr[0] as u16))
OpInput::UseAddress(Address(u16::from(arr[0])))
}
AddressingMode::ZeroPageX => {
// Use [u8, ..1] from instruction
// Add to X register (as u8 -- the final address is in 0-page)
// (Output: an 8-bit zero-page address)
OpInput::UseAddress(Address((arr[0] + x) as u16))
OpInput::UseAddress(Address(u16::from(arr[0] + x)))
}
AddressingMode::ZeroPageY => {
// Use [u8, ..1] from instruction
// Add to Y register (as u8 -- the final address is in 0-page)
// (Output: an 8-bit zero-page address)
OpInput::UseAddress(Address((arr[0] + y) as u16))
OpInput::UseAddress(Address(u16::from(arr[0] + y)))
}
AddressingMode::Relative => {
// Use [u8, ..1] from instruction
@ -214,12 +214,12 @@ impl AddressingMode {
AddressingMode::AbsoluteX => {
// Use [u8, ..2] from instruction as address, add X
// (Output: a 16-bit address)
OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(x as i32))
OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(i32::from(x)))
}
AddressingMode::AbsoluteY => {
// Use [u8, ..2] from instruction as address, add Y
// (Output: a 16-bit address)
OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(y as i32))
OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(i32::from(y)))
}
AddressingMode::Indirect => {
// Use [u8, ..2] from instruction as an address. Interpret the
@ -234,7 +234,7 @@ impl AddressingMode {
// This is where the absolute (16-bit) target address is stored.
// (Output: a 16-bit address)
let start = arr[0] + x;
let slice = memory.get_slice(Address(start as u16), AddressDiff(2));
let slice = memory.get_slice(Address(u16::from(start)), AddressDiff(2));
OpInput::UseAddress(arr_to_addr(slice))
}
AddressingMode::IndirectIndexedY => {
@ -243,8 +243,8 @@ impl AddressingMode {
// Add Y register to this address to get the final address
// (Output: a 16-bit address)
let start = arr[0];
let slice = memory.get_slice(Address(start as u16), AddressDiff(2));
OpInput::UseAddress(arr_to_addr(slice) + AddressDiff(y as i32))
let slice = memory.get_slice(Address(u16::from(start)), AddressDiff(2));
OpInput::UseAddress(arr_to_addr(slice) + AddressDiff(i32::from(y)))
}
}
}

2
src/registers.rs
View File

@ -146,7 +146,7 @@ pub struct StackPointer(pub u8);
impl StackPointer {
pub fn to_address(&self) -> Address {
let StackPointer(sp) = *self;
STACK_ADDRESS_LO + AddressDiff(sp as i32)
STACK_ADDRESS_LO + AddressDiff(i32::from(sp))
}
// JAM: FIXME: Should we prevent overflow here? What would a 6502 do?