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better commenting for Instruction enum

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Sam M W 2024-04-27 11:56:58 +01:00
parent 6a52e0e882
commit d51ae3057b
1 changed files with 194 additions and 85 deletions
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279
src/instruction.rs
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@ -25,93 +25,202 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE. // POSSIBILITY OF SUCH DAMAGE.
// Abbreviations
//
// General
//
// M | `Memory location`
//
// Registers
//
// A | accumulator
// X | general purpose register
// Y | general purpose register
// F | processor status flags, collectively
// NV-BDIZC | processor status flags, individually
// S | stack pointer
// PC | program counter
//
#[derive(Copy, Clone, Debug, PartialEq, Eq)] #[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum Instruction { pub enum Instruction {
ADC, // ADd with Carry................ | NV ...ZC A = A + M + C // ADd with Carry
ADCnd, // ADd with Carry................ | NV ...ZC A = A + M + C ADC,
AND, // logical AND (bitwise)......... | N. ...Z. A = A && M
ASL, // Arithmetic Shift Left......... | N. ...ZC A = M << 1 // ADd with Carry. This one has now decimal mode.
BCC, // Branch if Carry Clear......... | .. ..... PC = !C ADCnd,
BCS, // Branch if Carry Set........... | .. ..... PC = C
BEQ, // Branch if Equal (to zero?).... | .. ..... PC = Z // logical AND (bitwise)
BIT, // BIT test...................... | NV ...Z. = A & M AND,
BMI, // Branch if Minus............... | .. ..... PC = N
BNE, // Branch if Not Equal........... | .. ..... PC = !Z // Arithmetic Shift Left
BPL, // Branch if Positive............ | .. ..... PC = Z ASL,
BRA, // Unconditional BRAnch.......... | .. B.... S PC =
BRK, // BReaK......................... | .. B.... S PC = // Branch if Carry Clear
BRKcld, // BReaK, clearing decimal flag.. | .. BD... S PC = BCC,
BVC, // Branch if oVerflow Clear...... | .. ..... PC = !V
BVS, // Branch if oVerflow Set........ | .. ..... PC = V // Branch if Carry Set
CLC, // CLear Carry flag.............. | .. ....C = 0 BCS,
CLD, // Clear Decimal Mode............ | .. .D... = 0
CLI, // Clear Interrupt Disable....... | .. ..I.. = 0 // Branch if Equal (to zero?)
CLV, // Clear oVerflow flag........... | .V ..... = 0 BEQ,
CMP, // Compare....................... | N. ...ZC = A - M
CPX, // Compare X register............ | N. ...ZC = X - M // BIT test
CPY, // Compare Y register............ | N. ...ZC = Y - M BIT,
DEC, // DECrement memory.............. | N. ...Z. M = M - 1
DEX, // DEcrement X register.......... | N. ...Z. X = X - 1 // Branch if Minus
DEY, // DEcrement Y register.......... | N. ...Z. Y = Y - 1 BMI,
EOR, // Exclusive OR (bitwise)........ | N. ...Z. A = A ^ M
INC, // INCrement memory.............. | N. ...Z. M = M + 1 // Branch if Not Equal
INX, // INcrement X register.......... | N. ...Z. X = X + 1 BNE,
INY, // INcrement Y register.......... | N. ...Z. Y = Y + 1
JMP, // JuMP.......................... | .. ..... S PC = // Branch if Positive
JSR, // Jump to SubRoutine............ | .. ..... S PC = BPL,
LDA, // LoaD Accumulator.............. | N. ...Z. A = M
LDX, // LoaD X register............... | N. ...Z. X = M // Unconditional BRAnch
LDY, // LoaD Y register............... | N. ...Z. Y = M BRA,
LSR, // Logical Shift Right........... | N. ...ZC A = A/2
// or N. ...ZC M = M/2 // BReaK
NOP, // No OPeration.................. | .. ..... = BRK,
ORA, // inclusive OR (bitwise)........ | N. ...Z. A = A | M
PHA, // PusH Accumulator.............. | .. ..... S M = A // BReaK, clearing decimal flag
PHX, // PusH X........................ | .. ..... S M = A BRKcld,
PHY, // PusH Y........................ | .. ..... S M = A
PHP, // PusH Processor status......... | .. ..... S M = F // Branch if oVerflow Clear
PLA, // PuLl Accumulator.............. | N. ...Z. A S = M (stack) BVC,
PLX, // PuLl X........................ | N. ...Z. A S = M (stack)
PLY, // PuLl Y........................ | N. ...Z. A S = M (stack) // Branch if oVerflow Set
PLP, // PuLl Processor status......... | NV BDIZC S = M (stack) BVS,
ROL, // ROtate Left................... | N. ...ZC A = C A rotated
// or N. ...ZC M = C M rotated // CLear Carry flag
ROR, // ROtate Right.................. | N. ...ZC A = C A rotated CLC,
// or N. ...ZC M = C M rotated
RTI, // ReTurn from Interrupt......... | NV BDIZC PC = M (stack) // Clear Decimal Mode
RTS, // ReTurn from Subroutine........ | .. ..... PC = M (stack) CLD,
SBC, // SuBtract with Carry........... | NV ...ZC A = A-M-(1-C)
SBCnd, // SuBtract with Carry........... | NV ...ZC A = A-M-(1-C) // Clear Interrupt Disable
SEC, // SEt Carry flag................ | .. ....C = 1 CLI,
SED, // SEt Decimal flag.............. | .. .D... = 1
SEI, // SEt Interrupt disable......... | .. ..I.. = 1 // Clear oVerflow flag
STA, // STore Accumulator............. | .. ..... M = A CLV,
STX, // STore X register.............. | .. ..... M = X
STY, // STore Y register.............. | .. ..... M = Y // Compare
STZ, // STore Zero.................... | .. ..... M = Y CMP,
TAX, // Transfer Accumulator to X..... | N. ...Z. X = A
TAY, // Transfer Accumulator to Y..... | N. ...Z. Y = A // Compare X register
TSX, // Transfer Stack pointer to X... | N. ...Z. X = S CPX,
TXA, // Transfer X to Accumulator..... | N. ...Z. A = X
TXS, // Transfer X to Stack pointer... | .. ..... S = X // Compare Y register
TYA, // Transfer Y to Accumulator..... | N. ...Z. A = Y CPY,
// DECrement memory
DEC,
// DEcrement X register
DEX,
// DEcrement Y register
DEY,
// Exclusive OR (bitwise)
EOR,
// INCrement memory
INC,
// INcrement X register
INX,
// INcrement Y register
INY,
// JuMP
JMP,
// Jump to SubRoutine
JSR,
// LoaD Accumulator
LDA,
// LoaD X register
LDX,
// LoaD Y register
LDY,
// Logical Shift Right
LSR,
// No OPeration
NOP,
// inclusive OR (bitwise)
ORA,
// PusH Accumulator
PHA,
// PusH X
PHX,
// PusH Y
PHY,
// PusH Processor status
PHP,
// PuLl Accumulator
PLA,
// PuLl X
PLX,
// PuLl Y
PLY,
// PuLl Processor status
PLP,
// ROtate Left
ROL,
// ROtate Right
ROR,
// ReTurn from Interrupt
RTI,
// ReTurn from Subroutine
RTS,
// SuBtract with Carry
SBC,
// SuBtract with Carry. This one has now decimal mode.
SBCnd,
// SEt Carry flag
SEC,
// SEt Decimal flag
SED,
// SEt Interrupt disable
SEI,
// STore Accumulator
STA,
// STore X register
STX,
// STore Y register
STY,
// STore Zero
STZ,
// Transfer Accumulator to X
TAX,
// Transfer Accumulator to Y
TAY,
// Transfer Stack pointer to X
TSX,
// Transfer X to Accumulator
TXA,
// Transfer X to Stack pointer
TXS,
// Transfer Y to Accumulator
TYA,
} }
#[derive(Copy, Clone)] #[derive(Copy, Clone)]