From da30c8c67d9b07639f190982b510c4265a946eee Mon Sep 17 00:00:00 2001
From: Sam M W <you@example.com>
Date: Tue, 23 Apr 2024 17:06:00 +0100
Subject: [PATCH] change arr_to_addr to address_from_bytes

---
 src/cpu.rs | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/src/cpu.rs b/src/cpu.rs
index dea2f5f..f01bced 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -31,10 +31,9 @@ use crate::Variant;
 
 use crate::registers::{Registers, StackPointer, Status, StatusArgs};
 
-fn arr_to_addr(arr: &[u8]) -> u16 {
-    debug_assert!(arr.len() == 2);
+fn address_from_bytes(lo: u8, hi: u8) -> u16 {
 
-    u16::from(arr[0]) + (u16::from(arr[1]) << 8usize)
+    u16::from(lo) + (u16::from(hi) << 8usize)
 }
 
 #[derive(Clone)]
@@ -136,17 +135,17 @@ impl<M: Bus, V: Variant> CPU<M, V> {
                     AddressingMode::Absolute => {
                         // Use [u8, ..2] from instruction as address
                         // (Output: a 16-bit address)
-                        OpInput::UseAddress(arr_to_addr(&slice))
+                        OpInput::UseAddress(address_from_bytes(slice[0], slice[1]))
                     }
                     AddressingMode::AbsoluteX => {
                         // Use [u8, ..2] from instruction as address, add X
                         // (Output: a 16-bit address)
-                        OpInput::UseAddress(arr_to_addr(&slice).wrapping_add(x.into()))
+                        OpInput::UseAddress(address_from_bytes(slice[0], slice[1]).wrapping_add(x.into()))
                     }
                     AddressingMode::AbsoluteY => {
                         // Use [u8, ..2] from instruction as address, add Y
                         // (Output: a 16-bit address)
-                        OpInput::UseAddress(arr_to_addr(&slice).wrapping_add(y.into()))
+                        OpInput::UseAddress(address_from_bytes(slice[0], slice[1]).wrapping_add(y.into()))
                     }
                     AddressingMode::Indirect => {
                         // Use [u8, ..2] from instruction as an address. Interpret the
@@ -162,7 +161,7 @@ impl<M: Bus, V: Variant> CPU<M, V> {
                         // (Output: a 16-bit address)
                         let start = slice[0].wrapping_add(x);
                         let slice = read_address(memory, u16::from(start));
-                        OpInput::UseAddress(arr_to_addr(&slice))
+                        OpInput::UseAddress(address_from_bytes(slice[0], slice[1]))
                     }
                     AddressingMode::IndirectIndexedY => {
                         // Use [u8, ..1] from instruction
@@ -171,7 +170,7 @@ impl<M: Bus, V: Variant> CPU<M, V> {
                         // (Output: a 16-bit address)
                         let start = slice[0];
                         let slice = read_address(memory, u16::from(start));
-                        OpInput::UseAddress(arr_to_addr(&slice).wrapping_add(y.into()))
+                        OpInput::UseAddress(address_from_bytes(slice[0], slice[1]).wrapping_add(y.into()))
                     }
                 };