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cargo fmt
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parent
917db51f89
commit
e31382412a
11
src/cpu.rs
11
src/cpu.rs
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@ -698,11 +698,7 @@ impl<M: Bus> CPU<M> {
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fn add_with_carry(&mut self, value: u8) {
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fn add_with_carry(&mut self, value: u8) {
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#[cfg(feature = "decimal_mode")]
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#[cfg(feature = "decimal_mode")]
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fn decimal_adjust(result: u8) -> u8 {
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fn decimal_adjust(result: u8) -> u8 {
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let bcd1: u8 = if (result & 0x0f) > 0x09 {
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let bcd1: u8 = if (result & 0x0f) > 0x09 { 0x06 } else { 0x00 };
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0x06
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} else {
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0x00
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};
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let bcd2: u8 = if (result.wrapping_add(bcd1) & 0xf0) > 0x90 {
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let bcd2: u8 = if (result.wrapping_add(bcd1) & 0xf0) > 0x90 {
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0x60
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0x60
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@ -717,10 +713,7 @@ impl<M: Bus> CPU<M> {
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let c_before: u8 = u8::from(self.registers.status.contains(Status::PS_CARRY));
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let c_before: u8 = u8::from(self.registers.status.contains(Status::PS_CARRY));
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let a_after: u8 = a_before.wrapping_add(c_before).wrapping_add(value);
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let a_after: u8 = a_before.wrapping_add(c_before).wrapping_add(value);
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debug_assert_eq!(
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debug_assert_eq!(a_after, a_before.wrapping_add(c_before).wrapping_add(value));
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a_after,
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a_before.wrapping_add(c_before).wrapping_add(value)
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);
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#[cfg(feature = "decimal_mode")]
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#[cfg(feature = "decimal_mode")]
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let result: u8 = if self.registers.status.contains(Status::PS_DECIMAL_MODE) {
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let result: u8 = if self.registers.status.contains(Status::PS_DECIMAL_MODE) {
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