From f3f15de8cc8c7d39fe47efe9385a7d3909a82e80 Mon Sep 17 00:00:00 2001 From: Sam M W Date: Mon, 3 Apr 2023 05:47:29 +0100 Subject: [PATCH] remove memory.get_slice real hardware won't have the ability to dive in and grab a slice from memory --- src/cpu.rs | 16 ++++++++++++++-- src/instruction.rs | 19 +++++++++++++------ src/memory.rs | 7 ------- 3 files changed, 27 insertions(+), 15 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index c4208bc..6de3598 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -63,8 +63,20 @@ impl CPU { let data_start = self.registers.program_counter.wrapping_add(1); - let slice = self.memory.get_slice(data_start, extra_bytes); - let am_out = am.process(self, slice); + let slice = if extra_bytes == 0 { + [0, 0] + } else if extra_bytes == 1 { + [self.memory.get_byte(data_start), 0] + } else if extra_bytes == 2 { + [ + self.memory.get_byte(data_start), + self.memory.get_byte(data_start.wrapping_add(1)), + ] + } else { + panic!() + }; + + let am_out = am.process(self, &slice[..extra_bytes as usize]); // Increment program counter self.registers.program_counter = diff --git a/src/instruction.rs b/src/instruction.rs index 7ba88d1..b755d05 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -26,6 +26,7 @@ // POSSIBILITY OF SUCH DAMAGE. use crate::cpu::CPU; +use crate::memory::Memory; // Abbreviations // @@ -171,6 +172,12 @@ impl AddressingMode { let memory = &cpu.memory; + fn read_address(mem: &Memory, addr: u16) -> [u8; 2] { + let lo = mem.get_byte(addr); + let hi = mem.get_byte(addr.wrapping_add(1)); + [lo, hi] + } + match self { AddressingMode::Accumulator | AddressingMode::Implied => { // Always the same -- no input @@ -227,8 +234,8 @@ impl AddressingMode { // Use [u8, ..2] from instruction as an address. Interpret the // two bytes starting at that address as an address. // (Output: a 16-bit address) - let slice = memory.get_slice(arr_to_addr(arr), 2); - OpInput::UseAddress(arr_to_addr(slice)) + let slice = read_address(memory, arr_to_addr(arr)); + OpInput::UseAddress(arr_to_addr(&slice)) } AddressingMode::IndexedIndirectX => { // Use [u8, ..1] from instruction @@ -236,8 +243,8 @@ impl AddressingMode { // This is where the absolute (16-bit) target address is stored. // (Output: a 16-bit address) let start = arr[0].wrapping_add(x); - let slice = memory.get_slice(u16::from(start), 2); - OpInput::UseAddress(arr_to_addr(slice)) + let slice = read_address(memory, u16::from(start)); + OpInput::UseAddress(arr_to_addr(&slice)) } AddressingMode::IndirectIndexedY => { // Use [u8, ..1] from instruction @@ -245,8 +252,8 @@ impl AddressingMode { // Add Y register to this address to get the final address // (Output: a 16-bit address) let start = arr[0]; - let slice = memory.get_slice(u16::from(start), 2); - OpInput::UseAddress(arr_to_addr(slice).wrapping_add(xextend(y))) + let slice = read_address(memory, u16::from(start)); + OpInput::UseAddress(arr_to_addr(&slice).wrapping_add(xextend(y))) } } } diff --git a/src/memory.rs b/src/memory.rs index 4428978..c4f9535 100644 --- a/src/memory.rs +++ b/src/memory.rs @@ -69,13 +69,6 @@ impl Memory { self.bytes[address as usize] } - pub fn get_slice(&self, start: u16, diff: u16) -> &[u8] { - let orig: usize = start.into(); - let end = orig + diff as usize; - - &self.bytes[orig..end] - } - // Sets the byte at the given address to the given value and returns the // previous value at the address. pub fn set_byte(&mut self, address: u16, value: u8) -> u8 {