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https://github.com/mre/mos6502.git
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add a single variant: the NMOS one
This commit is contained in:
Sam M W
parent
4a2d15f8a7
commit
f4d88c7bf0
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@ -154,519 +154,267 @@ impl AddressingMode {
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pub type DecodedInstr = (Instruction, OpInput);
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/*
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pub static OPCODES: [Option<(Instruction, AddressingMode)>; 256] = [
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//0x00
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Some((Instruction::BRK, AddressingMode::Implied)),
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//0x01
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Some((Instruction::ORA, AddressingMode::IndexedIndirectX)),
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//0x02
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None,
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//0x03
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None,
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//0x04
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None,
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//0x05
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Some((Instruction::ORA, AddressingMode::ZeroPage)),
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//0x06
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Some((Instruction::ASL, AddressingMode::ZeroPage)),
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//0x07
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None,
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//0x08
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Some((Instruction::PHP, AddressingMode::Implied)),
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//0x09
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Some((Instruction::ORA, AddressingMode::Immediate)),
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//0x0A
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Some((Instruction::ASL, AddressingMode::Accumulator)),
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//0x0B
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None,
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//0x0C
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None,
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//0x0D
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Some((Instruction::ORA, AddressingMode::Absolute)),
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//0x0E
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Some((Instruction::ASL, AddressingMode::Absolute)),
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//0x0F
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None,
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//0x10
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Some((Instruction::BPL, AddressingMode::Relative)),
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//0x11
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Some((Instruction::ORA, AddressingMode::IndirectIndexedY)),
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//0x12
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None,
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//0x13
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None,
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//0x14
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None,
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//0x15
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Some((Instruction::ORA, AddressingMode::ZeroPageX)),
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//0x16
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Some((Instruction::ASL, AddressingMode::ZeroPageX)),
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//0x17
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None,
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//0x18
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Some((Instruction::CLC, AddressingMode::Implied)),
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//0x19
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Some((Instruction::ORA, AddressingMode::AbsoluteY)),
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//0x1A
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None,
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//0x1B
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None,
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//0x1C
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None,
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//0x1D
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Some((Instruction::ORA, AddressingMode::AbsoluteX)),
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//0x1E
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Some((Instruction::ASL, AddressingMode::AbsoluteX)),
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//0x1F
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None,
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//0x20
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Some((Instruction::JSR, AddressingMode::Absolute)),
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//0x21
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Some((Instruction::AND, AddressingMode::IndexedIndirectX)),
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//0x22
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None,
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//0x23
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None,
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//0x24
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Some((Instruction::BIT, AddressingMode::ZeroPage)),
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//0x25
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Some((Instruction::AND, AddressingMode::ZeroPage)),
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//0x26
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Some((Instruction::ROL, AddressingMode::ZeroPage)),
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//0x27
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None,
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//0x28
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Some((Instruction::PLP, AddressingMode::Implied)),
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//0x29
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Some((Instruction::AND, AddressingMode::Immediate)),
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//0x2A
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Some((Instruction::ROL, AddressingMode::Accumulator)),
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//0x2B
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None,
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//0x2C
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Some((Instruction::BIT, AddressingMode::Absolute)),
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//0x2D
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Some((Instruction::AND, AddressingMode::Absolute)),
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//0x2E
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Some((Instruction::ROL, AddressingMode::Absolute)),
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//0x2F
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None,
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//0x30
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Some((Instruction::BMI, AddressingMode::Relative)),
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//0x31
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Some((Instruction::AND, AddressingMode::IndirectIndexedY)),
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//0x32
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None,
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//0x33
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None,
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//0x34
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None,
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//0x35
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Some((Instruction::AND, AddressingMode::ZeroPageX)),
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//0x36
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Some((Instruction::ROL, AddressingMode::ZeroPageX)),
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//0x37
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None,
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//0x38
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Some((Instruction::SEC, AddressingMode::Implied)),
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//0x39
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Some((Instruction::AND, AddressingMode::AbsoluteY)),
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//0x3A
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None,
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//0x3B
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None,
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//0x3C
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None,
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//0x3D
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Some((Instruction::AND, AddressingMode::AbsoluteX)),
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//0x3E
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Some((Instruction::ROL, AddressingMode::AbsoluteX)),
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//0x3F
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None,
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//0x40
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Some((Instruction::RTI, AddressingMode::Implied)),
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//0x41
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Some((Instruction::EOR, AddressingMode::IndexedIndirectX)),
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//0x42
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None,
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//0x43
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None,
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//0x44
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None,
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//0x45
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Some((Instruction::EOR, AddressingMode::ZeroPage)),
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//0x46
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Some((Instruction::LSR, AddressingMode::ZeroPage)),
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//0x47
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None,
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//0x48
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Some((Instruction::PHA, AddressingMode::Implied)),
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//0x49
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Some((Instruction::EOR, AddressingMode::Immediate)),
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//0x4A
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Some((Instruction::LSR, AddressingMode::Accumulator)),
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//0x4B
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None,
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//0x4C
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Some((Instruction::JMP, AddressingMode::Absolute)),
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//0x4D
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Some((Instruction::EOR, AddressingMode::Absolute)),
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//0x4E
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Some((Instruction::LSR, AddressingMode::Absolute)),
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//0x4F
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None,
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//0x50
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Some((Instruction::BVC, AddressingMode::Relative)),
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//0x51
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Some((Instruction::EOR, AddressingMode::IndirectIndexedY)),
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//0x52
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None,
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//0x53
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None,
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//0x54
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None,
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//0x55
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Some((Instruction::EOR, AddressingMode::ZeroPageX)),
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//0x56
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Some((Instruction::LSR, AddressingMode::ZeroPageX)),
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//0x57
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None,
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//0x58
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Some((Instruction::CLI, AddressingMode::Implied)),
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//0x59
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Some((Instruction::EOR, AddressingMode::AbsoluteY)),
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//0x5A
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None,
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//0x5B
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None,
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//0x5C
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None,
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//0x5D
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Some((Instruction::EOR, AddressingMode::AbsoluteX)),
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//0x5E
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Some((Instruction::LSR, AddressingMode::AbsoluteX)),
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//0x5F
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None,
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//0x60
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Some((Instruction::RTS, AddressingMode::Implied)),
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//0x61
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Some((Instruction::ADC, AddressingMode::IndexedIndirectX)),
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//0x62
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None,
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//0x63
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None,
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//0x64
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None,
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//0x65
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Some((Instruction::ADC, AddressingMode::ZeroPage)),
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//0x66
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Some((Instruction::ROR, AddressingMode::ZeroPage)),
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//0x67
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None,
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//0x68
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Some((Instruction::PLA, AddressingMode::Implied)),
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//0x69
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Some((Instruction::ADC, AddressingMode::Immediate)),
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//0x6A
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Some((Instruction::ROR, AddressingMode::Accumulator)),
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//0x6B
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None,
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//0x6C
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Some((Instruction::JMP, AddressingMode::Indirect)),
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//0x6D
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Some((Instruction::ADC, AddressingMode::Absolute)),
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//0x6E
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Some((Instruction::ROR, AddressingMode::Absolute)),
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//0x6F
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None,
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//0x70
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Some((Instruction::BVS, AddressingMode::Relative)),
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//0x71
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Some((Instruction::ADC, AddressingMode::IndirectIndexedY)),
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//0x72
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None,
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//0x73
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None,
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//0x74
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None,
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//0x75
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Some((Instruction::ADC, AddressingMode::ZeroPageX)),
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//0x76
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Some((Instruction::ROR, AddressingMode::ZeroPageX)),
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//0x77
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None,
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//0x78
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Some((Instruction::SEI, AddressingMode::Implied)),
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//0x79
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Some((Instruction::ADC, AddressingMode::AbsoluteY)),
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//0x7A
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None,
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//0x7B
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None,
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//0x7C
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None,
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//0x7D
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Some((Instruction::ADC, AddressingMode::AbsoluteX)),
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//0x7E
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Some((Instruction::ROR, AddressingMode::AbsoluteX)),
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//0x7F
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None,
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//0x80
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None,
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//0x81
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Some((Instruction::STA, AddressingMode::IndexedIndirectX)),
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//0x82
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None,
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//0x83
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None,
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//0x84
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Some((Instruction::STY, AddressingMode::ZeroPage)),
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//0x85
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Some((Instruction::STA, AddressingMode::ZeroPage)),
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//0x86
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Some((Instruction::STX, AddressingMode::ZeroPage)),
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//0x87
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None,
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//0x88
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Some((Instruction::DEY, AddressingMode::Implied)),
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//0x89
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None,
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//0x8A
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Some((Instruction::TXA, AddressingMode::Implied)),
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//0x8B
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None,
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//0x8C
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Some((Instruction::STY, AddressingMode::Absolute)),
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//0x8D
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Some((Instruction::STA, AddressingMode::Absolute)),
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//0x8E
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Some((Instruction::STX, AddressingMode::Absolute)),
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//0x8F
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None,
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//0x90
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Some((Instruction::BCC, AddressingMode::Relative)),
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//0x91
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Some((Instruction::STA, AddressingMode::IndirectIndexedY)),
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//0x92
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None,
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//0x93
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None,
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//0x94
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Some((Instruction::STY, AddressingMode::ZeroPageX)),
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//0x95
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Some((Instruction::STA, AddressingMode::ZeroPageX)),
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//0x96
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Some((Instruction::STX, AddressingMode::ZeroPageY)),
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//0x97
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None,
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//0x98
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Some((Instruction::TYA, AddressingMode::Implied)),
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//0x99
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Some((Instruction::STA, AddressingMode::AbsoluteY)),
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//0x9A
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Some((Instruction::TXS, AddressingMode::Implied)),
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//0x9B
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None,
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//0x9C
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None,
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//0x9D
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Some((Instruction::STA, AddressingMode::AbsoluteX)),
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//0x9E
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None,
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//0x9F
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None,
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//0xA0
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Some((Instruction::LDY, AddressingMode::Immediate)),
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//0xA1
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Some((Instruction::LDA, AddressingMode::IndexedIndirectX)),
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//0xA2
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Some((Instruction::LDX, AddressingMode::Immediate)),
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//0xA3
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None,
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//0xA4
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Some((Instruction::LDY, AddressingMode::ZeroPage)),
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//0xA5
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Some((Instruction::LDA, AddressingMode::ZeroPage)),
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//0xA6
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Some((Instruction::LDX, AddressingMode::ZeroPage)),
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//0xA7
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None,
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//0xA8
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Some((Instruction::TAY, AddressingMode::Implied)),
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//0xA9
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Some((Instruction::LDA, AddressingMode::Immediate)),
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//0xAA
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Some((Instruction::TAX, AddressingMode::Implied)),
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//0xAB
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None,
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//0xAC
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Some((Instruction::LDY, AddressingMode::Absolute)),
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//0xAD
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Some((Instruction::LDA, AddressingMode::Absolute)),
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//0xAE
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Some((Instruction::LDX, AddressingMode::Absolute)),
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//0xAF
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None,
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//0xB0
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Some((Instruction::BCS, AddressingMode::Relative)),
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//0xB1
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Some((Instruction::LDA, AddressingMode::IndirectIndexedY)),
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//0xB2
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None,
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//0xB3
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None,
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//0xB4
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Some((Instruction::LDY, AddressingMode::ZeroPageX)),
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//0xB5
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Some((Instruction::LDA, AddressingMode::ZeroPageX)),
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//0xB6
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Some((Instruction::LDX, AddressingMode::ZeroPageY)),
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//0xB7
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None,
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//0xB8
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Some((Instruction::CLV, AddressingMode::Implied)),
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//0xB9
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Some((Instruction::LDA, AddressingMode::AbsoluteY)),
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//0xBA
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Some((Instruction::TSX, AddressingMode::Implied)),
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//0xBB
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None,
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//0xBC
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Some((Instruction::LDY, AddressingMode::AbsoluteX)),
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//0xBD
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Some((Instruction::LDA, AddressingMode::AbsoluteX)),
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//0xBE
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Some((Instruction::LDX, AddressingMode::AbsoluteY)),
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//0xBF
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None,
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//0xC0
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Some((Instruction::CPY, AddressingMode::Immediate)),
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//0xC1
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Some((Instruction::CMP, AddressingMode::IndexedIndirectX)),
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//0xC2
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None,
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//0xC3
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None,
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//0xC4
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Some((Instruction::CPY, AddressingMode::ZeroPage)),
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//0xC5
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Some((Instruction::CMP, AddressingMode::ZeroPage)),
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//0xC6
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Some((Instruction::DEC, AddressingMode::ZeroPage)),
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//0xC7
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None,
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//0xC8
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Some((Instruction::INY, AddressingMode::Implied)),
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//0xC9
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Some((Instruction::CMP, AddressingMode::Immediate)),
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//0xCA
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Some((Instruction::DEX, AddressingMode::Implied)),
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//0xCB
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None,
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//0xCC
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Some((Instruction::CPY, AddressingMode::Absolute)),
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//0xCD
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Some((Instruction::CMP, AddressingMode::Absolute)),
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//0xCE
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Some((Instruction::DEC, AddressingMode::Absolute)),
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//0xCF
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None,
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//0xD0
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Some((Instruction::BNE, AddressingMode::Relative)),
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//0xD1
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Some((Instruction::CMP, AddressingMode::IndirectIndexedY)),
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//0xD2
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None,
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//0xD3
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None,
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//0xD4
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None,
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//0xD5
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Some((Instruction::CMP, AddressingMode::ZeroPageX)),
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//0xD6
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Some((Instruction::DEC, AddressingMode::ZeroPageX)),
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//0xD7
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None,
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//0xD8
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Some((Instruction::CLD, AddressingMode::Implied)),
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//0xD9
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Some((Instruction::CMP, AddressingMode::AbsoluteY)),
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//0xDA
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None,
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//0xDB
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None,
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//0xDC
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None,
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//0xDD
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Some((Instruction::CMP, AddressingMode::AbsoluteX)),
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//0xDE
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Some((Instruction::DEC, AddressingMode::AbsoluteX)),
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//0xDF
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None,
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//0xE0
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Some((Instruction::CPX, AddressingMode::Immediate)),
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//0xE1
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Some((Instruction::SBC, AddressingMode::IndexedIndirectX)),
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//0xE2
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None,
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//0xE3
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None,
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//0xE4
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Some((Instruction::CPX, AddressingMode::ZeroPage)),
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//0xE5
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Some((Instruction::SBC, AddressingMode::ZeroPage)),
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//0xE6
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Some((Instruction::INC, AddressingMode::ZeroPage)),
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//0xE7
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None,
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//0xE8
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Some((Instruction::INX, AddressingMode::Implied)),
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//0xE9
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Some((Instruction::SBC, AddressingMode::Immediate)),
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//0xEA
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Some((Instruction::NOP, AddressingMode::Implied)),
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//0xEB
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None,
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//0xEC
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Some((Instruction::CPX, AddressingMode::Absolute)),
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//0xED
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Some((Instruction::SBC, AddressingMode::Absolute)),
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//0xEE
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Some((Instruction::INC, AddressingMode::Absolute)),
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//0xEF
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None,
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//0xF0
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Some((Instruction::BEQ, AddressingMode::Relative)),
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//0xF1
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Some((Instruction::SBC, AddressingMode::IndirectIndexedY)),
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//0xF2
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None,
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//0xF3
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None,
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//0xF4
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None,
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//0xF5
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Some((Instruction::SBC, AddressingMode::ZeroPageX)),
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//0xF6
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Some((Instruction::INC, AddressingMode::ZeroPageX)),
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//0xF7
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None,
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//0xF8
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Some((Instruction::SED, AddressingMode::Implied)),
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//0xF9
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||||
Some((Instruction::SBC, AddressingMode::AbsoluteY)),
|
||||
//0xFA
|
||||
None,
|
||||
//0xFB
|
||||
None,
|
||||
//0xFC
|
||||
None,
|
||||
//0xFD
|
||||
Some((Instruction::SBC, AddressingMode::AbsoluteX)),
|
||||
//0xFE
|
||||
Some((Instruction::INC, AddressingMode::AbsoluteX)),
|
||||
//0xFF
|
||||
None,
|
||||
];
|
||||
*/
|
||||
pub struct Nmos6502;
|
||||
|
||||
impl crate::Variant for Nmos6502 {
|
||||
fn decode(opcode: u8) -> Option<(Instruction, AddressingMode)> {
|
||||
match opcode {
|
||||
0x00 => Some((Instruction::BRK, AddressingMode::Implied)),
|
||||
0x01 => Some((Instruction::ORA, AddressingMode::IndexedIndirectX)),
|
||||
0x02 => None,
|
||||
0x03 => None,
|
||||
0x04 => None,
|
||||
0x05 => Some((Instruction::ORA, AddressingMode::ZeroPage)),
|
||||
0x06 => Some((Instruction::ASL, AddressingMode::ZeroPage)),
|
||||
0x07 => None,
|
||||
0x08 => Some((Instruction::PHP, AddressingMode::Implied)),
|
||||
0x09 => Some((Instruction::ORA, AddressingMode::Immediate)),
|
||||
0x0a => Some((Instruction::ASL, AddressingMode::Accumulator)),
|
||||
0x0b => None,
|
||||
0x0c => None,
|
||||
0x0d => Some((Instruction::ORA, AddressingMode::Absolute)),
|
||||
0x0e => Some((Instruction::ASL, AddressingMode::Absolute)),
|
||||
0x0f => None,
|
||||
0x10 => Some((Instruction::BPL, AddressingMode::Relative)),
|
||||
0x11 => Some((Instruction::ORA, AddressingMode::IndirectIndexedY)),
|
||||
0x12 => None,
|
||||
0x13 => None,
|
||||
0x14 => None,
|
||||
0x15 => Some((Instruction::ORA, AddressingMode::ZeroPageX)),
|
||||
0x16 => Some((Instruction::ASL, AddressingMode::ZeroPageX)),
|
||||
0x17 => None,
|
||||
0x18 => Some((Instruction::CLC, AddressingMode::Implied)),
|
||||
0x19 => Some((Instruction::ORA, AddressingMode::AbsoluteY)),
|
||||
0x1a => None,
|
||||
0x1b => None,
|
||||
0x1c => None,
|
||||
0x1d => Some((Instruction::ORA, AddressingMode::AbsoluteX)),
|
||||
0x1e => Some((Instruction::ASL, AddressingMode::AbsoluteX)),
|
||||
0x1f => None,
|
||||
0x20 => Some((Instruction::JSR, AddressingMode::Absolute)),
|
||||
0x21 => Some((Instruction::AND, AddressingMode::IndexedIndirectX)),
|
||||
0x22 => None,
|
||||
0x23 => None,
|
||||
0x24 => Some((Instruction::BIT, AddressingMode::ZeroPage)),
|
||||
0x25 => Some((Instruction::AND, AddressingMode::ZeroPage)),
|
||||
0x26 => Some((Instruction::ROL, AddressingMode::ZeroPage)),
|
||||
0x27 => None,
|
||||
0x28 => Some((Instruction::PLP, AddressingMode::Implied)),
|
||||
0x29 => Some((Instruction::AND, AddressingMode::Immediate)),
|
||||
0x2a => Some((Instruction::ROL, AddressingMode::Accumulator)),
|
||||
0x2b => None,
|
||||
0x2c => Some((Instruction::BIT, AddressingMode::Absolute)),
|
||||
0x2d => Some((Instruction::AND, AddressingMode::Absolute)),
|
||||
0x2e => Some((Instruction::ROL, AddressingMode::Absolute)),
|
||||
0x2f => None,
|
||||
0x30 => Some((Instruction::BMI, AddressingMode::Relative)),
|
||||
0x31 => Some((Instruction::AND, AddressingMode::IndirectIndexedY)),
|
||||
0x32 => None,
|
||||
0x33 => None,
|
||||
0x34 => None,
|
||||
0x35 => Some((Instruction::AND, AddressingMode::ZeroPageX)),
|
||||
0x36 => Some((Instruction::ROL, AddressingMode::ZeroPageX)),
|
||||
0x37 => None,
|
||||
0x38 => Some((Instruction::SEC, AddressingMode::Implied)),
|
||||
0x39 => Some((Instruction::AND, AddressingMode::AbsoluteY)),
|
||||
0x3a => None,
|
||||
0x3b => None,
|
||||
0x3c => None,
|
||||
0x3d => Some((Instruction::AND, AddressingMode::AbsoluteX)),
|
||||
0x3e => Some((Instruction::ROL, AddressingMode::AbsoluteX)),
|
||||
0x3f => None,
|
||||
0x40 => Some((Instruction::RTI, AddressingMode::Implied)),
|
||||
0x41 => Some((Instruction::EOR, AddressingMode::IndexedIndirectX)),
|
||||
0x42 => None,
|
||||
0x43 => None,
|
||||
0x44 => None,
|
||||
0x45 => Some((Instruction::EOR, AddressingMode::ZeroPage)),
|
||||
0x46 => Some((Instruction::LSR, AddressingMode::ZeroPage)),
|
||||
0x47 => None,
|
||||
0x48 => Some((Instruction::PHA, AddressingMode::Implied)),
|
||||
0x49 => Some((Instruction::EOR, AddressingMode::Immediate)),
|
||||
0x4a => Some((Instruction::LSR, AddressingMode::Accumulator)),
|
||||
0x4b => None,
|
||||
0x4c => Some((Instruction::JMP, AddressingMode::Absolute)),
|
||||
0x4d => Some((Instruction::EOR, AddressingMode::Absolute)),
|
||||
0x4e => Some((Instruction::LSR, AddressingMode::Absolute)),
|
||||
0x4f => None,
|
||||
0x50 => Some((Instruction::BVC, AddressingMode::Relative)),
|
||||
0x51 => Some((Instruction::EOR, AddressingMode::IndirectIndexedY)),
|
||||
0x52 => None,
|
||||
0x53 => None,
|
||||
0x54 => None,
|
||||
0x55 => Some((Instruction::EOR, AddressingMode::ZeroPageX)),
|
||||
0x56 => Some((Instruction::LSR, AddressingMode::ZeroPageX)),
|
||||
0x57 => None,
|
||||
0x58 => Some((Instruction::CLI, AddressingMode::Implied)),
|
||||
0x59 => Some((Instruction::EOR, AddressingMode::AbsoluteY)),
|
||||
0x5a => None,
|
||||
0x5b => None,
|
||||
0x5c => None,
|
||||
0x5d => Some((Instruction::EOR, AddressingMode::AbsoluteX)),
|
||||
0x5e => Some((Instruction::LSR, AddressingMode::AbsoluteX)),
|
||||
0x5f => None,
|
||||
0x60 => Some((Instruction::RTS, AddressingMode::Implied)),
|
||||
0x61 => Some((Instruction::ADC, AddressingMode::IndexedIndirectX)),
|
||||
0x62 => None,
|
||||
0x63 => None,
|
||||
0x64 => None,
|
||||
0x65 => Some((Instruction::ADC, AddressingMode::ZeroPage)),
|
||||
0x66 => Some((Instruction::ROR, AddressingMode::ZeroPage)),
|
||||
0x67 => None,
|
||||
0x68 => Some((Instruction::PLA, AddressingMode::Implied)),
|
||||
0x69 => Some((Instruction::ADC, AddressingMode::Immediate)),
|
||||
0x6a => Some((Instruction::ROR, AddressingMode::Accumulator)),
|
||||
0x6b => None,
|
||||
0x6c => Some((Instruction::JMP, AddressingMode::Indirect)),
|
||||
0x6d => Some((Instruction::ADC, AddressingMode::Absolute)),
|
||||
0x6e => Some((Instruction::ROR, AddressingMode::Absolute)),
|
||||
0x6f => None,
|
||||
0x70 => Some((Instruction::BVS, AddressingMode::Relative)),
|
||||
0x71 => Some((Instruction::ADC, AddressingMode::IndirectIndexedY)),
|
||||
0x72 => None,
|
||||
0x73 => None,
|
||||
0x74 => None,
|
||||
0x75 => Some((Instruction::ADC, AddressingMode::ZeroPageX)),
|
||||
0x76 => Some((Instruction::ROR, AddressingMode::ZeroPageX)),
|
||||
0x77 => None,
|
||||
0x78 => Some((Instruction::SEI, AddressingMode::Implied)),
|
||||
0x79 => Some((Instruction::ADC, AddressingMode::AbsoluteY)),
|
||||
0x7a => None,
|
||||
0x7b => None,
|
||||
0x7c => None,
|
||||
0x7d => Some((Instruction::ADC, AddressingMode::AbsoluteX)),
|
||||
0x7e => Some((Instruction::ROR, AddressingMode::AbsoluteX)),
|
||||
0x7f => None,
|
||||
0x80 => None,
|
||||
0x81 => Some((Instruction::STA, AddressingMode::IndexedIndirectX)),
|
||||
0x82 => None,
|
||||
0x83 => None,
|
||||
0x84 => Some((Instruction::STY, AddressingMode::ZeroPage)),
|
||||
0x85 => Some((Instruction::STA, AddressingMode::ZeroPage)),
|
||||
0x86 => Some((Instruction::STX, AddressingMode::ZeroPage)),
|
||||
0x87 => None,
|
||||
0x88 => Some((Instruction::DEY, AddressingMode::Implied)),
|
||||
0x89 => None,
|
||||
0x8a => Some((Instruction::TXA, AddressingMode::Implied)),
|
||||
0x8b => None,
|
||||
0x8c => Some((Instruction::STY, AddressingMode::Absolute)),
|
||||
0x8d => Some((Instruction::STA, AddressingMode::Absolute)),
|
||||
0x8e => Some((Instruction::STX, AddressingMode::Absolute)),
|
||||
0x8f => None,
|
||||
0x90 => Some((Instruction::BCC, AddressingMode::Relative)),
|
||||
0x91 => Some((Instruction::STA, AddressingMode::IndirectIndexedY)),
|
||||
0x92 => None,
|
||||
0x93 => None,
|
||||
0x94 => Some((Instruction::STY, AddressingMode::ZeroPageX)),
|
||||
0x95 => Some((Instruction::STA, AddressingMode::ZeroPageX)),
|
||||
0x96 => Some((Instruction::STX, AddressingMode::ZeroPageY)),
|
||||
0x97 => None,
|
||||
0x98 => Some((Instruction::TYA, AddressingMode::Implied)),
|
||||
0x99 => Some((Instruction::STA, AddressingMode::AbsoluteY)),
|
||||
0x9a => Some((Instruction::TXS, AddressingMode::Implied)),
|
||||
0x9b => None,
|
||||
0x9c => None,
|
||||
0x9d => Some((Instruction::STA, AddressingMode::AbsoluteX)),
|
||||
0x9e => None,
|
||||
0x9f => None,
|
||||
0xa0 => Some((Instruction::LDY, AddressingMode::Immediate)),
|
||||
0xa1 => Some((Instruction::LDA, AddressingMode::IndexedIndirectX)),
|
||||
0xa2 => Some((Instruction::LDX, AddressingMode::Immediate)),
|
||||
0xa3 => None,
|
||||
0xa4 => Some((Instruction::LDY, AddressingMode::ZeroPage)),
|
||||
0xa5 => Some((Instruction::LDA, AddressingMode::ZeroPage)),
|
||||
0xa6 => Some((Instruction::LDX, AddressingMode::ZeroPage)),
|
||||
0xa7 => None,
|
||||
0xa8 => Some((Instruction::TAY, AddressingMode::Implied)),
|
||||
0xa9 => Some((Instruction::LDA, AddressingMode::Immediate)),
|
||||
0xaa => Some((Instruction::TAX, AddressingMode::Implied)),
|
||||
0xab => None,
|
||||
0xac => Some((Instruction::LDY, AddressingMode::Absolute)),
|
||||
0xad => Some((Instruction::LDA, AddressingMode::Absolute)),
|
||||
0xae => Some((Instruction::LDX, AddressingMode::Absolute)),
|
||||
0xaf => None,
|
||||
0xb0 => Some((Instruction::BCS, AddressingMode::Relative)),
|
||||
0xb1 => Some((Instruction::LDA, AddressingMode::IndirectIndexedY)),
|
||||
0xb2 => None,
|
||||
0xb3 => None,
|
||||
0xb4 => Some((Instruction::LDY, AddressingMode::ZeroPageX)),
|
||||
0xb5 => Some((Instruction::LDA, AddressingMode::ZeroPageX)),
|
||||
0xb6 => Some((Instruction::LDX, AddressingMode::ZeroPageY)),
|
||||
0xb7 => None,
|
||||
0xb8 => Some((Instruction::CLV, AddressingMode::Implied)),
|
||||
0xb9 => Some((Instruction::LDA, AddressingMode::AbsoluteY)),
|
||||
0xba => Some((Instruction::TSX, AddressingMode::Implied)),
|
||||
0xbb => None,
|
||||
0xbc => Some((Instruction::LDY, AddressingMode::AbsoluteX)),
|
||||
0xbd => Some((Instruction::LDA, AddressingMode::AbsoluteX)),
|
||||
0xbe => Some((Instruction::LDX, AddressingMode::AbsoluteY)),
|
||||
0xbf => None,
|
||||
0xc0 => Some((Instruction::CPY, AddressingMode::Immediate)),
|
||||
0xc1 => Some((Instruction::CMP, AddressingMode::IndexedIndirectX)),
|
||||
0xc2 => None,
|
||||
0xc3 => None,
|
||||
0xc4 => Some((Instruction::CPY, AddressingMode::ZeroPage)),
|
||||
0xc5 => Some((Instruction::CMP, AddressingMode::ZeroPage)),
|
||||
0xc6 => Some((Instruction::DEC, AddressingMode::ZeroPage)),
|
||||
0xc7 => None,
|
||||
0xc8 => Some((Instruction::INY, AddressingMode::Implied)),
|
||||
0xc9 => Some((Instruction::CMP, AddressingMode::Immediate)),
|
||||
0xca => Some((Instruction::DEX, AddressingMode::Implied)),
|
||||
0xcb => None,
|
||||
0xcc => Some((Instruction::CPY, AddressingMode::Absolute)),
|
||||
0xcd => Some((Instruction::CMP, AddressingMode::Absolute)),
|
||||
0xce => Some((Instruction::DEC, AddressingMode::Absolute)),
|
||||
0xcf => None,
|
||||
0xd0 => Some((Instruction::BNE, AddressingMode::Relative)),
|
||||
0xd1 => Some((Instruction::CMP, AddressingMode::IndirectIndexedY)),
|
||||
0xd2 => None,
|
||||
0xd3 => None,
|
||||
0xd4 => None,
|
||||
0xd5 => Some((Instruction::CMP, AddressingMode::ZeroPageX)),
|
||||
0xd6 => Some((Instruction::DEC, AddressingMode::ZeroPageX)),
|
||||
0xd7 => None,
|
||||
0xd8 => Some((Instruction::CLD, AddressingMode::Implied)),
|
||||
0xd9 => Some((Instruction::CMP, AddressingMode::AbsoluteY)),
|
||||
0xda => None,
|
||||
0xdb => None,
|
||||
0xdc => None,
|
||||
0xdd => Some((Instruction::CMP, AddressingMode::AbsoluteX)),
|
||||
0xde => Some((Instruction::DEC, AddressingMode::AbsoluteX)),
|
||||
0xdf => None,
|
||||
0xe0 => Some((Instruction::CPX, AddressingMode::Immediate)),
|
||||
0xe1 => Some((Instruction::SBC, AddressingMode::IndexedIndirectX)),
|
||||
0xe2 => None,
|
||||
0xe3 => None,
|
||||
0xe4 => Some((Instruction::CPX, AddressingMode::ZeroPage)),
|
||||
0xe5 => Some((Instruction::SBC, AddressingMode::ZeroPage)),
|
||||
0xe6 => Some((Instruction::INC, AddressingMode::ZeroPage)),
|
||||
0xe7 => None,
|
||||
0xe8 => Some((Instruction::INX, AddressingMode::Implied)),
|
||||
0xe9 => Some((Instruction::SBC, AddressingMode::Immediate)),
|
||||
0xea => Some((Instruction::NOP, AddressingMode::Implied)),
|
||||
0xeb => None,
|
||||
0xec => Some((Instruction::CPX, AddressingMode::Absolute)),
|
||||
0xed => Some((Instruction::SBC, AddressingMode::Absolute)),
|
||||
0xee => Some((Instruction::INC, AddressingMode::Absolute)),
|
||||
0xef => None,
|
||||
0xf0 => Some((Instruction::BEQ, AddressingMode::Relative)),
|
||||
0xf1 => Some((Instruction::SBC, AddressingMode::IndirectIndexedY)),
|
||||
0xf2 => None,
|
||||
0xf3 => None,
|
||||
0xf4 => None,
|
||||
0xf5 => Some((Instruction::SBC, AddressingMode::ZeroPageX)),
|
||||
0xf6 => Some((Instruction::INC, AddressingMode::ZeroPageX)),
|
||||
0xf7 => None,
|
||||
0xf8 => Some((Instruction::SED, AddressingMode::Implied)),
|
||||
0xf9 => Some((Instruction::SBC, AddressingMode::AbsoluteY)),
|
||||
0xfa => None,
|
||||
0xfb => None,
|
||||
0xfc => None,
|
||||
0xfd => Some((Instruction::SBC, AddressingMode::AbsoluteX)),
|
||||
0xfe => Some((Instruction::INC, AddressingMode::AbsoluteX)),
|
||||
0xff => None,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user