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Add `instruction::disassemble_one(pc, read)` and `DisasmInstr`: a side-effect-free decoder that resolves one instruction at `pc` without advancing the PC or dereferencing operands, so it can be driven from a peek-style bus. - Decodes the full HuC6280 superset via the existing `Huc6280::decode` table, so it can never drift from `fetch_next_and_decode` on which opcodes exist or how long they are (`length == 1 + mode.extra_bytes()`). - Resolves branch targets to absolute addresses (`Relative` and the BBR/BBS `ZeroPageRelative` form); all other operands are static and as-encoded (no register offsets, no zero-page relocation, no pointer dereferencing). - Never panics on unknown opcodes (defensive `.db $XX` fallback). Supporting changes: - `Instruction::mnemonic()` + `Display for Instruction`. - Derive `PartialEq, Eq` for `AddressingMode`. - Factor branch sign-extension into `sign_extend_offset`, now shared by the executing decoder and the disassembler. - Add a default-on `alloc` feature (required by `DisasmInstr::text`), keeping the crate usable on bare-metal via `default-features = false`.