mirror of
https://github.com/mre/mos6502.git
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11499b6bc8
* start on separating 6502 variants from cpu itself
* add a single variant: the NMOS one
* get examples & tests running again
* Add the Revision A variant, one that has no ROR
* disable failing lint in build-time dependencies
* Variant with no decimal mode
* Revert "disable failing lint in build-time dependencies"
This reverts commit c87975e937.
* some doc comments
* specify the variant in unit test now the API has changed
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Co-authored-by: Sam M W <you@example.com>
107 lines
4.0 KiB
Rust
107 lines
4.0 KiB
Rust
// Copyright (C) 2014 The 6502-rs Developers
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. Neither the names of the copyright holders nor the names of any
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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extern crate mos6502;
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#[cfg(not(test))]
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use mos6502::cpu;
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use mos6502::instruction::Nmos6502;
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use mos6502::memory::Bus;
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use mos6502::memory::Memory;
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#[cfg(not(test))]
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fn main() {
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let mut cpu = cpu::CPU::new(Memory::new(), Nmos6502);
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// "Load" a program
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let zero_page_data = [
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// ZeroPage data start
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0x00, 0x02, // ADC ZeroPage target
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0x00, 0x04, // ADC ZeroPageX target
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0x00, 0x00, 0x00, 0x00, 0x10, // ADC IndexedIndirectX address
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0x80, // ADC IndexedIndirectX address
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0x00, 0x00, 0x00, 0x00, 0x00, 0x08, // ADC IndirectIndexedY address
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0x80, // ADC IndirectIndexedY address
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];
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let program = [
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// Code start
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0xA9, // LDA Immediate
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0x01, // Immediate operand
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0x69, // ADC Immediate
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0x07, // Immediate operand
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0x65, // ADC ZeroPage
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0x01, // ZeroPage operand
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0xA2, // LDX Immediate
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0x01, // Immediate operand
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0x75, // ADC ZeroPageX
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0x02, // ZeroPageX operand
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0x6D, // ADC Absolute
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0x01, // Absolute operand
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0x80, // Absolute operand
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0xA2, // LDX immediate
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0x08, // Immediate operand
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0x7D, // ADC AbsoluteX
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0x00, // AbsoluteX operand
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0x80, // AbsoluteX operand
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0xA0, // LDY immediate
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0x04, // Immediate operand
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0x79, // ADC AbsoluteY
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0x00, // AbsoluteY operand
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0x80, // AbsoluteY operand
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0xA2, // LDX immediate
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0x05, // Immediate operand
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0x61, // ADC IndexedIndirectX
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0x03, // IndexedIndirectX operand
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0xA0, // LDY immediate
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0x10, // Immediate operand
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0x71, // ADC IndirectIndexedY
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0x0F, // IndirectIndexedY operand
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0xEA, // NOP :)
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0xFF, // Something invalid -- the end!
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];
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let data = [
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0x00, 0x09, // ADC Absolute target
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0x00, 0x00, 0x40, // ADC AbsoluteY target
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0x00, 0x00, 0x00, 0x11, // ADC AbsoluteX target
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, // ADC IndexedIndirectX target
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, // ADC IndirectIndexedY target
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];
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cpu.memory.set_bytes(0x0000, &zero_page_data);
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cpu.memory.set_bytes(0x4000, &program);
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cpu.memory.set_bytes(0x8000, &data);
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cpu.registers.program_counter = 0x4000;
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cpu.run();
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println!("{:?}", cpu);
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}
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