6502/of816
1
0
Fork 0
mirror of https://github.com/mgcaret/of816.git synced 2024-12-27 19:29:58 +00:00
Code Issues Projects Releases Wiki Activity

GoSXB: stub ROM to launch OF816 at bank

Browse Source
This commit is contained in:
mgcaret 2019-12-27 13:38:13 -08:00
parent e5cf857866
commit cf9d37dba8
6 changed files with 74 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.gitignore vendored
View File

@ -12,4 +12,5 @@ romfs
.DS_Store
*.hex
of816-neon.bin
platforms/GoSXB/rom

1
platforms/GoSXB/GoSXB.l
View File

@ -13,4 +13,3 @@ SEGMENTS {
FCode: load=ROM, type=ro, optional=yes;
ZEROPAGE: load=ZP, type=bss;
}

4
platforms/GoSXB/build.sh
View File

@ -3,5 +3,7 @@ set -e -x
ca65 -I ../../inc GoSXB.s -l GoSXB.lst
../../build.sh GoSXB
ld65 -C GoSXB.l -S 0x8000 GoSXB.o ../../forth.o -m forth.map -o forth
ls -l forth
ca65 -I ../../inc romboot.s -l romboot.lst
ld65 -C romboot.l -S 0x0000 romboot.o -m romboot.map -o rom
ls -l rom forth

21
platforms/GoSXB/platform-lib.s
View File

@ -91,7 +91,7 @@ table: .addr _sf_pre_init
.proc _sf_pre_init
.if 1
.if 0
plx
jmp _sf_success ; assume WDC monitor already did it
.else
@ -101,25 +101,24 @@ table: .addr _sf_pre_init
.a8
.i8
lda #$00
sta VIA2+VIA::ACR
lda #$00
sta VIA2+VIA::PCR
sta f:VIA2+VIA::ACR
sta f:VIA2+VIA::PCR
lda #%00011000 ; b3 = TUSB_RDB; b4 = ???
sta VIA2+VIA::ORB
sta f:VIA2+VIA::ORB
lda #%00011100 ; set PB2, PB3, PB4 as outputs
sta VIA2+VIA::DDRB
sta f:VIA2+VIA::DDRB
lda #$00
sta VIA2+VIA::DDRA
lda VIA2+VIA::IRB
pha
and #%11101111 ; b4 = ???
sta VIA2+VIA::ORB
sta f:VIA2+VIA::ORB
ldx #$5d
jsr wait
pla
sta VIA2+VIA::ORB
lda #%00100000 ; b5 = TUSB_PWRENB
: bit VIA2+VIA::IRB ; wait for USB configuration
sta f:VIA2+VIA::ORB
: lda f:VIA2+VIA::IRB ; wait for USB configuration
bit #%00100000 ; b5 = TUSB_PWRENB
bne :-
plp
plx
@ -179,7 +178,7 @@ wait: phx ; note 8-bit mode!
txa
sta f:VIA2+VIA::ORB ; strobe FT245RL WR low
lda VIA2+VIA::IRA ; get output byte back (we don't really need it)
xba
xba
lda #$00
sta f:VIA2+VIA::DDRA ; switch DDR A back to input
xba

15
platforms/GoSXB/romboot.l Normal file
View File

@ -0,0 +1,15 @@
# Note this linker config relies on the fact that bank 3
# in the output file has the same lower 16 bit addresses
# as the run location. You can't use it to link relative
# code into bank 0 or bank 2
MEMORY {
MAINMEM: start = $0000, size=$10000;
ROM: start = $000000, size = $020000, fillval=$FF, file = %O;
ZP: start = $0000, size = $100;
}
SEGMENTS {
ROMBOOT: load=ROM, run=ROM, start=$1FF00, type=ro;
VECTORS: load=ROM, run=ROM, start=$1FFE0, type=ro;
}

45
platforms/GoSXB/romboot.s Normal file
View File

@ -0,0 +1,45 @@
.p816
.a16
.i16
.include "macros.inc"
.segment "ROMBOOT"
.proc romboot
jml f:$200000
.endproc
.proc emuirq
pha
lda 2,s
and #%00100000
bne romboot ; if BRK, handle like we reset.
pla ; in case we want to RTI or something in the future
; fall-through
.endproc
.proc die
wdm $FF ; GoSXB will exit
hang: bra hang ; Anything else will hang
.endproc
.segment "VECTORS"
.proc vectors
; native mode vectors
.word $FFFF ; FFE0 - reserved
.word $FFFF ; FFE2 - reserved
.word .loword(die) ; FFE4 - COP
.word .loword(romboot) ; FFE6 - BRK
.word .loword(die) ; FFE8 - ABORT
.word .loword(romboot) ; FFEA - NMI
.word $FFFF ; FFEC - reserved
.word .loword(die) ; FFEE - IRQ
; emulation mode vectors
.word $FFFF ; FFF0 - reserved
.word $FFFF ; FFF2 - reserved
.word .loword(die) ; FFF4 - COP
.word $FFFF ; FFF6 - reserved
.word .loword(die) ; FFF8 - ABORT
.word .loword(romboot) ; FFFA - NMI
.word .loword(romboot) ; FFFC - RESET
.word .loword(emuirq) ; FFFE - IRQ/BRK
.endproc