From 0a747cbce6de8b82866093a1f4a96b75675bd914 Mon Sep 17 00:00:00 2001 From: marqs Date: Sun, 7 Oct 2018 23:34:29 +0300 Subject: [PATCH] i2c_opencores: fix compilation warnings --- ip/i2c_opencores/HAL/src/i2c_opencores.c | 6 +++--- software/sys_controller_bsp/drivers/src/i2c_opencores.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/ip/i2c_opencores/HAL/src/i2c_opencores.c b/ip/i2c_opencores/HAL/src/i2c_opencores.c index aa8e81b..49b2a9e 100644 --- a/ip/i2c_opencores/HAL/src/i2c_opencores.c +++ b/ip/i2c_opencores/HAL/src/i2c_opencores.c @@ -69,7 +69,7 @@ int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read) IOWR_I2C_OPENCORES_CR(base, I2C_OPENCORES_CR_STA_MSK | I2C_OPENCORES_CR_WR_MSK ); /* wait for the trnasaction to be over.*/ - while( IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK); + while (IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK) {} /* now check to see if the address was acknowledged */ if(IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_RXNACK_MSK) @@ -119,7 +119,7 @@ alt_u32 I2C_read(alt_u32 base,alt_u32 last) IOWR_I2C_OPENCORES_CR(base, I2C_OPENCORES_CR_RD_MSK ); } /* wait for the trnasaction to be over.*/ - while( IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK); + while (IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK) {} /* now read the data */ return (IORD_I2C_OPENCORES_RXR(base)); @@ -162,7 +162,7 @@ alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last) IOWR_I2C_OPENCORES_CR(base, I2C_OPENCORES_CR_WR_MSK ); } /* wait for the trnasaction to be over.*/ - while( IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK); + while (IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK) {} /* now check to see if the address was acknowledged */ if(IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_RXNACK_MSK) diff --git a/software/sys_controller_bsp/drivers/src/i2c_opencores.c b/software/sys_controller_bsp/drivers/src/i2c_opencores.c index aa8e81b..49b2a9e 100644 --- a/software/sys_controller_bsp/drivers/src/i2c_opencores.c +++ b/software/sys_controller_bsp/drivers/src/i2c_opencores.c @@ -69,7 +69,7 @@ int I2C_start(alt_u32 base, alt_u32 add, alt_u32 read) IOWR_I2C_OPENCORES_CR(base, I2C_OPENCORES_CR_STA_MSK | I2C_OPENCORES_CR_WR_MSK ); /* wait for the trnasaction to be over.*/ - while( IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK); + while (IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK) {} /* now check to see if the address was acknowledged */ if(IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_RXNACK_MSK) @@ -119,7 +119,7 @@ alt_u32 I2C_read(alt_u32 base,alt_u32 last) IOWR_I2C_OPENCORES_CR(base, I2C_OPENCORES_CR_RD_MSK ); } /* wait for the trnasaction to be over.*/ - while( IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK); + while (IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK) {} /* now read the data */ return (IORD_I2C_OPENCORES_RXR(base)); @@ -162,7 +162,7 @@ alt_u32 I2C_write(alt_u32 base,alt_u8 data, alt_u32 last) IOWR_I2C_OPENCORES_CR(base, I2C_OPENCORES_CR_WR_MSK ); } /* wait for the trnasaction to be over.*/ - while( IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK); + while (IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_TIP_MSK) {} /* now check to see if the address was acknowledged */ if(IORD_I2C_OPENCORES_SR(base) & I2C_OPENCORES_SR_RXNACK_MSK)