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pcm1862: fix ADC clkdiv value and use low-latency IIR filter

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This commit is contained in:
marqs 2018-02-22 22:48:00 +02:00
parent 9a2c9bb020
commit 1cc42b808d
4 changed files with 849 additions and 836 deletions
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1668
software/sys_controller/mem_init/sys_onchip_memory2_0.hex
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File diff suppressed because it is too large Load Diff

6
software/sys_controller/pcm1862/pcm1862.c
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@ -56,5 +56,11 @@ int pcm1862_init()
//pcm1862_writereg(0x00, 0xff);
pcm1862_writereg(PCM1862_CLKCONFIG, 0x90);
pcm1862_writereg(PCM1862_DSP1_CLKDIV, 0x00);
pcm1862_writereg(PCM1862_DSP2_CLKDIV, 0x00);
pcm1862_writereg(PCM1862_ADC_CLKDIV, 0x03);
pcm1862_writereg(PCM1862_PLLCONFIG, 0x00);
pcm1862_writereg(PCM1862_DSP_CTRL, 0x30);
return 1;
}

7
software/sys_controller/pcm1862/pcm1862_regs.h
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@ -47,5 +47,12 @@
#define PCM1862_DIN_RESAMPLE 0x1B
#define PCM1862_CLKCONFIG 0x20
#define PCM1862_DSP1_CLKDIV 0x21
#define PCM1862_DSP2_CLKDIV 0x22
#define PCM1862_ADC_CLKDIV 0x23
#define PCM1862_PLLCONFIG 0x28
#define PCM1862_DSP_CTRL 0x71
#endif /* PCM1862_REGS_H_ */

4
software/sys_controller_bsp/settings.bsp
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@ -2,8 +2,8 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>Dec 7, 2017 9:34:03 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1512675243152</BspGeneratedUnixTimeStamp>
<BspGeneratedTimeStamp>Feb 22, 2018 9:52:06 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1519329126233</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>