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misc updates:

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- integrate mask and border generation more deeply into the post processing chain
- delay RLPF by one PP stage (reduce logic length after large mux)
- synthesise a registers after several adder logics
This commit is contained in:
borti4938 2018-03-02 21:57:32 +01:00
parent 9ba41ec240
commit 209130b167
3 changed files with 181 additions and 127 deletions

3
rtl/lat_tester_includes.v

@ -24,3 +24,6 @@
`define LT_WIDTH_DIV 8
`define LT_HEIGHT_DIV 8
`define LT_WIDTH_RSHIFT 3
`define LT_HEIGHT_RSHIFT 3

267
rtl/scanconverter.v

@ -60,9 +60,15 @@
`define HSYNC_LEADING_EDGE ((HSYNC_in_L == `HI) & (HSYNC_in == `LO))
`define VSYNC_LEADING_EDGE ((VSYNC_in_L == `HI) & (VSYNC_in == `LO))
`define PP_RLPF_PL_END 5
`define PP_SLGEN_PL_LENGTH 5
`define PP_PIPELINE_LENGTH (`PP_RLPF_PL_END+`PP_SLGEN_PL_LENGTH)
//`define PP_RLPF_PL_START_EARLY // set if start with 2
`define PP_RLPF_PL_START 3 // minimum 2
`define PP_RLPF_PL_LENGTH 3 // counted from aquisition
`define PP_SLGEN_PL_LENGTH 5
`define PP_LT_BORDER_GEN_LENGTH 2
`define PP_RLPF_PL_END (`PP_RLPF_PL_START+`PP_RLPF_PL_LENGTH)
`define PP_SLGEN_PL_END (`PP_RLPF_PL_END+`PP_SLGEN_PL_LENGTH)
`define PP_PIPELINE_LENGTH (`PP_SLGEN_PL_END+`PP_LT_BORDER_GEN_LENGTH)
module scanconverter (
input reset_n,
@ -105,15 +111,15 @@ wire linebuf_rdclock;
wire [7:0] R_act, G_act, B_act;
wire [7:0] R_lbuf, G_lbuf, B_lbuf;
reg [7:0] R_in_L, G_in_L, B_in_L, R_in_LL, G_in_LL, B_in_LL, R_1x, G_1x, B_1x;
reg [7:0] R_pp[3:`PP_PIPELINE_LENGTH], G_pp[3:`PP_PIPELINE_LENGTH], B_pp[3:`PP_PIPELINE_LENGTH];
reg [7:0] R_pp[3:`PP_PIPELINE_LENGTH-1], G_pp[3:`PP_PIPELINE_LENGTH-1], B_pp[3:`PP_PIPELINE_LENGTH-1];
//H+V syncs + data enable signals&registers
wire HSYNC_act, VSYNC_act, DE_act;
reg HSYNC_in_L, VSYNC_in_L;
reg HSYNC_1x, HSYNC_2x, HSYNC_3x, HSYNC_4x, HSYNC_5x;
reg HSYNC_pp[1:`PP_PIPELINE_LENGTH];
reg VSYNC_1x, VSYNC_2x, VSYNC_3x, VSYNC_4x, VSYNC_5x, VSYNC_pp[1:`PP_PIPELINE_LENGTH];
reg DE_1x, DE_2x, DE_3x, DE_4x, DE_5x, DE_pp[1:`PP_PIPELINE_LENGTH], DE_3x_prev4x;
reg HSYNC_pp[1:`PP_PIPELINE_LENGTH-1];
reg VSYNC_1x, VSYNC_2x, VSYNC_3x, VSYNC_4x, VSYNC_5x, VSYNC_pp[1:`PP_PIPELINE_LENGTH-1];
reg DE_1x, DE_2x, DE_3x, DE_4x, DE_5x, DE_pp[1:`PP_PIPELINE_LENGTH-1], DE_3x_prev4x;
//registers indicating line/frame change and field type
reg FID_cur, FID_prev, FID_1x;
@ -122,21 +128,21 @@ reg frame_change, line_change;
//H+V counters
wire [11:0] linebuf_hoffset; //Offset for line (max. 2047 pixels), MSB indicates which line is read/written
wire [11:0] hcnt_act;
reg [11:0] hcnt_1x, hcnt_2x, hcnt_3x, hcnt_4x, hcnt_5x, hcnt_4x_aspfix, hcnt_2x_opt, hcnt_3x_opt, hcnt_4x_opt, hcnt_5x_opt, hcnt_5x_hscomp;
reg [11:0] hcnt_1x, hcnt_2x, hcnt_3x, hcnt_4x, hcnt_5x, hcnt_4x_aspfix, hcnt_2x_opt, hcnt_3x_opt, hcnt_4x_opt, hcnt_5x_opt, hcnt_5x_hscomp, hcnt_pp;
reg [2:0] hcnt_2x_opt_ctr, hcnt_3x_opt_ctr, hcnt_4x_opt_ctr, hcnt_5x_opt_ctr;
wire [10:0] vcnt_act;
reg [10:0] vcnt_tvp, vcnt_1x, vcnt_2x, vcnt_3x, vcnt_4x, vcnt_5x; //max. 2047
reg [10:0] vcnt_tvp, vcnt_1x, vcnt_2x, vcnt_3x, vcnt_4x, vcnt_5x, vcnt_pp; //max. 2047
//other counters
wire [2:0] line_id_act, col_id_act;
reg [2:0] line_id_pp[1:`PP_PIPELINE_LENGTH-2], col_id_pp[1:`PP_PIPELINE_LENGTH-2];
reg [2:0] line_id_pp[1:`PP_SLGEN_PL_END-2], col_id_pp[1:`PP_SLGEN_PL_END-2];
reg [11:0] hmax[0:1];
reg line_idx;
reg [1:0] line_out_idx_2x, line_out_idx_3x, line_out_idx_4x;
reg [2:0] line_out_idx_5x;
reg [23:0] warn_h_unstable, warn_pll_lock_lost, warn_pll_lock_lost_3x;
reg border_enable_pp[1:`PP_PIPELINE_LENGTH];
reg lt_box_enable_pp[1:`PP_PIPELINE_LENGTH];
reg border_enable_pp[2:`PP_PIPELINE_LENGTH-2];
reg lt_box_enable_pp[2:`PP_PIPELINE_LENGTH-1];
//helper registers for sampling at synchronized clock edges
reg pclk_1x_prev3x;
@ -172,6 +178,24 @@ reg [7:0] X_SCANLINESTR;
reg [5:0] X_REV_LPF_STR;
reg X_REV_LPF_ENABLE;
// constants for each frame to be calculated off config-registers
reg CALC_CONSTS;
reg [11:0] H_AVIDSTOP;
reg [10:0] V_AVIDSTOP;
reg [10:0] H_AVIDMASK_START;
reg [11:0] H_AVIDMASK_STOP;
reg [7:0] V_AVIDMASK_START;
reg [10:0] V_AVIDMASK_STOP;
reg [11:0] LT_POS_TOPLEFT_BOX_H_STOP;
reg [10:0] LT_POS_TOPLEFT_BOX_V_STOP;
reg [11:0] LT_POS_CENTER_BOX_H_START;
reg [11:0] LT_POS_CENTER_BOX_H_STOP;
reg [10:0] LT_POS_CENTER_BOX_V_START;
reg [10:0] LT_POS_CENTER_BOX_V_STOP;
reg [11:0] LT_POS_BOTTOMRIGHT_H_START;
reg [10:0] LT_POS_BOTTOMRIGHT_V_START;
//clk27 related registers
reg VSYNC_in_cc_L, VSYNC_in_cc_LL, VSYNC_in_cc_LLL;
@ -254,76 +278,32 @@ wire [7:0] R_sl_mult, G_sl_mult, B_sl_mult;
lpm_mult_4_sl R_sl_mult_u
(
.clock(pclk_act),
.dataa(R_pp[`PP_PIPELINE_LENGTH-2]),
.dataa(R_pp[`PP_SLGEN_PL_END-2]),
.datab(~Y_sl_str),
.result(R_sl_mult)
);
lpm_mult_4_sl G_sl_mult_u
(
.clock(pclk_act),
.dataa(G_pp[`PP_PIPELINE_LENGTH-2]),
.dataa(G_pp[`PP_SLGEN_PL_END-2]),
.datab(~Y_sl_str),
.result(G_sl_mult)
);
lpm_mult_4_sl B_sl_mult_u
(
.clock(pclk_act),
.dataa(B_pp[`PP_PIPELINE_LENGTH-2]),
.dataa(B_pp[`PP_SLGEN_PL_END-2]),
.datab(~Y_sl_str),
.result(B_sl_mult)
);
reg draw_sl;
//LT box / border generation
function [7:0] apply_mask;
input lt_active;
input lt_box_enable;
input border_enable;
input [7:0] data;
input [3:0] brightness;
begin
if (lt_active)
apply_mask = lt_box_enable ? 8'hff : 8'h00;
else if (border_enable)
apply_mask = {brightness, 4'h0};
else
apply_mask = data;
end
endfunction
//LT position select
function [7:0] apply_lt_box;
input [1:0] mode;
input [11:0] h_cnt;
input [10:0] v_cnt;
input [9:0] h_start;
input [6:0] v_start;
input [10:0] h_active;
input [10:0] v_active;
begin
case (mode)
default: begin
apply_lt_box = 0;
end
`LT_POS_TOPLEFT: begin
apply_lt_box = ((h_cnt < (h_start+(h_active/`LT_WIDTH_DIV))) && (v_cnt < (v_start+(v_active/`LT_HEIGHT_DIV)))) ? 1 : 0;
end
`LT_POS_CENTER: begin
apply_lt_box = ((h_cnt >= (h_start+(h_active/2)-(h_active/(`LT_WIDTH_DIV*2)))) && (h_cnt < (h_start+(h_active/2)+(h_active/(`LT_WIDTH_DIV*2)))) && (v_cnt >= (v_start+(v_active/2)-(v_active/(`LT_HEIGHT_DIV*2)))) && (v_cnt < (v_start+(v_active/2)+(v_active/(`LT_HEIGHT_DIV*2))))) ? 1 : 0;
end
`LT_POS_BOTTOMRIGHT: begin
apply_lt_box = ((h_cnt >= (h_start+h_active-(h_active/`LT_WIDTH_DIV))) && (v_cnt >= (v_start+v_active-(v_active/`LT_HEIGHT_DIV)))) ? 1 : 0;
end
endcase
end
endfunction
//Reverse LPF
wire rlpf_trigger_act;
reg rlpf_trigger_r;
reg rlpf_trigger_r[1:`PP_RLPF_PL_START-1];
reg [7:0] R_prev_pp[2:`PP_RLPF_PL_END-1], G_prev_pp[2:`PP_RLPF_PL_END-1], B_prev_pp[2:`PP_RLPF_PL_END-1];
reg [7:0] R_prev_pp[`PP_RLPF_PL_START:`PP_RLPF_PL_END-1], G_prev_pp[`PP_RLPF_PL_START:`PP_RLPF_PL_END-1], B_prev_pp[`PP_RLPF_PL_START:`PP_RLPF_PL_END-1];
reg signed [14:0] R_diff_s15_pre, G_diff_s15_pre, B_diff_s15_pre, R_diff_s15, G_diff_s15, B_diff_s15;
reg signed [10:0] R_rlpf_result, G_rlpf_result, B_rlpf_result;
@ -458,7 +438,7 @@ case (V_MULTMODE)
HSYNC_act = HSYNC_5x;
VSYNC_act = VSYNC_5x;
DE_act = DE_5x;
line_id_act = {2'b00, line_out_idx_5x};
line_id_act = line_out_idx_5x;
hcnt_act = hcnt_5x;
vcnt_act = vcnt_5x;
pclk_act = pclk_5x;
@ -521,60 +501,95 @@ always @(posedge pclk_act)
begin
line_id_pp[1] <= line_id_act;
col_id_pp[1] <= col_id_act;
for(pp_idx = 2; pp_idx <= `PP_PIPELINE_LENGTH-2; pp_idx = pp_idx+1) begin
for(pp_idx = 2; pp_idx <= `PP_SLGEN_PL_END-2; pp_idx = pp_idx+1) begin
line_id_pp[pp_idx] <= line_id_pp[pp_idx-1];
col_id_pp[pp_idx] <= col_id_pp[pp_idx-1];
end
lt_box_enable_pp[1] <= apply_lt_box(lt_mode, hcnt_act, vcnt_act, H_AVIDSTART, V_AVIDSTART, H_ACTIVE, V_ACTIVE);
border_enable_pp[1] <= ((hcnt_act < H_AVIDSTART+H_MASK) | (hcnt_act >= H_AVIDSTART+H_ACTIVE-H_MASK) | (vcnt_act < V_AVIDSTART+V_MASK) | (vcnt_act >= V_AVIDSTART+V_ACTIVE-V_MASK));
for(pp_idx = 2; pp_idx <= `PP_PIPELINE_LENGTH; pp_idx = pp_idx+1) begin
lt_box_enable_pp[pp_idx] <= lt_box_enable_pp[pp_idx-1];
hcnt_pp <= hcnt_act;
vcnt_pp <= vcnt_act;
border_enable_pp[2] <= ((hcnt_pp < H_AVIDMASK_START) | (hcnt_pp >= H_AVIDMASK_STOP) | (vcnt_pp < V_AVIDMASK_START) | (vcnt_pp >= V_AVIDMASK_STOP));
for(pp_idx = 3; pp_idx <= `PP_PIPELINE_LENGTH-2; pp_idx = pp_idx+1) begin
border_enable_pp[pp_idx] <= border_enable_pp[pp_idx-1];
end
case (lt_mode)
default: begin
lt_box_enable_pp[2] <= 0;
end
`LT_POS_TOPLEFT: begin
lt_box_enable_pp[2] <= ((hcnt_pp < LT_POS_TOPLEFT_BOX_H_STOP) && (vcnt_pp < LT_POS_TOPLEFT_BOX_V_STOP)) ? 1'b1 : 1'b0;
end
`LT_POS_CENTER: begin
lt_box_enable_pp[2] <= ((hcnt_pp >= LT_POS_CENTER_BOX_H_START) && (hcnt_pp < LT_POS_CENTER_BOX_H_STOP) && (vcnt_pp >= LT_POS_CENTER_BOX_V_START) && (vcnt_pp < LT_POS_CENTER_BOX_V_STOP)) ? 1'b1 : 1'b0;
end
`LT_POS_BOTTOMRIGHT: begin
lt_box_enable_pp[2] <= ((hcnt_pp >= LT_POS_BOTTOMRIGHT_H_START) && (vcnt_pp >= LT_POS_BOTTOMRIGHT_V_START)) ? 1'b1 : 1'b0;
end
endcase
for(pp_idx = 3; pp_idx <= `PP_PIPELINE_LENGTH-1; pp_idx = pp_idx+1) begin
lt_box_enable_pp[pp_idx] <= lt_box_enable_pp[pp_idx-1];
end
HSYNC_pp[2] <= HSYNC_act;
VSYNC_pp[2] <= VSYNC_act;
DE_pp[2] <= DE_act;
for(pp_idx = 3; pp_idx <= `PP_PIPELINE_LENGTH; pp_idx = pp_idx+1) begin
for(pp_idx = 3; pp_idx <= `PP_PIPELINE_LENGTH-1; pp_idx = pp_idx+1) begin
HSYNC_pp[pp_idx] <= HSYNC_pp[pp_idx-1];
VSYNC_pp[pp_idx] <= VSYNC_pp[pp_idx-1];
DE_pp[pp_idx] <= DE_pp[pp_idx-1];
end
HSYNC_out <= HSYNC_pp[`PP_PIPELINE_LENGTH];
VSYNC_out <= VSYNC_pp[`PP_PIPELINE_LENGTH];
DE_out <= DE_pp[`PP_PIPELINE_LENGTH];
HSYNC_out <= HSYNC_pp[`PP_PIPELINE_LENGTH-1];
VSYNC_out <= VSYNC_pp[`PP_PIPELINE_LENGTH-1];
DE_out <= DE_pp[`PP_PIPELINE_LENGTH-1];
// get RGB and delay it
R_pp[3] <= R_act;
G_pp[3] <= G_act;
B_pp[3] <= B_act;
for(pp_idx = 4; pp_idx <= `PP_PIPELINE_LENGTH; pp_idx = pp_idx + 1) begin
for(pp_idx = 4; pp_idx <= `PP_PIPELINE_LENGTH-1; pp_idx = pp_idx + 1) begin
R_pp[pp_idx] <= R_pp[pp_idx-1];
G_pp[pp_idx] <= G_pp[pp_idx-1];
B_pp[pp_idx] <= B_pp[pp_idx-1];
end
R_out <= R_pp[`PP_PIPELINE_LENGTH-1];
G_out <= G_pp[`PP_PIPELINE_LENGTH-1];
B_out <= B_pp[`PP_PIPELINE_LENGTH-1];
// reverse LPF ...
rlpf_trigger_r <= rlpf_trigger_act;
rlpf_trigger_r[1] <= rlpf_trigger_act;
for(pp_idx = 2; pp_idx <= `PP_RLPF_PL_START-1; pp_idx = pp_idx + 1)
rlpf_trigger_r[`PP_RLPF_PL_START-1] <= rlpf_trigger_r[1];
// Optimized modes repeat pixels. Save previous pixel only when linebuffer offset changes.
if (rlpf_trigger_r) begin
R_prev_pp[2] <= R_act;
G_prev_pp[2] <= G_act;
B_prev_pp[2] <= B_act;
if (rlpf_trigger_r[`PP_RLPF_PL_START-1]) begin
`ifdef PP_RLPF_PL_START_EARLY
R_prev_pp[`PP_RLPF_PL_START] <= R_act;
G_prev_pp[`PP_RLPF_PL_START] <= G_act;
B_prev_pp[`PP_RLPF_PL_START] <= B_act;
`else
R_prev_pp[`PP_RLPF_PL_START] <= R_pp[`PP_RLPF_PL_START];
G_prev_pp[`PP_RLPF_PL_START] <= G_pp[`PP_RLPF_PL_START];
B_prev_pp[`PP_RLPF_PL_START] <= B_pp[`PP_RLPF_PL_START];
`endif
end
for(pp_idx = 3; pp_idx <= `PP_RLPF_PL_END-1; pp_idx = pp_idx + 1) begin
for(pp_idx = `PP_RLPF_PL_START+1; pp_idx <= `PP_RLPF_PL_END-1; pp_idx = pp_idx + 1) begin
R_prev_pp[pp_idx] <= R_prev_pp[pp_idx-1];
G_prev_pp[pp_idx] <= G_prev_pp[pp_idx-1];
B_prev_pp[pp_idx] <= B_prev_pp[pp_idx-1];
end
// ... step 1
R_diff_s15_pre <= (R_prev_pp[2] - R_act);
G_diff_s15_pre <= (G_prev_pp[2] - G_act);
B_diff_s15_pre <= (B_prev_pp[2] - B_act);
`ifdef PP_RLPF_PL_START_EARLY
R_diff_s15_pre <= (R_prev_pp[`PP_RLPF_PL_START] - R_act);
G_diff_s15_pre <= (G_prev_pp[`PP_RLPF_PL_START] - G_act);
B_diff_s15_pre <= (B_prev_pp[`PP_RLPF_PL_START] - B_act);
`else
R_diff_s15_pre <= (R_prev_pp[`PP_RLPF_PL_START] - R_pp[`PP_RLPF_PL_START]);
G_diff_s15_pre <= (G_prev_pp[`PP_RLPF_PL_START] - G_pp[`PP_RLPF_PL_START]);
B_diff_s15_pre <= (B_prev_pp[`PP_RLPF_PL_START] - B_pp[`PP_RLPF_PL_START]);
`endif
// ... step 2
@ -608,26 +623,34 @@ begin
B_sl_str <= {2'b0,X_SCANLINESTR} < B_sl_hybr_ref ? 8'h0 : X_SCANLINESTR - B_sl_hybr_ref[7:0];
// perform scanline generation (1 pp-stage)
// R_sl_mult, G_sl_mult and B_sl_mult are registered outputs of IP blocks (2 pp-stage delay)
R_sl_sub <= (R_pp[`PP_PIPELINE_LENGTH-2] > R_sl_str) ? (R_pp[`PP_PIPELINE_LENGTH-2]-R_sl_str) : 8'h00;
G_sl_sub <= (G_pp[`PP_PIPELINE_LENGTH-2] > G_sl_str) ? (G_pp[`PP_PIPELINE_LENGTH-2]-G_sl_str) : 8'h00;
B_sl_sub <= (B_pp[`PP_PIPELINE_LENGTH-2] > B_sl_str) ? (B_pp[`PP_PIPELINE_LENGTH-2]-B_sl_str) : 8'h00;
draw_sl <= |{(V_SCANLINEMODE == `SCANLINES_H) && (V_SCANLINEID & (5'h1<<line_id_pp[`PP_PIPELINE_LENGTH-2])),
(V_SCANLINEMODE == `SCANLINES_V) && (5'h0 == col_id_pp[`PP_PIPELINE_LENGTH-2]),
(V_SCANLINEMODE == `SCANLINES_ALT) && (V_SCANLINEID & (5'h1<<(line_id_pp[`PP_PIPELINE_LENGTH-2]^FID_1x)))};
// R_sl_mult, G_sl_mult and B_sl_mult are registered outputs of IP blocks (1 pp-stage delay)
R_sl_sub <= (R_pp[`PP_SLGEN_PL_END-2] > R_sl_str) ? (R_pp[`PP_SLGEN_PL_END-2]-R_sl_str) : 8'h00;
G_sl_sub <= (G_pp[`PP_SLGEN_PL_END-2] > G_sl_str) ? (G_pp[`PP_SLGEN_PL_END-2]-G_sl_str) : 8'h00;
B_sl_sub <= (B_pp[`PP_SLGEN_PL_END-2] > B_sl_str) ? (B_pp[`PP_SLGEN_PL_END-2]-B_sl_str) : 8'h00;
draw_sl <= |{(V_SCANLINEMODE == `SCANLINES_H) && (V_SCANLINEID & (5'h1<<line_id_pp[`PP_SLGEN_PL_END-2])),
(V_SCANLINEMODE == `SCANLINES_V) && (5'h0 == col_id_pp[`PP_SLGEN_PL_END-2]),
(V_SCANLINEMODE == `SCANLINES_ALT) && (V_SCANLINEID & (5'h1<<(line_id_pp[`PP_SLGEN_PL_END-2]^FID_1x)))};
// draw scanline (1 pp-stage)
if (draw_sl) begin
R_pp[`PP_PIPELINE_LENGTH] <= X_SCANLINE_METHOD ? R_sl_sub : R_sl_mult;
G_pp[`PP_PIPELINE_LENGTH] <= X_SCANLINE_METHOD ? G_sl_sub : G_sl_mult;
B_pp[`PP_PIPELINE_LENGTH] <= X_SCANLINE_METHOD ? B_sl_sub : B_sl_mult;
R_pp[`PP_SLGEN_PL_END] <= X_SCANLINE_METHOD ? R_sl_sub : R_sl_mult;
G_pp[`PP_SLGEN_PL_END] <= X_SCANLINE_METHOD ? G_sl_sub : G_sl_mult;
B_pp[`PP_SLGEN_PL_END] <= X_SCANLINE_METHOD ? B_sl_sub : B_sl_mult;
end
// apply mask at output stage
R_out <= apply_mask(lt_active, lt_box_enable_pp[`PP_PIPELINE_LENGTH], border_enable_pp[`PP_PIPELINE_LENGTH], R_pp[`PP_PIPELINE_LENGTH], X_MASK_BR);
G_out <= apply_mask(lt_active, lt_box_enable_pp[`PP_PIPELINE_LENGTH], border_enable_pp[`PP_PIPELINE_LENGTH], G_pp[`PP_PIPELINE_LENGTH], X_MASK_BR);
B_out <= apply_mask(lt_active, lt_box_enable_pp[`PP_PIPELINE_LENGTH], border_enable_pp[`PP_PIPELINE_LENGTH], B_pp[`PP_PIPELINE_LENGTH], X_MASK_BR);
// apply mask (border generation)
if (border_enable_pp[`PP_PIPELINE_LENGTH-2]) begin
R_pp[`PP_PIPELINE_LENGTH-1] <= {2{X_MASK_BR}};
G_pp[`PP_PIPELINE_LENGTH-1] <= {2{X_MASK_BR}};
B_pp[`PP_PIPELINE_LENGTH-1] <= {2{X_MASK_BR}};
end
// apply LT box
if (lt_active) begin
R_out <= {8{lt_box_enable_pp[`PP_PIPELINE_LENGTH-1]}};
G_out <= {8{lt_box_enable_pp[`PP_PIPELINE_LENGTH-1]}};
B_out <= {8{lt_box_enable_pp[`PP_PIPELINE_LENGTH-1]}};
end
end
//Generate a warning signal from horizontal instability or PLL sync loss
@ -699,6 +722,10 @@ begin
end
//Buffer the inputs using input pixel clock and generate 1x signals
wire [11:0] H_L5BORDER_1920_tmp = (11'd1920-h_info[10:0]);
wire [11:0] H_L5BORDER_1600_tmp = (11'd1600-h_info[10:0]);
always @(posedge pclk_1x or negedge reset_n)
begin
if (!reset_n) begin
@ -742,7 +769,7 @@ begin
end else if (`VSYNC_LEADING_EDGE) begin // odd field (interlace) start
if (!`FALSE_FIELD) begin
FID_cur <= 1'b1;
vcnt_1x <= -1;
vcnt_1x <= 11'h7ff; // -1 for 11 bit word
frame_change <= 1'b1;
vmax <= vcnt_1x;
end
@ -750,7 +777,7 @@ begin
vmax_tvp <= vcnt_tvp;
end else if ((fpga_vsyncgen[`VSYNCGEN_GENMID_BIT]) && (vcnt_tvp == (vmax_tvp>>1)) && (hcnt_1x == (hmax[~line_idx]>>1))) begin //VSM=1
FID_cur <= 1'b1;
vcnt_1x <= -1;
vcnt_1x <= 11'h7ff; // -1 for 11 bit word
frame_change <= 1'b1;
vmax <= vcnt_1x;
end else
@ -790,7 +817,8 @@ begin
`V_MULTMODE_5X: V_SCANLINEID <= (5'b00011 << {2{v_info[26]}});
endcase
H_L5BORDER <= h_info[29] ? (11'd1920-h_info[10:0])/2 : (11'd1600-h_info[10:0])/2;
// H_L5BORDER <= h_info[29] ? (11'd1920-h_info[10:0])/2 : (11'd1600-h_info[10:0])/2;
H_L5BORDER <= h_info[29] ? H_L5BORDER_1920_tmp[10:1] : H_L5BORDER_1600_tmp[10:1];
H_OPT_SCALE <= h_info2[18:16];
H_OPT_SAMPLE_SEL <= h_info2[15:13];
@ -805,8 +833,31 @@ begin
X_SCANLINE_METHOD <= extra_info[9];
X_SCANLINE_HYBRSTR <= extra_info[8:4];
X_SCANLINESTR <= ((extra_info[3:0]+8'h01)<<4)-1'b1;
CALC_CONSTS <= 1'b1;
end
if (CALC_CONSTS) begin
H_AVIDSTOP <= H_AVIDSTART+H_ACTIVE;
V_AVIDSTOP <= V_AVIDSTART+V_ACTIVE;
H_AVIDMASK_START <= H_AVIDSTART+H_MASK;
H_AVIDMASK_STOP <= H_AVIDSTART+H_ACTIVE-H_MASK;
V_AVIDMASK_START <= V_AVIDSTART+V_MASK;
V_AVIDMASK_STOP <= V_AVIDSTART+V_ACTIVE-V_MASK;
LT_POS_TOPLEFT_BOX_H_STOP <= H_AVIDSTART+(H_ACTIVE>>`LT_WIDTH_RSHIFT);
LT_POS_TOPLEFT_BOX_V_STOP <= V_AVIDSTART+(V_ACTIVE>>`LT_HEIGHT_RSHIFT);
LT_POS_CENTER_BOX_H_START <= H_AVIDSTART+(H_ACTIVE>>1)-(H_ACTIVE>>(`LT_WIDTH_RSHIFT+1));
LT_POS_CENTER_BOX_H_STOP <= H_AVIDSTART+(H_ACTIVE>>1)+(H_ACTIVE>>(`LT_WIDTH_RSHIFT+1));
LT_POS_CENTER_BOX_V_START <= V_AVIDSTART+(V_ACTIVE>>1)-(V_ACTIVE>>(`LT_HEIGHT_RSHIFT+1));
LT_POS_CENTER_BOX_V_STOP <= V_AVIDSTART+(V_ACTIVE>>1)+(V_ACTIVE>>(`LT_HEIGHT_RSHIFT+1));
LT_POS_BOTTOMRIGHT_H_START <= H_AVIDSTART+H_ACTIVE-(H_ACTIVE>>`LT_WIDTH_RSHIFT);
LT_POS_BOTTOMRIGHT_V_START <= V_AVIDSTART+V_ACTIVE-(V_ACTIVE>>`LT_HEIGHT_RSHIFT);
CALC_CONSTS <= 1'b0;
end
R_in_L <= R_in;
G_in_L <= G_in;
B_in_L <= B_in;
@ -826,7 +877,7 @@ begin
VSYNC_1x <= (vcnt_1x < V_SYNCLEN) ? `VSYNC_POL : ~`VSYNC_POL;
else
VSYNC_1x <= (((vcnt_1x+1'b1) < V_SYNCLEN) | ((vcnt_1x+1'b1 == V_SYNCLEN) & (hcnt_1x <= (hmax[~line_idx]>>1)))) ? `VSYNC_POL : ~`VSYNC_POL;
DE_1x <= ((hcnt_1x >= H_AVIDSTART) & (hcnt_1x < H_AVIDSTART+H_ACTIVE)) & ((vcnt_1x >= V_AVIDSTART) & (vcnt_1x < V_AVIDSTART+V_ACTIVE));
DE_1x <= ((hcnt_1x >= H_AVIDSTART) & (hcnt_1x < H_AVIDSTOP)) & ((vcnt_1x >= V_AVIDSTART) & (vcnt_1x < V_AVIDSTOP));
FID_1x <= FID_cur;
end
end
@ -845,7 +896,7 @@ begin
hcnt_2x_opt_ctr <= 0;
line_out_idx_2x <= 0;
if (frame_change)
vcnt_2x <= -1;
vcnt_2x <= 11'h7ff; // -1 for 11 bit word
else if (line_change & (FID_cur == `FID_EVEN))
vcnt_2x <= vcnt_2x + 1'b1;
end else if (hcnt_2x == hmax[~line_idx]) begin
@ -868,7 +919,7 @@ begin
HSYNC_2x <= (hcnt_2x < H_SYNCLEN) ? `HSYNC_POL : ~`HSYNC_POL;
VSYNC_2x <= (vcnt_2x < V_SYNCLEN) ? `VSYNC_POL : ~`VSYNC_POL;
DE_2x <= ((hcnt_2x >= H_AVIDSTART) & (hcnt_2x < H_AVIDSTART+H_ACTIVE)) & ((vcnt_2x >= V_AVIDSTART) & (vcnt_2x < V_AVIDSTART+V_ACTIVE));
DE_2x <= ((hcnt_2x >= H_AVIDSTART) & (hcnt_2x < H_AVIDSTOP)) & ((vcnt_2x >= V_AVIDSTART) & (vcnt_2x < V_AVIDSTOP));
end
end
@ -924,7 +975,7 @@ begin
VSYNC_3x <= ~`VSYNC_POL;
end
DE_3x <= ((hcnt_3x >= H_AVIDSTART) & (hcnt_3x < H_AVIDSTART+H_ACTIVE)) & ((vcnt_3x >= V_AVIDSTART) & (vcnt_3x < V_AVIDSTART+V_ACTIVE));
DE_3x <= ((hcnt_3x >= H_AVIDSTART) & (hcnt_3x < H_AVIDSTOP)) & ((vcnt_3x >= V_AVIDSTART) & (vcnt_3x < V_AVIDSTOP));
end
end
@ -938,7 +989,7 @@ begin
// TODO: better implementation
if ((DE_3x == 1) & (DE_3x_prev4x == 0))
hcnt_4x_aspfix <= hcnt_3x - 160;
hcnt_4x_aspfix <= hcnt_3x - 12'd160;
else
hcnt_4x_aspfix <= hcnt_4x_aspfix + 1'b1;
@ -950,7 +1001,7 @@ begin
hcnt_4x_opt_ctr <= 0;
line_out_idx_4x <= 0;
if (frame_change)
vcnt_4x <= -1;
vcnt_4x <= 11'h7ff; // -1 for 11 bit word
else if (line_change & (FID_cur == `FID_EVEN))
vcnt_4x <= vcnt_4x + 1'b1;
end else if (hcnt_4x == hmax[~line_idx]) begin
@ -981,7 +1032,7 @@ begin
HSYNC_4x <= (hcnt_4x < H_SYNCLEN) ? `HSYNC_POL : ~`HSYNC_POL;
VSYNC_4x <= (vcnt_4x < V_SYNCLEN) ? `VSYNC_POL : ~`VSYNC_POL;
DE_4x <= ((hcnt_4x >= H_AVIDSTART) & (hcnt_4x < H_AVIDSTART+H_ACTIVE)) & ((vcnt_4x >= V_AVIDSTART) & (vcnt_4x < V_AVIDSTART+V_ACTIVE));
DE_4x <= ((hcnt_4x >= H_AVIDSTART) & (hcnt_4x < H_AVIDSTOP)) & ((vcnt_4x >= V_AVIDSTART) & (vcnt_4x < V_AVIDSTOP));
end
end
@ -998,7 +1049,7 @@ begin
hcnt_5x_opt_ctr <= 0;
line_out_idx_5x <= 0;
if (frame_change)
vcnt_5x <= -1;
vcnt_5x <= 11'h7ff; // -1 for 11 bit word
else if (line_change)
vcnt_5x <= vcnt_5x + 1'b1;
end else if (hcnt_5x == hmax[~line_idx]) begin
@ -1030,7 +1081,7 @@ begin
HSYNC_5x <= (hcnt_5x < H_SYNCLEN) ? `HSYNC_POL : ~`HSYNC_POL;
VSYNC_5x <= (vcnt_5x < V_SYNCLEN) ? `VSYNC_POL : ~`VSYNC_POL;
DE_5x <= ((hcnt_5x >= H_AVIDSTART-H_L5BORDER) & (hcnt_5x < H_AVIDSTART+H_ACTIVE+H_L5BORDER)) & ((vcnt_5x >= V_AVIDSTART) & (vcnt_5x < V_AVIDSTART+V_ACTIVE));
DE_5x <= ((hcnt_5x >= H_AVIDSTART-H_L5BORDER) & (hcnt_5x < H_AVIDSTOP+H_L5BORDER)) & ((vcnt_5x >= V_AVIDSTART) & (vcnt_5x < V_AVIDSTOP));
end
end

38
rtl/videogen.v

@ -34,27 +34,27 @@ module videogen (
);
//Parameters for 720x480@59.94Hz (858px x 525lines, pclk 27MHz -> 59.94Hz)
parameter H_SYNCLEN = 62;
parameter H_BACKPORCH = 60;
parameter H_ACTIVE = 720;
parameter H_FRONTPORCH = 16;
parameter H_TOTAL = 858;
parameter H_SYNCLEN = 10'd62;
parameter H_BACKPORCH = 10'd60;
parameter H_ACTIVE = 10'd720;
parameter H_FRONTPORCH = 10'd16;
parameter H_TOTAL = 10'd858;
parameter V_SYNCLEN = 6;
parameter V_BACKPORCH = 30;
parameter V_ACTIVE = 480;
parameter V_FRONTPORCH = 9;
parameter V_TOTAL = 525;
parameter V_SYNCLEN = 10'd6;
parameter V_BACKPORCH = 10'd30;
parameter V_ACTIVE = 10'd480;
parameter V_FRONTPORCH = 10'd9;
parameter V_TOTAL = 10'd525;
parameter H_OVERSCAN = 40; //at both sides
parameter V_OVERSCAN = 16; //top and bottom
parameter H_AREA = 640;
parameter V_AREA = 448;
parameter H_GRADIENT = 512;
parameter V_GRADIENT = 256;
parameter V_GRAYRAMP = 84;
parameter H_BORDER = (H_AREA-H_GRADIENT)/2;
parameter V_BORDER = (V_AREA-V_GRADIENT)/2;
parameter H_OVERSCAN = 10'd40; //at both sides
parameter V_OVERSCAN = 10'd16; //top and bottom
parameter H_AREA = 10'd640;
parameter V_AREA = 10'd448;
parameter H_GRADIENT = 10'd512;
parameter V_GRADIENT = 10'd256;
parameter V_GRAYRAMP = 10'd84;
parameter H_BORDER = ((H_AREA-H_GRADIENT)>>1);
parameter V_BORDER = ((V_AREA-V_GRADIENT)>>1);
parameter X_START = H_SYNCLEN + H_BACKPORCH;
parameter Y_START = V_SYNCLEN + V_BACKPORCH;