6502
/
ossc
mirror of https://github.com/marqs85/ossc.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge branch 'release' of https://github.com/marqs85/ossc into release

This commit is contained in:
marqs 2017-06-05 20:04:04 +03:00
parent cabc04b3b0 7ad04917ed
commit 30af6b72f2
2 changed files with 7 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
software/sys_controller/it6613/it6613_drv.c
View File

@ -552,11 +552,6 @@ BOOL EnableAudioOutput4OSSC(ULONG VideoPixelClock,BYTE bAudioDwSampl,BYTE bAudio
HDMITX_WriteI2C_Byte(REG_TX_PKT_SINGLE_CTRL,0); // D[1] = 0,HW auto count CTS
#endif
// define internal/external MCLK and audio down-sampling
HDMITX_SetREG_Byte(REG_TX_CLK_CTRL0,~(M_EXT_MCLK_SEL|B_EXT_MCLK_SAMP|B_EXT_MCLK4CTS),B_EXT_256FS);
//HDMITX_AndREG_Byte(REG_TX_SW_RST,~M_AUD_DIV);
if (bAudioDwSampl == 0x1)
HDMITX_OrREG_Byte(REG_TX_CLK_CTRL1,B_AUD_DIV2);
// set audio format
Instance[0].TMDSClock = VideoPixelClock;
@ -568,6 +563,11 @@ BOOL EnableAudioOutput4OSSC(ULONG VideoPixelClock,BYTE bAudioDwSampl,BYTE bAudio
HDMITX_WriteI2C_Byte(REG_TX_AUDIO_CTRL0,AudioEnable & 0xF0);
if (bAudioDwSampl == 0x1)
HDMITX_SetREG_Byte(REG_TX_CLK_CTRL1,~M_AUD_DIV,B_AUD_DIV2);
else
HDMITX_SetREG_Byte(REG_TX_CLK_CTRL1,~M_AUD_DIV,B_AUD_NODIV);
HDMITX_AndREG_Byte(REG_TX_SW_RST,~(B_AUD_RST|B_AREF_RST));
HDMITX_WriteI2C_Byte(REG_TX_AUDIO_CTRL1,Instance[0].bOutputAudioMode);
HDMITX_WriteI2C_Byte(REG_TX_AUDIO_FIFOMAP,0xE4); // default mapping.

6
software/sys_controller/it6613/it6613_drv.h
View File

@ -234,10 +234,11 @@
#define B_T_AUTH_DONE (1<<7)
#define REG_TX_CLK_CTRL0 0x58
#define O_MCLK_SAMP 7
#define M_MCLK_SAMP (1<<O_MCLK_SAMP)
#define B_EXT_MCLK_SAMP (1<<O_MCLK_SAMP)
#define B_INT_MCLK_SAMP (0<<O_MCLK_SAMP)
#define O_OSCLK_SEL 5
#define M_OSCLK_SEL 3
#define M_OSCLK_SEL (3<<O_OSCLK_SEL)
#define B_AUTO_OVER_SAMPLING_CLOCK (1<<4)
#define O_EXT_MCLK_SEL 2
#define M_EXT_MCLK_SEL (3<<O_EXT_MCLK_SEL)
@ -245,9 +246,6 @@
#define B_EXT_256FS (1<<O_EXT_MCLK_SEL)
#define B_EXT_512FS (2<<O_EXT_MCLK_SEL)
#define B_EXT_1024FS (3<<O_EXT_MCLK_SEL)
#define O_MCLK4CTS 1
#define B_EXT_MCLK4CTS (1<<O_MCLK4CTS)
#define B_INT_MCLK4CTS (0<<O_MCLK4CTS)
#define REG_TX_SHA_SEL 0x50
#define REG_TX_SHA_RD_BYTE1 0x51