From 4676cbd2f0dd5e7d1e7b56cc0e2da75c804ddf99 Mon Sep 17 00:00:00 2001 From: marqs Date: Sat, 6 Oct 2018 01:07:53 +0300 Subject: [PATCH] integrate zero-riscy --- .gitmodules | 3 + .../endianconverter_qsys.v | 56 - .../endianconverter_qsys_hw.tcl | 84 - ip/nios2_hw_crc/HAL/doc/crc_main.c | 224 - ip/nios2_hw_crc/HAL/src/ci_crc.c | 97 - ip/nios2_hw_crc/HAL/src/crc.c | 265 - ip/nios2_hw_crc/hdl/CRC_Component.v | 314 - ip/nios2_hw_crc/hdl/CRC_Custom_Instruction.v | 101 - ip/nios2_hw_crc/nios2_hw_crc32_hw.tcl | 116 - ip/nios2_hw_crc/nios2_hw_crc32_sw.tcl | 58 - ip/pulpino_qsys | 1 + rtl/ossc.v | 8 +- scripts/rv-reprogram.tcl | 25 + software/ossc_sw.project | 2 +- software/sys_controller/Makefile | 15 +- software/sys_controller/crt0.boot.S | 103 + software/sys_controller/it6613/hdmitx.h | 2 +- software/sys_controller/link.common.ld | 135 + software/sys_controller/link.riscv.ld | 7 + .../mem_init/sys_onchip_memory2_0.hex | 8646 ++++++++++++++--- software/sys_controller/ossc/controls.c | 2 +- software/sys_controller/ossc/firmware.h | 2 +- software/sys_controller/pulpino.h | 91 + .../HAL/src/alt_busy_sleep.c | 74 +- .../HAL/src/alt_putcharbuf.c | 189 +- software/sys_controller_bsp/Makefile | 1 + software/sys_controller_bsp/alt_sys_init.c | 8 +- .../Altera_UP_SD_Card_Avalon_Interface_mod.h | 166 - .../drivers/inc/altera_avalon_timer.h | 193 + .../drivers/inc/altera_avalon_timer_regs.h | 202 + .../Altera_UP_SD_Card_Avalon_Interface_mod.c | 1908 ---- .../drivers/src/altera_avalon_timer_sc.c | 110 + .../drivers/src/altera_avalon_timer_ts.c | 143 + .../drivers/src/altera_avalon_timer_vars.c | 83 +- software/sys_controller_bsp/libhal_bsp.a | Bin 27058 -> 27838 bytes software/sys_controller_bsp/linker.h | 10 +- software/sys_controller_bsp/linker.x | 52 +- software/sys_controller_bsp/mem_init.mk | 20 +- software/sys_controller_bsp/memory.gdb | 10 +- software/sys_controller_bsp/settings.bsp | 54 +- software/sys_controller_bsp/system.h | 58 +- sys.qsys | 764 +- sys.sopcinfo | 7440 ++++++-------- tools/bin2hex.c | 53 + 44 files changed, 11897 insertions(+), 9998 deletions(-) create mode 100644 .gitmodules delete mode 100644 ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys.v delete mode 100644 ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys_hw.tcl delete mode 100644 ip/nios2_hw_crc/HAL/doc/crc_main.c delete mode 100644 ip/nios2_hw_crc/HAL/src/ci_crc.c delete mode 100644 ip/nios2_hw_crc/HAL/src/crc.c delete mode 100644 ip/nios2_hw_crc/hdl/CRC_Component.v delete mode 100644 ip/nios2_hw_crc/hdl/CRC_Custom_Instruction.v delete mode 100644 ip/nios2_hw_crc/nios2_hw_crc32_hw.tcl delete mode 100644 ip/nios2_hw_crc/nios2_hw_crc32_sw.tcl create mode 160000 ip/pulpino_qsys create mode 100644 scripts/rv-reprogram.tcl create mode 100644 software/sys_controller/crt0.boot.S create mode 100644 software/sys_controller/link.common.ld create mode 100644 software/sys_controller/link.riscv.ld create mode 100644 software/sys_controller/pulpino.h rename ip/nios2_hw_crc/HAL/inc/crc.h => software/sys_controller_bsp/HAL/src/alt_putcharbuf.c (55%) delete mode 100644 software/sys_controller_bsp/drivers/inc/Altera_UP_SD_Card_Avalon_Interface_mod.h create mode 100644 software/sys_controller_bsp/drivers/inc/altera_avalon_timer.h create mode 100644 software/sys_controller_bsp/drivers/inc/altera_avalon_timer_regs.h delete mode 100644 software/sys_controller_bsp/drivers/src/Altera_UP_SD_Card_Avalon_Interface_mod.c create mode 100644 software/sys_controller_bsp/drivers/src/altera_avalon_timer_sc.c create mode 100644 software/sys_controller_bsp/drivers/src/altera_avalon_timer_ts.c rename ip/nios2_hw_crc/HAL/inc/ci_crc.h => software/sys_controller_bsp/drivers/src/altera_avalon_timer_vars.c (82%) create mode 100644 tools/bin2hex.c diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 0000000..0495bad --- /dev/null +++ b/.gitmodules @@ -0,0 +1,3 @@ +[submodule "ip/pulpino_qsys"] + path = ip/pulpino_qsys + url = https://github.com/marqs85/pulpino_qsys.git diff --git a/ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys.v b/ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys.v deleted file mode 100644 index 16d875e..0000000 --- a/ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys.v +++ /dev/null @@ -1,56 +0,0 @@ -// (C) 2001-2015 Altera Corporation. All rights reserved. -// Your use of Altera Corporation's design tools, logic functions and other -// software and tools, and its AMPP partner logic functions, and any output -// files any of the foregoing (including device programming or simulation -// files), and any associated documentation or information are expressly subject -// to the terms and conditions of the Altera Program License Subscription -// Agreement, Altera MegaCore Function License Agreement, or other applicable -// license agreement, including, without limitation, that your use is for the -// sole purpose of programming logic devices manufactured by Altera and sold by -// Altera or its authorized distributors. Please refer to the applicable -// agreement for further details. - - -//Legal Notice: (C)2010 Altera Corporation. All rights reserved. Your -//use of Altera Corporation's design tools, logic functions and other -//software and tools, and its AMPP partner logic functions, and any -//output files any of the foregoing (including device programming or -//simulation files), and any associated documentation or information are -//expressly subject to the terms and conditions of the Altera Program -//License Subscription Agreement or other applicable license agreement, -//including, without limitation, that your use is for the sole purpose -//of programming logic devices manufactured by Altera and sold by Altera -//or its authorized distributors. Please refer to the applicable -//agreement for further details. - -// synthesis translate_off -`timescale 1ns / 1ps -// synthesis translate_on - -// turn off superfluous verilog processor warnings -// altera message_level Level1 -// altera message_off 10034 10035 10036 10037 10230 10240 10030 - -module endianconverter_qsys ( - // inputs: - dataa, - datab, - - // outputs: - result - ) -; - - output [ 31: 0] result; - input [ 31: 0] dataa; - input [ 31: 0] datab; - - wire [ 31: 0] result; - //s1, which is an e_custom_instruction_slave - assign result[7 : 0] = dataa[31 : 24]; - assign result[15 : 8] = dataa[23 : 16]; - assign result[23 : 16] = dataa[15 : 8]; - assign result[31 : 24] = dataa[7 : 0]; - -endmodule - diff --git a/ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys_hw.tcl b/ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys_hw.tcl deleted file mode 100644 index 32a5e05..0000000 --- a/ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys_hw.tcl +++ /dev/null @@ -1,84 +0,0 @@ -# (C) 2001-2015 Altera Corporation. All rights reserved. -# Your use of Altera Corporation's design tools, logic functions and other -# software and tools, and its AMPP partner logic functions, and any output -# files any of the foregoing (including device programming or simulation -# files), and any associated documentation or information are expressly subject -# to the terms and conditions of the Altera Program License Subscription -# Agreement, Altera MegaCore Function License Agreement, or other applicable -# license agreement, including, without limitation, that your use is for the -# sole purpose of programming logic devices manufactured by Altera and sold by -# Altera or its authorized distributors. Please refer to the applicable -# agreement for further details. - - -# TCL File Generated by Component Editor 10.1 -# Tue Aug 17 15:04:48 MYT 2010 -# DO NOT MODIFY - - -# +----------------------------------- -# | -# | -# | ./converter_0.v syn, sim -# | -# +----------------------------------- - -# +----------------------------------- -# | request TCL package from ACDS 10.1 -# | -package require -exact sopc 10.1 -# | -# +----------------------------------- - -# +----------------------------------- -# | module altera_nios_custom_instr_endian_converter -# | -set_module_property NAME altera_nios_custom_instr_endianconverter -set_module_property VERSION 17.1 -set_module_property INTERNAL false -set_module_property GROUP "Custom Instruction Modules" -set_module_property AUTHOR "Altera Corporation" -set_module_property DISPLAY_NAME "Endian Converter" -set_module_property HIDE_FROM_SOPC true -set_module_property TOP_LEVEL_HDL_FILE endianconverter_qsys.v -set_module_property TOP_LEVEL_HDL_MODULE endianconverter_qsys -set_module_property INSTANTIATE_IN_SYSTEM_MODULE true -set_module_property SIMULATION_MODEL_IN_VHDL true -set_module_property EDITABLE false -set_module_property ANALYZE_HDL FALSE -# | -# +----------------------------------- - -# +----------------------------------- -# | files -# | -add_file endianconverter_qsys.v {SYNTHESIS SIMULATION} -# | -# +----------------------------------- - -# +----------------------------------- -# | parameters -# | -# | -# +----------------------------------- - -# +----------------------------------- -# | display items -# | -# | -# +----------------------------------- - -# +----------------------------------- -# | connection point s1 -# | -add_interface s1 nios_custom_instruction end -set_interface_property s1 clockCycle 1 -set_interface_property s1 operands 1 - -set_interface_property s1 ENABLED true - -add_interface_port s1 dataa dataa Input 32 -add_interface_port s1 datab datab Input 32 -add_interface_port s1 result result Output 32 -# | -# +----------------------------------- diff --git a/ip/nios2_hw_crc/HAL/doc/crc_main.c b/ip/nios2_hw_crc/HAL/doc/crc_main.c deleted file mode 100644 index d16548c..0000000 --- a/ip/nios2_hw_crc/HAL/doc/crc_main.c +++ /dev/null @@ -1,224 +0,0 @@ -/****************************************************************************** -* * -* License Agreement * -* * -* Copyright (c) 2008 Altera Corporation, San Jose, California, USA. * -* All rights reserved. * -* * -* Permission is hereby granted, free of charge, to any person obtaining a * -* copy of this software and associated documentation files (the "Software"), * -* to deal in the Software without restriction, including without limitation * -* the rights to use, copy, modify, merge, publish, distribute, sublicense, * -* and/or sell copies of the Software, and to permit persons to whom the * -* Software is furnished to do so, subject to the following conditions: * -* * -* The above copyright notice and this permission notice shall be included in * -* all copies or substantial portions of the Software. * -* * -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * -* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * -* DEALINGS IN THE SOFTWARE. * -* * -* This agreement shall be governed in all respects by the laws of the State * -* of California and by the laws of the United States of America. * -* Altera does not recommend, suggest or require that this reference design * -* file be used in conjunction or combination with any other product. * -******************************************************************************/ - - -/****************************************************************************** -* Author - JCJB * -* * -* This design uses the following CRC-32 implementations: * -* * -* --> Software - Uses modulo 2 division to perform the remainder calculation. * -* --> Optimized Software - Uses a lookup table of all possible division * -* values. The calculation operates on 8 bit data. * -* --> Custom Instruction - Uses a parallel hardware CRC circuit to calculate * -* the remainder. The calculation operates on 8, * -* 16, 24, or 32 bit data. * -* * -* The software implementations can be changed to CRC-16 or CRC-CCITT however * -* the custom instruction must be modified as well to support the same * -* standard. Simply use the values defined in crc.h to change the standard * -* used (using the same values in the hardware parameterization) or define * -* your own standard. * -*******************************************************************************/ - -#include "system.h" -#include "stdio.h" -#include "crc.h" -#include "ci_crc.h" -#include "sys/alt_timestamp.h" -#include "stdlib.h" - - -/* Modify these values to adjust the test being performed */ -#define NUMBER_OF_BUFFERS 32 -#define BUFFER_SIZE 256 /* in bytes */ - -/* Change the name of memory device according to what you are using - * e.g.: DDR_SDRAM_0 ##_SPAN - * SSRAM_0 ##_SPAN - */ -#define MEMORY_DEVICE_SIZE 32768 - - -/* Make sure there is room left for Nios II text, rodata, rwdata, stack, - * and heap. This software and the buffer space must fit within the - * size of memory device. A total of 1.5 MBytes is reserved. If BUFFER_SIZE - * is a multiple of four then exactly 256kB will be left, otherwise is - * amount will be less since the column dimension needs some padding to - * stay 32 bit aligned - */ -#if ((BUFFER_SIZE * NUMBER_OF_BUFFERS) >= MEMORY_DEVICE_SIZE - 10000) - #error Your buffer space has exceeded the maximum allowable space. Please\ - reduce the buffer space so that there is enough room to hold Nios II\ - code. -#endif - - -/* This will line up the data onto a 32 bit (or greater) boundary. A 2d array - * is being used here for simplicity. The first dimension represents a byte - * of data and the second dimension represents an individual buffer - */ -#if ((BUFFER_SIZE & 0x3) == 0) - unsigned char data_buffer_region[NUMBER_OF_BUFFERS][BUFFER_SIZE] __attribute__ ((aligned(4))); -#else /* need to allocate extra bytes so that all buffers start on a 32 bit - boundaries by rounding up the column dimension to the next power of 4 - */ - unsigned char data_buffer_region[NUMBER_OF_BUFFERS][BUFFER_SIZE + 4 - (BUFFER_SIZE&0x3)] __attribute__ ((aligned(4))); -#endif - - - - - -int main() -{ - unsigned long buffer_counter, data_counter; - unsigned long sw_slow_results[NUMBER_OF_BUFFERS]; - unsigned long sw_fast_results[NUMBER_OF_BUFFERS]; - unsigned long ci_results[NUMBER_OF_BUFFERS]; - unsigned char random_data = 0x5A; - //unsigned long sw_slow_timeA, sw_slow_timeB; - // unsigned long sw_fast_timeA, sw_fast_timeB; - // unsigned long ci_timeA, ci_timeB; - - alt_u32 sw_slow_timeA, sw_slow_timeB; - alt_u32 sw_fast_timeA, sw_fast_timeB; - alt_u32 ci_timeA, ci_timeB; - - - printf("+-----------------------------------------------------------+\n"); - printf("| Comparison between software and custom instruction CRC32 |\n"); - printf("+-----------------------------------------------------------+\n\n\n"); - - printf("System specification\n"); - printf("--------------------\n"); - - printf("System clock speed = %lu MHz\n", (unsigned long)ALT_CPU_FREQ /(unsigned long)1000000); - printf("Number of buffer locations = %d\n", NUMBER_OF_BUFFERS); - printf("Size of each buffer = %d bytes\n\n\n", BUFFER_SIZE); - - - /* Initializing the data buffers */ - printf("Initializing all of the buffers with pseudo-random data\n"); - printf("-------------------------------------------------------\n"); - for(buffer_counter = 0; buffer_counter < NUMBER_OF_BUFFERS; buffer_counter++) - { - for(data_counter = 0; data_counter < BUFFER_SIZE; data_counter++) - { - data_buffer_region[buffer_counter][data_counter] = random_data; - random_data = (random_data >> 4) + (random_data << 4) + (data_counter & 0xFF); - } - } - printf("Initialization completed\n\n\n"); - - - if(alt_timestamp_start() < 0) // starts the timestamp timer - { - printf("Please add the high resolution timer to the timestamp timer setting in the syslib properties page.\n"); - exit(1); - } - - - /* Slow software CRC based on a modulo 2 division implementation */ - printf("Running the software CRC\n"); - printf("------------------------\n"); - sw_slow_timeA = alt_timestamp(); - - for(buffer_counter = 0; buffer_counter < NUMBER_OF_BUFFERS; buffer_counter++) - { - sw_slow_results[buffer_counter] = crcSlow(data_buffer_region[buffer_counter], BUFFER_SIZE); - } - sw_slow_timeB = alt_timestamp(); - - printf("Completed\n\n\n"); - - - /* Fast software CRC based on a lookup table implementation */ - crcInit(); - printf("Running the optimized software CRC\n"); - printf("----------------------------------\n"); - sw_fast_timeA = alt_timestamp(); - for(buffer_counter = 0; buffer_counter < NUMBER_OF_BUFFERS; buffer_counter++) - { - sw_fast_results[buffer_counter] = crcFast(data_buffer_region[buffer_counter], BUFFER_SIZE); - } - sw_fast_timeB = alt_timestamp(); - printf("Completed\n\n\n"); - - - /* Custom instruction CRC */ - printf("Running the custom instruction CRC\n"); - printf("----------------------------------\n"); - ci_timeA = alt_timestamp(); - for(buffer_counter = 0; buffer_counter < NUMBER_OF_BUFFERS; buffer_counter++) - { - ci_results[buffer_counter] = crcCI(data_buffer_region[buffer_counter], BUFFER_SIZE); - } - ci_timeB = alt_timestamp(); - printf("Completed\n\n\n"); - - /* Validation of results */ - printf("Validating the CRC results from all implementations\n"); - printf("----------------------------------------------------\n"); - for(buffer_counter = 0; buffer_counter < NUMBER_OF_BUFFERS; buffer_counter++) - { - /* Test every combination of results to make sure they are consistant */ - if((sw_slow_results[buffer_counter] != ci_results[buffer_counter]) | - (sw_fast_results[buffer_counter] != ci_results[buffer_counter])) - { - printf("FAILURE! Software CRC = 0x%lx, Optimized Software CRC = 0x%lx, Custom Instruction CRC = 0x%lx,\n", - sw_slow_results[buffer_counter], sw_fast_results[buffer_counter], ci_results[buffer_counter]); - exit(1); - } - } - printf("All CRC implementations produced the same results\n\n\n"); - - - // Report processing times - printf("Processing time for each implementation\n"); - printf("---------------------------------------\n"); - printf("Software CRC = %.2lu ms\n", 1000*((unsigned long)(sw_slow_timeB-sw_slow_timeA))/((unsigned long)alt_timestamp_freq())); - printf("Optimized software CRC = %.2lu ms\n", 1000*((unsigned long)(sw_fast_timeB-sw_fast_timeA))/((unsigned long)alt_timestamp_freq())); - printf("Custom instruction CRC = %.2lu ms\n\n\n", 1000*((unsigned long)(ci_timeB-ci_timeA))/((unsigned long)alt_timestamp_freq())); - - printf("Processing throughput for each implementation\n"); // throughput = total bits / (time(s) * 1000000) - printf("---------------------------------------------\n"); - printf("Software CRC = %.2lu Mbps\n", (8 * NUMBER_OF_BUFFERS * BUFFER_SIZE)/(1000000*(unsigned long)(sw_slow_timeB-sw_slow_timeA)/((unsigned long)alt_timestamp_freq()))); - printf("Optimized software CRC = %.2lu Mbps\n", (8 * NUMBER_OF_BUFFERS * BUFFER_SIZE)/(1000000*(unsigned long)(sw_fast_timeB-sw_fast_timeA)/((unsigned long)alt_timestamp_freq()))); - printf("Custom instruction CRC = %.2lu Mbps\n\n\n", (8 * NUMBER_OF_BUFFERS * BUFFER_SIZE)/(1000000*(unsigned long)(ci_timeB-ci_timeA)/((unsigned long)alt_timestamp_freq()))); - - printf("Speedup ratio\n"); - printf("-------------\n"); - printf("Custom instruction CRC vs software CRC = %lu\n", ((unsigned long)(sw_slow_timeB-sw_slow_timeA))/((unsigned long)(ci_timeB-ci_timeA))); - printf("Custom instruction CRC vs optimized software CRC = %lu\n", ((unsigned long)(sw_fast_timeB-sw_fast_timeA))/((unsigned long)(ci_timeB-ci_timeA))); - printf("Optimized software CRC vs software CRC= %lu\n", ((unsigned long)(sw_slow_timeB-sw_slow_timeA))/((unsigned long)(sw_fast_timeB-sw_fast_timeA))); - return 0; -} diff --git a/ip/nios2_hw_crc/HAL/src/ci_crc.c b/ip/nios2_hw_crc/HAL/src/ci_crc.c deleted file mode 100644 index 7f9b0f0..0000000 --- a/ip/nios2_hw_crc/HAL/src/ci_crc.c +++ /dev/null @@ -1,97 +0,0 @@ -/****************************************************************************** -* * -* License Agreement * -* * -* Copyright (c) 2008 Altera Corporation, San Jose, California, USA. * -* All rights reserved. * -* * -* Permission is hereby granted, free of charge, to any person obtaining a * -* copy of this software and associated documentation files (the "Software"), * -* to deal in the Software without restriction, including without limitation * -* the rights to use, copy, modify, merge, publish, distribute, sublicense, * -* and/or sell copies of the Software, and to permit persons to whom the * -* Software is furnished to do so, subject to the following conditions: * -* * -* The above copyright notice and this permission notice shall be included in * -* all copies or substantial portions of the Software. * -* * -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * -* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * -* DEALINGS IN THE SOFTWARE. * -* * -* This agreement shall be governed in all respects by the laws of the State * -* of California and by the laws of the United States of America. * -* Altera does not recommend, suggest or require that this reference design * -* file be used in conjunction or combination with any other product. * -******************************************************************************/ - - -/********************************************************************** - * - * Filename: ci_crc.c - * - * Description: Custom instruction implementations of the CRC. - * - * Notes: A macro is defined that is used to access the CRC custom - * instruction. - *********************************************************************/ - -#include "system.h" - -/*The n values and their corresponding operation are as follow: - * n = 0, Initialize the custom instruction to the initial remainder value - * n = 1, Write 8 bits data to custom instruction - * n = 2, Write 16 bits data to custom instruction - * n = 3, Write 32 bits data to custom instruction - * n = 4, Read 32 bits data from the custom instruction - * n = 5, Read 64 bits data from the custom instruction - * n = 6, Read 96 bits data from the custom instruction - * n = 7, Read 128 bits data from the custom instruction*/ -#define CRC_CI_MACRO(n, A) __builtin_custom_ini(ALT_CI_NIOS2_HW_CRC32_0_N + (n & 0x7), (A)) - -unsigned long crcCI(unsigned char * input_data, unsigned long input_data_length, int do_initialize) -{ - unsigned long index; - /* copy of the data buffer pointer so that it can advance by different widths */ - void * input_data_copy = (void *)input_data; - - /* The custom instruction CRC will initialize to the inital remainder value */ - if (do_initialize) - CRC_CI_MACRO(0,0); - - /* Write 32 bit data to the custom instruction. If the buffer does not end - * on a 32 bit boundary then the remaining data will be sent to the custom - * instruction in the 'if' statement below. - */ - for(index = 0; index < (input_data_length & 0xFFFFFFFC); index+=4) - { - CRC_CI_MACRO(3, *(unsigned long *)input_data_copy); - input_data_copy += 4; /* void pointer, must move by 4 for each word */ - } - - /* Write the remainder of the buffer if it does not end on a word boundary */ - if((input_data_length & 0x3) == 0x3) /* 3 bytes left */ - { - CRC_CI_MACRO(2, *(unsigned short *)input_data_copy); - input_data_copy += 2; - CRC_CI_MACRO(1, *(unsigned char *)input_data_copy); - } - else if((input_data_length & 0x3) == 0x2) /* 2 bytes left */ - { - CRC_CI_MACRO(2, *(unsigned short *)input_data_copy); - } - else if((input_data_length & 0x3) == 0x1) /* 1 byte left */ - { - CRC_CI_MACRO(1, *(unsigned char *)input_data_copy); - } - - /* There are 4 registers in the CRC custom instruction. Since - * this example uses CRC-32 only the first register must be read - * in order to receive the full result. - */ - return CRC_CI_MACRO(4, 0); -} diff --git a/ip/nios2_hw_crc/HAL/src/crc.c b/ip/nios2_hw_crc/HAL/src/crc.c deleted file mode 100644 index f00568d..0000000 --- a/ip/nios2_hw_crc/HAL/src/crc.c +++ /dev/null @@ -1,265 +0,0 @@ -/****************************************************************************** -* * -* License Agreement * -* * -* Copyright (c) 2008 Altera Corporation, San Jose, California, USA. * -* All rights reserved. * -* * -* Permission is hereby granted, free of charge, to any person obtaining a * -* copy of this software and associated documentation files (the "Software"), * -* to deal in the Software without restriction, including without limitation * -* the rights to use, copy, modify, merge, publish, distribute, sublicense, * -* and/or sell copies of the Software, and to permit persons to whom the * -* Software is furnished to do so, subject to the following conditions: * -* * -* The above copyright notice and this permission notice shall be included in * -* all copies or substantial portions of the Software. * -* * -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * -* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * -* DEALINGS IN THE SOFTWARE. * -* * -* This agreement shall be governed in all respects by the laws of the State * -* of California and by the laws of the United States of America. * -* Altera does not recommend, suggest or require that this reference design * -* file be used in conjunction or combination with any other product. * -******************************************************************************/ - - -/********************************************************************** - * - * Filename: crc.c - * - * Description: Slow and fast implementations of the CRC standards. - * - * Notes: The parameters for each supported CRC standard are - * defined in the header file crc.h. The implementations - * here should stand up to further additions to that list. - * - * - * Copyright (c) 2000 by Michael Barr. This software is placed into - * the public domain and may be used for any purpose. However, this - * notice must not be changed or removed and no warranty is either - * expressed or implied by its publication or distribution. - **********************************************************************/ - -#include "crc.h" - - -/* - * Derive parameters from the standard-specific parameters in crc.h. - */ -#define WIDTH (8 * sizeof(crc)) -#define TOPBIT (1 << (WIDTH - 1)) - -#if (REFLECT_DATA == TRUE) -#undef REFLECT_DATA -#define REFLECT_DATA(X) ((unsigned char) reflect((X), 8)) -#else -#undef REFLECT_DATA -#define REFLECT_DATA(X) (X) -#endif - -#if (REFLECT_REMAINDER == TRUE) -#undef REFLECT_REMAINDER -#define REFLECT_REMAINDER(X) ((crc) reflect((X), WIDTH)) -#else -#undef REFLECT_REMAINDER -#define REFLECT_REMAINDER(X) (X) -#endif - - -/********************************************************************* - * - * Function: reflect() - * - * Description: Reorder the bits of a binary sequence, by reflecting - * them about the middle position. - * - * Notes: No checking is done that nBits <= 32. - * - * Returns: The reflection of the original data. - * - *********************************************************************/ -static unsigned long -reflect(unsigned long data, unsigned char nBits) -{ - unsigned long reflection = 0x00000000; - unsigned char bit; - - /* - * Reflect the data about the center bit. - */ - for (bit = 0; bit < nBits; ++bit) - { - /* - * If the LSB bit is set, set the reflection of it. - */ - if (data & 0x01) - { - reflection |= (1 << ((nBits - 1) - bit)); - } - - data = (data >> 1); - } - - return (reflection); - -} /* reflect() */ - - -/********************************************************************* - * - * Function: crcSlow() - * - * Description: Compute the CRC of a given message. - * - * Notes: - * - * Returns: The CRC of the message. - * - *********************************************************************/ -crc -crcSlow(unsigned char const message[], int nBytes) -{ - crc remainder = INITIAL_REMAINDER; - int byte; - unsigned char bit; - - - /* - * Perform modulo-2 division, a byte at a time. - */ - for (byte = 0; byte < nBytes; ++byte) - { - /* - * Bring the next byte into the remainder. - */ - remainder ^= (REFLECT_DATA(message[byte]) << (WIDTH - 8)); - - /* - * Perform modulo-2 division, a bit at a time. - */ - for (bit = 8; bit > 0; --bit) - { - /* - * Try to divide the current data bit. - */ - if (remainder & TOPBIT) - { - remainder = (remainder << 1) ^ POLYNOMIAL; - } - else - { - remainder = (remainder << 1); - } - } - } - - /* - * The final remainder is the CRC result. - */ - return (REFLECT_REMAINDER(remainder) ^ FINAL_XOR_VALUE); - -} /* crcSlow() */ - - -crc crcTable[256]; - - -/********************************************************************* - * - * Function: crcInit() - * - * Description: Populate the partial CRC lookup table. - * - * Notes: This function must be rerun any time the CRC standard - * is changed. If desired, it can be run "offline" and - * the table results stored in an embedded system's ROM. - * - * Returns: None defined. - * - *********************************************************************/ -void -crcInit(void) -{ - crc remainder; - int dividend; - unsigned char bit; - - - /* - * Compute the remainder of each possible dividend. - */ - for (dividend = 0; dividend < 256; ++dividend) - { - /* - * Start with the dividend followed by zeros. - */ - remainder = dividend << (WIDTH - 8); - - /* - * Perform modulo-2 division, a bit at a time. - */ - for (bit = 8; bit > 0; --bit) - { - /* - * Try to divide the current data bit. - */ - if (remainder & TOPBIT) - { - remainder = (remainder << 1) ^ POLYNOMIAL; - } - else - { - remainder = (remainder << 1); - } - } - - /* - * Store the result into the table. - */ - crcTable[dividend] = remainder; - } - -} /* crcInit() */ - - -/********************************************************************* - * - * Function: crcFast() - * - * Description: Compute the CRC of a given message. - * - * Notes: crcInit() must be called first. - * - * Returns: The CRC of the message. - * - *********************************************************************/ -crc -crcFast(unsigned char const message[], int nBytes) -{ - crc remainder = INITIAL_REMAINDER; - unsigned char data; - int byte; - - - /* - * Divide the message by the polynomial, a byte at a time. - */ - for (byte = 0; byte < nBytes; ++byte) - { - data = REFLECT_DATA(message[byte]) ^ (remainder >> (WIDTH - 8)); - remainder = crcTable[data] ^ (remainder << 8); - } - - /* - * The final remainder is the CRC. - */ - return (REFLECT_REMAINDER(remainder) ^ FINAL_XOR_VALUE); - -} /* crcFast() */ diff --git a/ip/nios2_hw_crc/hdl/CRC_Component.v b/ip/nios2_hw_crc/hdl/CRC_Component.v deleted file mode 100644 index 5c67836..0000000 --- a/ip/nios2_hw_crc/hdl/CRC_Component.v +++ /dev/null @@ -1,314 +0,0 @@ -/* - Legal Notice: (C)2006 Altera Corporation. All rights reserved. Your - use of Altera Corporation's design tools, logic functions and other - software and tools, and its AMPP partner logic functions, and any - output files any of the foregoing (including device programming or - simulation files), and any associated documentation or information are - expressly subject to the terms and conditions of the Altera Program - License Subscription Agreement or other applicable license agreement, - including, without limitation, that your use is for the sole purpose - of programming logic devices manufactured by Altera and sold by Altera - or its authorized distributors. Please refer to the applicable - agreement for further details. -*/ - -/* - This component supports 8, 16, 24, and 32 bit little endian data - and any CRC standard between 1 to 128 bits. Through parameterization - you can change the CRC standard which will take effect after you - regenerate your system in SOPC Builder. - - Register Map: - 000 -> reset the CRC peripheral to the inital value (data and byte enables ignored) - 001 -> data write between 1-32 bits - 010 -> reserved - 011 -> reserved - 100 -> read bits 1-32 of the crc result - 101 -> read bits 33-64 of the crc result (where applicable) - 110 -> read bits 65-96 of the crc result (where applicable) - 111 -> read bits 97-128 of the crc result (where applicable) - - Write latency = 0 - Read latency = 1 - - Note: This component uses four blocks of eight bits of data in cascade. - To improve the timing of logic you can create seperate cascades - for 8, 16, 24, and 32 bit data which will allow for smaller area - and a shorter combinational depth. Since CRC logic consumes power - even when not in use you can also add a logic disable feature using - the chipselect signal. Even though the registered CRC value is - held constant when the circuit is not in use the input data will - change during this time and cause the CRC cascade logic to react. -*/ - - -module CRC_Component (clk, - reset, - address, - writedata, - byteenable, - write, - read, - chipselect, - readdata); - -/* - Using these parameters you can create any CRC ranging from one bit (parity checker) - up to 128 bits. The following list describes the function of each parameter: - - crc_width: - The width of the registered CRC result, this value is typically apart of - the name of the standard (CRC32 is 32 bits wide). Adjusting this value - will impact the logic resource usage. - - polynomial_initial: - The initial value set for the CRC result register. By writing any data to address 0 - this value will be stored in the result register thereby clearing any previously existing - value. This value must be the same width as 'crc_width' - - polynomial: - This is the divisor value used on the input data. Typically shown in polynomial format - the value symbolizes the placement of xor operation on the input data. In synthesis, the - polynomial bits that are '1' will create a not gate, whereas the bits that are '0' will - simply create a wire. Even with 32 stages of these operations cascaded, the simple logic - will not become a significant factor on logic utilization or fmax. This value must be the - same width as 'crc_width' - - reflected_input: - Some CRC standards require that all the input bits be reflected around the center point. - This option is enabled with '1' and disabled with '0'. Typically this option is enabled - or disabled with 'reflected_output'. - - reflected_output: - Some CRC standards require that all the output bits be reflected around the center point. - This operation occurs before the final optional xor output step. This option is enabled - with '1' and disabled with '0'. Typically this option is enabled or disabled with - 'reflected_input' (to undo the input reversal typically). - - xor_output: - This is the value used to bitwise xor the CRC result. Most standards use either all zeros - or all ones for this value. When zeros are used the CRC result is passed directly and when - ones are used the CRC result is inverted. Since it's no mandatory that this value be all - ones or zeros, this operation occurs before the output reflection when applicable. -*/ - - parameter crc_width = 32; - parameter polynomial_inital = 32'hFFFFFFFF; - parameter polynomial = 32'h04C11DB7; - parameter reflected_input = 1; - parameter reflected_output = 1; - parameter xor_output = 32'hFFFFFFFF; - - - input clk; - input reset; - input [2:0] address; - input [31:0] writedata; - input [3:0] byteenable; - input write; - input read; - input chipselect; - output [31:0] readdata; - - reg [crc_width-1:0] crc_value; - wire [crc_width-1:0] poly = polynomial; - wire [crc_width-1:0] cascade [3:0]; - wire [7:0] block0_data, block1_data, block2_data, block3_data; - wire [crc_width-1:0] result, result_xored; - wire [31:0] mux_result; - reg [31:0] readdata; - - - /* - Some standards like CRC16 and CRC32 require this bitreversal for serial - devices like ethernet, uarts, usb, etc... - */ - genvar index; - generate if (reflected_input == 1) - begin - for(index = 0; index < 8; index = index + 1) - begin: input_reflection - assign block0_data[index] = writedata[7-index]; - assign block1_data[index] = writedata[15-index]; - assign block2_data[index] = writedata[23-index]; - assign block3_data[index] = writedata[31-index]; - end - end - else - begin - assign block0_data = writedata[7:0]; - assign block1_data = writedata[15:8]; - assign block2_data = writedata[23:16]; - assign block3_data = writedata[31:24]; - end - endgenerate - - - /* - Control for the registered events. It assumes that either 8, 16, 24, or 32 - bit data is being written using byte enables. It is important that the data - be in little endian format and no gaps of byte enables be present (like - 1011 or 1101 for example) - */ - always @ (posedge clk or posedge reset) - begin - if(reset == 1) - begin - crc_value <= 0; - end - else - begin - if(write && chipselect && (address == 3'b000)) - begin - crc_value <= polynomial_inital; // reset the crc to the initial value - end - else if(write && chipselect && (address == 3'b001)) - begin - if(byteenable == 4'b0001) // 8 bit data input - begin - crc_value <= cascade[0]; - end - else if(byteenable == 4'b0011) // 16 bit data input - begin - crc_value <= cascade[1]; - end - else if(byteenable == 4'b0111) // 24 bit data input - begin - crc_value <= cascade[2]; - end - else if(byteenable == 4'b1111) // 32 bit data input - begin - crc_value <= cascade[3]; - end - end - end - end - - - /* four stages of cascade blocks (each block is crc_width x 8 bits) */ - XOR_Shift_Block cascade_block0(.block_input(crc_value), .poly(poly), .data_input(block0_data), .block_output(cascade[0])); - defparam cascade_block0.crc_width = crc_width; - XOR_Shift_Block cascade_block1(.block_input(cascade[0]), .poly(poly), .data_input(block1_data), .block_output(cascade[1])); - defparam cascade_block1.crc_width = crc_width; - XOR_Shift_Block cascade_block2(.block_input(cascade[1]), .poly(poly), .data_input(block2_data), .block_output(cascade[2])); - defparam cascade_block2.crc_width = crc_width; - XOR_Shift_Block cascade_block3(.block_input(cascade[2]), .poly(poly), .data_input(block3_data), .block_output(cascade[3])); - defparam cascade_block3.crc_width = crc_width; - - - - /* - Some standards like CRC16 and CRC32 require this bitreversal. - This is to better support serial devices like uarts, ethernet, usb, etc...) - */ - generate if (reflected_output == 1) - begin - for(index = 0; index < crc_width; index = index + 1) - begin: output_reflection32 - assign result[index] = crc_value[(crc_width-1)-index]; - end - end - else - begin - assign result = crc_value; - end - endgenerate - - - /* This final xor operation occurs after the bit swap */ - assign result_xored = result ^ xor_output; - - - /* Generates the appropriate MUX logic depending on the CRC width */ - generate if((crc_width > 32) && (crc_width < 65)) - begin - assign mux_result = (address == 3'b100)? result_xored[31:0] : result_xored[crc_width-1:32]; - end - else if((crc_width > 64) && (crc_width < 97)) - begin - assign mux_result = (address == 3'b100)? result_xored[31:0] : - ((address == 3'b101)? result_xored[63:32] : result_xored[crc_width-1:64]); - end - else if((crc_width > 96) && (crc_width < 129)) - begin - assign mux_result = (address == 3'b100)? result_xored[31:0] : - ((address == 3'b101)? result_xored[63:32] : - ((address == 3'b110)? result_xored[95:64] : result_xored[crc_width-1:96])); - end - else - begin - assign mux_result = result_xored; - end - endgenerate - - - /* Registering the return path of the CRC data (32 bits of it) */ - always @ (posedge clk or posedge reset) - begin - if(reset == 1) - begin - readdata <= 0; - end - else if((read == 1) && (chipselect == 1)) - begin - readdata <= mux_result; - end - end - -endmodule - - - -/* a single cascade block of width: crc_width and a length of eight input bits */ -module XOR_Shift_Block(block_input, - poly, - data_input, - block_output); - parameter crc_width = 32; - - input [(crc_width-1):0] block_input; - input [(crc_width-1):0] poly; - input [7:0] data_input; - output [(crc_width-1):0] block_output; - - wire [(crc_width-1):0] cascade [7:0]; - - XOR_Shift bit_0(.stage_input(block_input), .poly(poly), .new_bit(data_input[7]), .stage_output(cascade[0])); - defparam bit_0.crc_width = crc_width; - XOR_Shift bit_1(.stage_input(cascade[0]), .poly(poly), .new_bit(data_input[6]), .stage_output(cascade[1])); - defparam bit_1.crc_width = crc_width; - XOR_Shift bit_2(.stage_input(cascade[1]), .poly(poly), .new_bit(data_input[5]), .stage_output(cascade[2])); - defparam bit_2.crc_width = crc_width; - XOR_Shift bit_3(.stage_input(cascade[2]), .poly(poly), .new_bit(data_input[4]), .stage_output(cascade[3])); - defparam bit_3.crc_width = crc_width; - XOR_Shift bit_4(.stage_input(cascade[3]), .poly(poly), .new_bit(data_input[3]), .stage_output(cascade[4])); - defparam bit_4.crc_width = crc_width; - XOR_Shift bit_5(.stage_input(cascade[4]), .poly(poly), .new_bit(data_input[2]), .stage_output(cascade[5])); - defparam bit_5.crc_width = crc_width; - XOR_Shift bit_6(.stage_input(cascade[5]), .poly(poly), .new_bit(data_input[1]), .stage_output(cascade[6])); - defparam bit_6.crc_width = crc_width; - XOR_Shift bit_7(.stage_input(cascade[6]), .poly(poly), .new_bit(data_input[0]), .stage_output(cascade[7])); - defparam bit_7.crc_width = crc_width; - - assign block_output = cascade[7]; - -endmodule - - -/* performs the 'new_bit' stuffing, shifting, and XOR operations for a single input bit */ -module XOR_Shift (stage_input, - poly, - new_bit, - stage_output); - - parameter crc_width = 32; - - input [crc_width-1:0] stage_input; - input [crc_width-1:0] poly; - input new_bit; - output [crc_width-1:0] stage_output; - - assign stage_output[0] = new_bit ^ stage_input[crc_width-1]; - assign stage_output[crc_width-1:1] = stage_input[crc_width-2:0] ^ ({crc_width-1{stage_output[0]}} & poly[crc_width-1:1]); - -endmodule diff --git a/ip/nios2_hw_crc/hdl/CRC_Custom_Instruction.v b/ip/nios2_hw_crc/hdl/CRC_Custom_Instruction.v deleted file mode 100644 index f24f7bb..0000000 --- a/ip/nios2_hw_crc/hdl/CRC_Custom_Instruction.v +++ /dev/null @@ -1,101 +0,0 @@ -/* - Legal Notice: (C)2006 Altera Corporation. All rights reserved. Your - use of Altera Corporation's design tools, logic functions and other - software and tools, and its AMPP partner logic functions, and any - output files any of the foregoing (including device programming or - simulation files), and any associated documentation or information are - expressly subject to the terms and conditions of the Altera Program - License Subscription Agreement or other applicable license agreement, - including, without limitation, that your use is for the sole purpose - of programming logic devices manufactured by Altera and sold by Altera - or its authorized distributors. Please refer to the applicable - agreement for further details. -*/ - -/* - This thin wrapper re-uses the CRC Avalon component as a Nios II - custom instruction. The n port of custom instruction is used as - control to the CRC Avalon component. Below are the values of n and - the corresponding operations perform by the custom instruction: - n = 0, Initialize the custom instruction to the initial remainder value - n = 1, Write 8 bits data to custom instruction - n = 2, Write 16 bits data to custom instruction - n = 3, Write 32 bits data to custom instruction - n = 4, Read 32 bits data from the custom instruction - n = 5, Read 64 bits data from the custom instruction - n = 6, Read 96 bits data from the custom instruction - n = 7, Read 128 bits data from the custom instruction -*/ - - - -module CRC_Custom_Instruction(clk, - reset, - dataa, - n, - clk_en, - start, - done, - result); - /* - See the Avalon CRC component for details on the meaning of each - parameter listed below. - */ - parameter crc_width = 32; - parameter polynomial_inital = 32'hFFFFFFFF; - parameter polynomial = 32'h04C11DB7; - parameter reflected_input = 1; - parameter reflected_output = 1; - parameter xor_output = 32'hFFFFFFFF; - - input clk; - input reset; - input [31:0] dataa; - input [2:0] n; - input clk_en; - input start; - output done; - output [31:0] result; - - wire [2:0] address; - wire [3:0] byteenable; - wire write; - wire read; - reg done_delay; - - assign write = (n<4); - assign read = (n>3); - assign byteenable = (n==1)?4'b0001 : (n==2)?4'b0011 : (n==3)?4'b1111 : 4'b0000; - assign address = (n==0)?3'b000 : ((n==1)|(n==2)|(n==3))?3'b001 : (n==4)?3'b100 : (n==5)?3'b101 : (n==6)?3'b110 : 3'b111; - assign done = (n>3)? done_delay : start; - - always @ (posedge clk or posedge reset) - begin - if (reset) - done_delay <= 0; - else - done_delay <= start; - end - - /* - Instantiating the Avalon CRC component and wiring it to be - custom instruction compilant - */ - CRC_Component wrapper_wiring(.clk(clk), - .reset(reset), - .address(address), - .writedata(dataa), - .byteenable(byteenable), - .write(write & start), - .read(read), - .chipselect(clk_en), - .readdata(result)); - - defparam wrapper_wiring.crc_width = crc_width; - defparam wrapper_wiring.polynomial_inital = polynomial_inital; - defparam wrapper_wiring.polynomial = polynomial; - defparam wrapper_wiring.reflected_input = reflected_input; - defparam wrapper_wiring.reflected_output = reflected_output; - defparam wrapper_wiring.xor_output = xor_output; - -endmodule diff --git a/ip/nios2_hw_crc/nios2_hw_crc32_hw.tcl b/ip/nios2_hw_crc/nios2_hw_crc32_hw.tcl deleted file mode 100644 index aa5ecdd..0000000 --- a/ip/nios2_hw_crc/nios2_hw_crc32_hw.tcl +++ /dev/null @@ -1,116 +0,0 @@ -# TCL File Generated by Component Editor 15.1 -# Tue Dec 22 18:46:40 EET 2015 -# DO NOT MODIFY - - -# -# nios2_hw_crc32 "nios2_hw_crc32" v1.0 -# 2015.12.22.18:46:40 -# -# - -# -# request TCL package from ACDS 15.1 -# -package require -exact qsys 15.1 - - -# -# module nios2_hw_crc32 -# -set_module_property DESCRIPTION "" -set_module_property NAME nios2_hw_crc32 -set_module_property VERSION 17.1 -set_module_property INTERNAL false -set_module_property OPAQUE_ADDRESS_MAP true -set_module_property GROUP "Custom Instruction Modules" -set_module_property AUTHOR "" -set_module_property DISPLAY_NAME nios2_hw_crc32 -set_module_property INSTANTIATE_IN_SYSTEM_MODULE true -set_module_property EDITABLE true -set_module_property REPORT_TO_TALKBACK false -set_module_property ALLOW_GREYBOX_GENERATION false -set_module_property REPORT_HIERARCHY false - - -# -# file sets -# -add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" -set_fileset_property QUARTUS_SYNTH TOP_LEVEL CRC_Custom_Instruction -set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false -set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false -add_fileset_file CRC_Component.v VERILOG PATH hdl/CRC_Component.v -add_fileset_file CRC_Custom_Instruction.v VERILOG PATH hdl/CRC_Custom_Instruction.v TOP_LEVEL_FILE - - -# -# parameters -# -add_parameter crc_width INTEGER 32 -set_parameter_property crc_width DEFAULT_VALUE 32 -set_parameter_property crc_width DISPLAY_NAME crc_width -set_parameter_property crc_width TYPE INTEGER -set_parameter_property crc_width UNITS None -set_parameter_property crc_width HDL_PARAMETER true -add_parameter polynomial_inital STD_LOGIC_VECTOR 4294967295 -set_parameter_property polynomial_inital DEFAULT_VALUE 4294967295 -set_parameter_property polynomial_inital DISPLAY_NAME polynomial_inital -set_parameter_property polynomial_inital TYPE STD_LOGIC_VECTOR -set_parameter_property polynomial_inital UNITS None -set_parameter_property polynomial_inital ALLOWED_RANGES 0:17179869183 -set_parameter_property polynomial_inital HDL_PARAMETER true -add_parameter polynomial STD_LOGIC_VECTOR 79764919 -set_parameter_property polynomial DEFAULT_VALUE 79764919 -set_parameter_property polynomial DISPLAY_NAME polynomial -set_parameter_property polynomial TYPE STD_LOGIC_VECTOR -set_parameter_property polynomial UNITS None -set_parameter_property polynomial ALLOWED_RANGES 0:17179869183 -set_parameter_property polynomial HDL_PARAMETER true -add_parameter reflected_input INTEGER 1 -set_parameter_property reflected_input DEFAULT_VALUE 1 -set_parameter_property reflected_input DISPLAY_NAME reflected_input -set_parameter_property reflected_input TYPE INTEGER -set_parameter_property reflected_input UNITS None -set_parameter_property reflected_input HDL_PARAMETER true -add_parameter reflected_output INTEGER 1 -set_parameter_property reflected_output DEFAULT_VALUE 1 -set_parameter_property reflected_output DISPLAY_NAME reflected_output -set_parameter_property reflected_output TYPE INTEGER -set_parameter_property reflected_output UNITS None -set_parameter_property reflected_output HDL_PARAMETER true -add_parameter xor_output STD_LOGIC_VECTOR 4294967295 -set_parameter_property xor_output DEFAULT_VALUE 4294967295 -set_parameter_property xor_output DISPLAY_NAME xor_output -set_parameter_property xor_output TYPE STD_LOGIC_VECTOR -set_parameter_property xor_output UNITS None -set_parameter_property xor_output ALLOWED_RANGES 0:17179869183 -set_parameter_property xor_output HDL_PARAMETER true - - -# -# display items -# - - -# -# connection point nios_custom_instruction_slave -# -add_interface nios_custom_instruction_slave nios_custom_instruction end -set_interface_property nios_custom_instruction_slave clockCycle 0 -set_interface_property nios_custom_instruction_slave operands 1 -set_interface_property nios_custom_instruction_slave ENABLED true -set_interface_property nios_custom_instruction_slave EXPORT_OF "" -set_interface_property nios_custom_instruction_slave PORT_NAME_MAP "" -set_interface_property nios_custom_instruction_slave CMSIS_SVD_VARIABLES "" -set_interface_property nios_custom_instruction_slave SVD_ADDRESS_GROUP "" - -add_interface_port nios_custom_instruction_slave clk clk Input 1 -add_interface_port nios_custom_instruction_slave clk_en clk_en Input 1 -add_interface_port nios_custom_instruction_slave dataa dataa Input 32 -add_interface_port nios_custom_instruction_slave done done Output 1 -add_interface_port nios_custom_instruction_slave n n Input 3 -add_interface_port nios_custom_instruction_slave reset reset Input 1 -add_interface_port nios_custom_instruction_slave result result Output 32 -add_interface_port nios_custom_instruction_slave start start Input 1 - diff --git a/ip/nios2_hw_crc/nios2_hw_crc32_sw.tcl b/ip/nios2_hw_crc/nios2_hw_crc32_sw.tcl deleted file mode 100644 index ce0d0e4..0000000 --- a/ip/nios2_hw_crc/nios2_hw_crc32_sw.tcl +++ /dev/null @@ -1,58 +0,0 @@ -# (C) 2001-2015 Altera Corporation. All rights reserved. -# Your use of Altera Corporation's design tools, logic functions and other -# software and tools, and its AMPP partner logic functions, and any output -# files any of the foregoing (including device programming or simulation -# files), and any associated documentation or information are expressly subject -# to the terms and conditions of the Altera Program License Subscription -# Agreement, Altera MegaCore Function License Agreement, or other applicable -# license agreement, including, without limitation, that your use is for the -# sole purpose of programming logic devices manufactured by Altera and sold by -# Altera or its authorized distributors. Please refer to the applicable -# agreement for further details. - - -# TCL File Generated by Altera University Program -# DO NOT MODIFY - -set aup_version 15.1 - -# Create a new driver - this name must be different than the -# hardware component name -create_driver nios2_hw_crc32_driver - -# Associate it with some hardware -set_sw_property hw_class_name nios2_hw_crc32 - -# The version of this driver -set_sw_property version $aup_version - -# This driver is proclaimed to be compatible with 'component' -# as old as version "1.0". The component hardware version is set in the -# _hw.tcl file - If the hardware component version number is not equal -# or greater than the min_compatable_hw_version number, the driver -# source files will not be copied over to the BSP driver directory -set_sw_property min_compatible_hw_version 1.0 - -# Initialize the driver in alt_sys_init() -set_sw_property auto_initialize false - -# Location in generated BSP that sources will be copied into -set_sw_property bsp_subdirectory drivers - -# -# Source file listings... -# - -# C/C++ source files -add_sw_property c_source HAL/src/ci_crc.c -add_sw_property c_source HAL/src/crc.c - -# Include files -add_sw_property include_source HAL/inc/ci_crc.h -add_sw_property include_source HAL/inc/crc.h - -# This driver supports HAL type -add_sw_property supported_bsp_type HAL - -# End of file - diff --git a/ip/pulpino_qsys b/ip/pulpino_qsys new file mode 160000 index 0000000..b11dd77 --- /dev/null +++ b/ip/pulpino_qsys @@ -0,0 +1 @@ +Subproject commit b11dd7718e6d367cbaef8a362ce206510fd87ed0 diff --git a/rtl/ossc.v b/rtl/ossc.v index 3980c89..1918ef3 100644 --- a/rtl/ossc.v +++ b/rtl/ossc.v @@ -83,6 +83,7 @@ wire DE_out_videogen; reg [7:0] cpu_reset_ctr = 0; reg cpu_reset_n = 1'b0; +wire ext_reset_req; reg [7:0] R_in_L, G_in_L, B_in_L; reg HSYNC_in_L, VSYNC_in_L, FID_in_L; @@ -226,7 +227,12 @@ end sys sys_inst( .clk_clk (clk27), - .reset_reset_n (cpu_reset_n), + .reset_reset_n (cpu_reset_n & ~ext_reset_req), + .pulpino_0_config_testmode_i (1'b0), + .pulpino_0_config_fetch_enable_i (1'b1), + .pulpino_0_config_clock_gating_i (1'b0), + .pulpino_0_config_boot_addr_i (32'h00010000), + .master_0_master_reset_reset (ext_reset_req), .i2c_opencores_0_export_scl_pad_io (scl), .i2c_opencores_0_export_sda_pad_io (sda), .i2c_opencores_0_export_spi_miso_pad_i (1'b0), diff --git a/scripts/rv-reprogram.tcl b/scripts/rv-reprogram.tcl new file mode 100644 index 0000000..80be390 --- /dev/null +++ b/scripts/rv-reprogram.tcl @@ -0,0 +1,25 @@ +#Select the master service type and check for available service paths. +set service_paths [get_service_paths master] + +#Set the master service path. +set master_service_path [lindex $service_paths 0] + +#Open the master service. +set claim_path [claim_service master $master_service_path mylib] + +puts "Halting CPU" +master_write_32 $claim_path 0x0 0x1 + +puts "Writing block RAM" +master_write_from_file $claim_path mem_init/sys_onchip_memory2_0.bin 0x10000 + +close_service master $claim_path + + +set jtag_debug_list [get_service_paths jtag_debug] +set jd [ lindex $jtag_debug_list 0 ] +open_service jtag_debug $jd +puts "Resetting system" +jtag_debug_reset_system $jd +close_service jtag_debug $jd +puts "Done" diff --git a/software/ossc_sw.project b/software/ossc_sw.project index e30f872..5d8bca9 100644 --- a/software/ossc_sw.project +++ b/software/ossc_sw.project @@ -161,7 +161,7 @@ - + diff --git a/software/sys_controller/Makefile b/software/sys_controller/Makefile index c0ee74d..e5b48fc 100644 --- a/software/sys_controller/Makefile +++ b/software/sys_controller/Makefile @@ -754,6 +754,8 @@ ifeq ($(MKDIR),) MKDIR := $(DEFAULT_MKDIR) endif +RV_OBJCOPY = riscv64-unknown-elf-objcopy + #------------------------------------------------------------------------------ # PATTERN RULES TO BUILD OBJECTS #------------------------------------------------------------------------------ @@ -1127,5 +1129,16 @@ print-elf-name: ossc/menu_sjis.c: ossc/menu.c iconv -f UTF-8 -t SHIFT-JIS ossc/menu.c > ossc/menu_sjis.c +mem_init/sys_onchip_memory2_0.hex: sys_controller.elf + $(RV_OBJCOPY) --change-addresses -0x10000 -O binary --gap-fill 0 $< mem_init/sys_onchip_memory2_0.bin + ../../tools/bin2hex mem_init/sys_onchip_memory2_0.bin mem_init/sys_onchip_memory2_0.hex + +.PHONY: mem_init_generate_new +mem_init_generate_new: mem_init/sys_onchip_memory2_0.hex + .PHONY: generate_hex -generate_hex: clean mem_init_generate +generate_hex: clean mem_init_generate_new + +.PHONY: rv-reprogram +rv-reprogram: mem_init_generate_new + system-console -cli --script ../../scripts/rv-reprogram.tcl diff --git a/software/sys_controller/crt0.boot.S b/software/sys_controller/crt0.boot.S new file mode 100644 index 0000000..863deb9 --- /dev/null +++ b/software/sys_controller/crt0.boot.S @@ -0,0 +1,103 @@ +// Copyright 2017 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the “License”); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +#include "pulpino.h" + +#define EXCEPTION_STACK_SIZE 72 + + +/* ========================================================= [ entry ] === */ + .section .text + +default_exc_handler: + jal x0, default_exc_handler + +reset_handler: + /* set all registers to zero */ + mv x1, x0 + mv x2, x1 + mv x3, x1 + mv x4, x1 + mv x5, x1 + mv x6, x1 + mv x7, x1 + mv x8, x1 + mv x9, x1 + mv x10, x1 + mv x11, x1 + mv x12, x1 + mv x13, x1 + mv x14, x1 + mv x15, x1 + mv x16, x1 + mv x17, x1 + mv x18, x1 + mv x19, x1 + mv x20, x1 + mv x21, x1 + mv x22, x1 + mv x23, x1 + mv x24, x1 + mv x25, x1 + mv x26, x1 + mv x27, x1 + mv x28, x1 + mv x29, x1 + mv x30, x1 + mv x31, x1 + + /* stack initilization */ + la x2, _stack_start + +_start: + .global _start + + /* clear BSS */ + la x26, _bss_start + la x27, _bss_end + + bge x26, x27, zero_loop_end + +zero_loop: + sw x0, 0(x26) + addi x26, x26, 4 + ble x26, x27, zero_loop +zero_loop_end: + + +main_entry: + /* jump to alt_main program entry point */ + jal alt_main + +/* =================================================== [ exceptions ] === */ +/* This section has to be down here, since we have to disable rvc for it */ + + .section .vectors, "ax" + .option norvc; + + // external interrupts are handled by the same callback + // until compiler supports IRQ routines + .org 0x00 + .rept 31 + nop + .endr + jal x0, default_exc_handler + + // reset vector + .org 0x80 + jal x0, reset_handler + + // illegal instruction exception + .org 0x84 + jal x0, default_exc_handler + + // ecall handler + .org 0x88 + jal x0, default_exc_handler diff --git a/software/sys_controller/it6613/hdmitx.h b/software/sys_controller/it6613/hdmitx.h index fe5d011..857a7ab 100644 --- a/software/sys_controller/it6613/hdmitx.h +++ b/software/sys_controller/it6613/hdmitx.h @@ -52,7 +52,7 @@ //#define NULL 0 //typedef unsigned char bool; -#include "Altera_UP_SD_Card_Avalon_Interface_mod.h" +typedef unsigned char bool; #include "sysconfig.h" // Hardwired to CPU reset diff --git a/software/sys_controller/link.common.ld b/software/sys_controller/link.common.ld new file mode 100644 index 0000000..d302ada --- /dev/null +++ b/software/sys_controller/link.common.ld @@ -0,0 +1,135 @@ +SEARCH_DIR(.) +__DYNAMIC = 0; + +MEMORY +{ + dataram : ORIGIN = 0x00010000, LENGTH = 0x9000 +} + +/* Stack information variables */ +_min_stack = 0x400; /* 1K - minimum stack space to reserve */ +_stack_start = ORIGIN(dataram) + LENGTH(dataram); + +/* We have to align each sector to word boundaries as our current s19->slm + * conversion scripts are not able to handle non-word aligned sections. */ + +SECTIONS +{ + .vectors : + { + . = ALIGN(4); + KEEP(*(.vectors)) + } > dataram + + .text : { + . = ALIGN(4); + _stext = .; + *(.text) + *(.text.*) + _etext = .; + __CTOR_LIST__ = .; + LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) + *(.ctors) + LONG(0) + __CTOR_END__ = .; + __DTOR_LIST__ = .; + LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) + *(.dtors) + LONG(0) + __DTOR_END__ = .; + *(.lit) + *(.shdata) + _endtext = .; + } > dataram + + /*--------------------------------------------------------------------*/ + /* Global constructor/destructor segement */ + /*--------------------------------------------------------------------*/ + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > dataram + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array )) + PROVIDE_HIDDEN (__init_array_end = .); + } > dataram + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array )) + PROVIDE_HIDDEN (__fini_array_end = .); + } > dataram + + .rodata : { + . = ALIGN(4); + *(.rodata); + *(.rodata.*) + } > dataram + + .shbss : + { + . = ALIGN(4); + *(.shbss) + } > dataram + + .data : { + . = ALIGN(4); + sdata = .; + _sdata = .; + *(.data); + *(.data.*) + *(.sdata); + *(.sdata.*) + *(.sdata2); + *(.sdata2.*) + edata = .; + _edata = .; + } > dataram + + .bss : + { + . = ALIGN(4); + _bss_start = .; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(COMMON) + _bss_end = .; + } > dataram + + /* ensure there is enough room for stack */ + .stack (NOLOAD): { + . = ALIGN(4); + . = . + _min_stack ; + . = ALIGN(4); + stack = . ; + _stack = . ; + } > dataram + + .stab 0 (NOLOAD) : + { + [ .stab ] + } + + .stabstr 0 (NOLOAD) : + { + [ .stabstr ] + } + + .bss : + { + . = ALIGN(4); + _end = .; + } > dataram +} + diff --git a/software/sys_controller/link.riscv.ld b/software/sys_controller/link.riscv.ld new file mode 100644 index 0000000..24f8fb0 --- /dev/null +++ b/software/sys_controller/link.riscv.ld @@ -0,0 +1,7 @@ +/* not needed, but we need separate linker scripts anyway */ +OUTPUT_ARCH(riscv) + +/* required to correctly link newlib */ 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+:041CA700000164C014 +:041CA800000164C40F +:041CA900000164F0E2 +:041CAA0000016500D0 +:041CAB000001651CB3 +:041CAC0000016524AA +:041CAD000001662CA0 +:041CAE000001663893 +:041CAF0000017200BE +:041CB0000000000729 +:041CB10000016BD8EB +:041CB200000000032B +:041CB30000016C645C +:041CB400000000022A +:041CB50000016CA01E +:041CB6000000000822 +:041CB70000016CC8F4 +:041CB8000000000D1B +:041CB90000016D6851 +:041CBA000000000B1B +:041CBB0000016E6C4A +:041CBC00000000051F +:041CBD0000016F486B +:041CBE00000000081A +:041CBF0000016FAC05 +:041CC000000000061A +:041CC1000001704C62 +:041CC2000000000915 +:041CC300000170C4E8 +:041CC400C896554B1E :00000001FF diff --git a/software/sys_controller/ossc/controls.c b/software/sys_controller/ossc/controls.c index 35b49df..65db3c1 100644 --- a/software/sys_controller/ossc/controls.c +++ b/software/sys_controller/ossc/controls.c @@ -163,7 +163,7 @@ int parse_control() ((fpga_status >> 16) & 0x3) ? '*' : ' ', fpga_v_hz_x100/100, fpga_v_hz_x100%100);*/ - sniprintf(menu_row2, LCD_ROW_LEN+1, "%4lu%c%c %u", (((fpga_status & 0x7ff)+1)<> 16) & 0x3) ? '*' : ' ', IORD_ALTERA_AVALON_PIO_DATA(PIO_8_BASE)); diff --git a/software/sys_controller/ossc/firmware.h b/software/sys_controller/ossc/firmware.h index d3307af..a7e2e76 100644 --- a/software/sys_controller/ossc/firmware.h +++ b/software/sys_controller/ossc/firmware.h @@ -24,7 +24,7 @@ #include "sysconfig.h" #define FW_VER_MAJOR 0 -#define FW_VER_MINOR 81 +#define FW_VER_MINOR 82 #ifdef ENABLE_AUDIO #define FW_SUFFIX1 "a" diff --git a/software/sys_controller/pulpino.h b/software/sys_controller/pulpino.h new file mode 100644 index 0000000..7ca19ef --- /dev/null +++ b/software/sys_controller/pulpino.h @@ -0,0 +1,91 @@ +// Copyright 2017 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the “License”); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +/** + * @file + * @brief Register mapping for PULPino peripherals. + * + * Contains event register mappings for the PULPino SOC as + * well as some general definitions for the overall system. + * + * @author Florian Zaruba + * + * @version 1.0 + * + * @date 2/10/2015 + * + */ +#ifndef PULPINO_H +#define PULPINO_H + +#define PULPINO_BASE_ADDR 0x10000000 + +/** SOC PERIPHERALS */ +#define SOC_PERIPHERALS_BASE_ADDR ( PULPINO_BASE_ADDR + 0xA100000 ) + +#define UART_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x0000 ) +#define GPIO_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x1000 ) +#define SPI_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x2000 ) +#define TIMER_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x3000 ) +#define EVENT_UNIT_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x4000 ) +#define I2C_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x5000 ) +#define FLL_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x6000 ) +#define SOC_CTRL_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x7000 ) + +/** STDOUT */ +#define STDOUT_BASE_ADDR ( SOC_PERIPHERALS_BASE_ADDR + 0x10000 ) +#define FPUTCHAR_BASE_ADDR ( STDOUT_BASE_ADDR + 0x1000 ) +#define FILE_CMD_BASE_ADDR ( STDOUT_BASE_ADDR + 0x2000 ) +#define STREAM_BASE_ADDR ( STDOUT_BASE_ADDR + 0x3000 ) + +/** Instruction RAM */ +#define INSTR_RAM_BASE_ADDR ( 0x00 ) +#define INSTR_RAM_START_ADDR ( 0x80 ) + +/** ROM */ +#define ROM_BASE_ADDR ( 0x10000 ) + +/** Data RAM */ +#define DATA_RAM_BASE_ADDR ( 0x00100000 ) + +/** Registers and pointers */ +#define REGP(x) ((volatile unsigned int*)(x)) +#define REG(x) (*((volatile unsigned int*)(x))) +#define REGP_8(x) (((volatile uint8_t*)(x))) + +/* pointer to mem of apb pulpino unit - PointerSocCtrl */ +#define __PSC__(a) *(unsigned volatile int*) (SOC_CTRL_BASE_ADDR + a) + +/** Peripheral Clock gating */ +#define CGREG __PSC__(0x04) + +/** Clock gate SPI */ +#define CGSPI 0x00 +/** Clock gate UART */ +#define CGUART 0x01 +/** Clock gate GPIO */ +#define CGGPIO 0x02 +/** Clock gate SPI Master */ +#define CGGSPIM 0x03 +/** Clock gate Timer */ +#define CGTIM 0x04 +/** Clock gate Event Unit */ +#define CGEVENT 0x05 +/** Clock gate I2C */ +#define CGGI2C 0x06 +/** Clock gate FLL */ +#define CGFLL 0x07 + +/** Boot address register */ +#define BOOTREG __PSC__(0x08) + +#define RES_STATUS __PSC__(0x14) + +#endif diff --git a/software/sys_controller_bsp/HAL/src/alt_busy_sleep.c b/software/sys_controller_bsp/HAL/src/alt_busy_sleep.c index 561c0be..4efd28e 100644 --- a/software/sys_controller_bsp/HAL/src/alt_busy_sleep.c +++ b/software/sys_controller_bsp/HAL/src/alt_busy_sleep.c @@ -57,77 +57,13 @@ unsigned int alt_busy_sleep (unsigned int us) * skipped to speed up simulation. */ #ifndef ALT_SIM_OPTIMIZE - int i; - int big_loops; - alt_u32 cycles_per_loop; - - if (!strcmp(NIOS2_CPU_IMPLEMENTATION,"tiny")) - { - cycles_per_loop = 9; - } - else - { - cycles_per_loop = 3; - } - + unsigned long i, loops; - big_loops = us / (INT_MAX/ - (ALT_CPU_FREQ/(cycles_per_loop * 1000000))); + // 1 loop >= 7 cyc + loops = ((ALT_CPU_FREQ/1000000)*us)/7; - if (big_loops) - { - for(i=0;i= ALT_PUTBUF_SIZE) + alt_putbufflush(); + return c; +} + +/* + * ALT putbufflush + * used only for smehosting + * Not thread safe! + * Dumps all the chars in the buffer to STDOUT + */ +int +alt_putbufflush() +{ + int results; + results = write(STDOUT_FILENO,buf,fill_index); + fill_index = 0; + return results; +} +#endif diff --git a/software/sys_controller_bsp/Makefile b/software/sys_controller_bsp/Makefile index 37e1e44..d40fbf4 100644 --- a/software/sys_controller_bsp/Makefile +++ b/software/sys_controller_bsp/Makefile @@ -256,6 +256,7 @@ hal_C_LIB_SRCS := \ $(hal_SRCS_ROOT)/src/alt_dev_llist_insert.c \ $(hal_SRCS_ROOT)/src/alt_errno.c \ $(hal_SRCS_ROOT)/src/alt_flash_dev.c \ + $(hal_SRCS_ROOT)/src/alt_main.c # i2c_opencores_driver sources root i2c_opencores_driver_SRCS_ROOT := drivers diff --git a/software/sys_controller_bsp/alt_sys_init.c b/software/sys_controller_bsp/alt_sys_init.c index ea8e0b6..a500582 100644 --- a/software/sys_controller_bsp/alt_sys_init.c +++ b/software/sys_controller_bsp/alt_sys_init.c @@ -83,11 +83,11 @@ I2C_OPENCORES_INSTANCE ( I2C_OPENCORES_1, i2c_opencores_1); * present for backwards-compatibility. */ -/*void alt_irq_init ( const void* base ) +void alt_irq_init ( const void* base ) { - ALTERA_NIOS2_GEN2_IRQ_INIT ( NIOS2_QSYS_0, nios2_qsys_0); - alt_irq_cpu_enable_interrupts(); -}*/ + /*ALTERA_NIOS2_GEN2_IRQ_INIT ( NIOS2_QSYS_0, nios2_qsys_0); + alt_irq_cpu_enable_interrupts();*/ +} /* * Initialize the non-interrupt controller devices. diff --git a/software/sys_controller_bsp/drivers/inc/Altera_UP_SD_Card_Avalon_Interface_mod.h b/software/sys_controller_bsp/drivers/inc/Altera_UP_SD_Card_Avalon_Interface_mod.h deleted file mode 100644 index 4e1dbef..0000000 --- a/software/sys_controller_bsp/drivers/inc/Altera_UP_SD_Card_Avalon_Interface_mod.h +++ /dev/null @@ -1,166 +0,0 @@ -#ifndef __ALTERA_UP_SD_CARD_AVALON_INTERFACE_H__ -#define __ALTERA_UP_SD_CARD_AVALON_INTERFACE_H__ - -#include -#include -#include - -#ifdef __cplusplus -extern "C" -{ -#endif /* __cplusplus */ - -#define SD_RAW_IFACE - -/* - * Device structure definition. Each instance of the driver uses one - * of these structures to hold its associated state. - */ -typedef struct alt_up_sd_card_dev { - /// @brief character mode device structure - /// @sa Developing Device Drivers for the HAL in Nios II Software Developer's Handbook - alt_dev dev; - /// @brief the base address of the device - unsigned int base; - -} alt_up_sd_card_dev; - -#ifndef bool - typedef enum e_bool { false = 0, true = 1 } bool; -#endif - -////////////////////////////////////////////////////////////////////////// -// HAL system functions - -alt_up_sd_card_dev* alt_up_sd_card_open_dev(const char *name); -/* Open an SD Card Interface if it is connected to the system. */ - - -bool alt_up_sd_card_is_Present(void); -/* Check if there is an SD Card insterted into the SD Card socket. - */ - -#ifndef SD_RAW_IFACE -bool alt_up_sd_card_is_FAT16(void); -/* This function reads the SD card data in an effort to determine if the card is formated as a FAT16 - * volume. Please note that FAT12 has a similar format, but will not be supported by this driver. - */ - - -short int alt_up_sd_card_fopen(char *name, bool create); -/* This function reads the SD card data in an effort to determine if the card is formated as a FAT16 - * volume. Please note that FAT12 has a similar format, but will not be supported by this driver. - * - * Inputs: - * name - a file name including a directory, relative to the root directory - * create - a flag set to true to create a file if it does not already exist - * Output: - * An index to the file record assigned to the specified file. -1 is returned if the file could not be opened. - */ - - -short int alt_up_sd_card_find_first(char *directory_to_search_through, char *file_name); -/* This function sets up a search algorithm to go through a given directory looking for files. - * If the search directory is valid, then the function searches for the first file it finds. - * Inputs: - * directory_to_search_through - name of the directory to search through - * file_name - an array to store a name of the file found. Must be 13 bytes long (12 bytes for file name and 1 byte of NULL termination). - * Outputs: - * 0 - success - * 1 - invalid directory - * 2 - No card or incorrect card format. - * - * To specify a directory give the name in a format consistent with the following regular expression: - * [{[valid_chars]+}/]*. - * - * In other words, give a path name starting at the root directory, where each directory name is followed by a '/'. - * Then, append a '.' to the directory name. Examples: - * "." - look through the root directory - * "first/." - look through a directory named "first" that is located in the root directory. - * "first/sub/." - look through a directory named "sub", that is located within the subdirectory named "first". "first" is located in the root directory. - * Invalid examples include: - * "/.", "/////." - this is not the root directory. - * "/first/." - the first character may not be a '/'. - */ - - - -short int alt_up_sd_card_find_next(char *file_name); -/* This function searches for the next file in a given directory, as specified by the find_first function. - * Inputs: - * file_name - an array to store a name of the file found. Must be 13 bytes long (12 bytes for file name and 1 byte of NULL termination). - * Outputs: - * -1 - end of directory. - * 0 - success - * 2 - No card or incorrect card format. - * 4 - find_first has not been called successfully. - */ - -void alt_up_sd_card_set_attributes(short int file_handle, short int attributes); -/* Set file attributes as needed. - */ - -short int alt_up_sd_card_get_attributes(short int file_handle); -/* Return file attributes, or -1 if the file_handle is invalid. - */ - - -short int alt_up_sd_card_read(short int file_handle); -/* Read a single character from the given file. Return -1 if at the end of a file. Any other negative number - * means that the file could not be read. A number between 0 and 255 is an ASCII character read from the SD Card. */ - - -bool alt_up_sd_card_write(short int file_handle, char byte_of_data); -/* Write a single character to a given file. Return true if successful, and false otherwise. */ - - -bool alt_up_sd_card_fclose(short int file_handle); -// This function closes an opened file and saves data to SD Card if necessary. - -#else -bool Write_Sector_Data(int sector_index, int partition_offset); -bool Save_Modified_Sector(); -bool Read_Sector_Data(int sector_index, int partition_offset); -#endif //SD_RAW_IFACE - -////////////////////////////////////////////////////////////////////////// -// file-like operation functions - -////////////////////////////////////////////////////////////////////////// -// direct operation functions - - -/* - * Macros used by alt_sys_init - */ -#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_MOD_INSTANCE(name, device) \ - static alt_up_sd_card_dev device = \ - { \ - { \ - ALT_LLIST_ENTRY, \ - name##_NAME, \ - NULL , /* open */ \ - NULL , /* close */ \ - NULL, /* read */ \ - NULL, /* write */ \ - NULL , /* lseek */ \ - NULL , /* fstat */ \ - NULL , /* ioctl */ \ - }, \ - name##_BASE, \ - } - -#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_MOD_INIT(name, device) \ -{ \ - alt_dev_reg(&device.dev); \ -} - - - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* __ALTERA_UP_SD_CARD_AVALON_INTERFACE_H__ */ - - diff --git a/software/sys_controller_bsp/drivers/inc/altera_avalon_timer.h b/software/sys_controller_bsp/drivers/inc/altera_avalon_timer.h new file mode 100644 index 0000000..dae4193 --- /dev/null +++ b/software/sys_controller_bsp/drivers/inc/altera_avalon_timer.h @@ -0,0 +1,193 @@ +#ifndef __ALT_AVALON_TIMER_H__ +#define __ALT_AVALON_TIMER_H__ + +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +* Altera does not recommend, suggest or require that this reference design * +* file be used in conjunction or combination with any other product. * +******************************************************************************/ + +#include + +#include "alt_types.h" +#include "sys/alt_dev.h" +#include "sys/alt_warning.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + + +#define __ALT_COUNTER_SIZE(name) name##_COUNTER_SIZE +#define _ALT_COUNTER_SIZE(name) __ALT_COUNTER_SIZE(name) + +#define ALT_SYS_CLK_COUNTER_SIZE _ALT_COUNTER_SIZE(ALT_SYS_CLK) +#define ALT_TIMESTAMP_COUNTER_SIZE _ALT_COUNTER_SIZE(ALT_TIMESTAMP_CLK) + +#if (ALT_SYS_CLK_COUNTER_SIZE == 64) +#define alt_sysclk_type alt_u64 +#else +#define alt_sysclk_type alt_u32 +#endif + +#if (ALT_TIMESTAMP_COUNTER_SIZE == 64) +#define alt_timestamp_type alt_u64 +#else +#define alt_timestamp_type alt_u32 +#endif + +/* + * The function alt_avalon_timer_sc_init() is the initialisation function for + * the system clock. It registers the timers interrupt handler, and then calls + * the system clock regestration function, alt_sysclk_init(). + */ + +extern void alt_avalon_timer_sc_init (void* base, alt_u32 irq_controller_id, + alt_u32 irq, alt_u32 freq); + +/* + * Variables used to store the timestamp parameters, when the device is to be + * accessed using the high resolution timestamp driver. + */ + +extern void* altera_avalon_timer_ts_base; +extern alt_u32 altera_avalon_timer_ts_freq; + +/* + * ALTERA_AVALON_TIMER_INSTANCE is the macro used by alt_sys_init() to + * allocate any per device memory that may be required. In this case no + * allocation is necessary. + */ + +#define ALTERA_AVALON_TIMER_INSTANCE(name, dev) extern int alt_no_storage + +/* + * Macro used to calculate the timer interrupt frequency. Although this is + * somewhat fearsome, when compiled with -O2 it will be resolved at compile + * time to a constant value. + */ + +#define ALTERA_AVALON_TIMER_FREQ(freq, period, units) \ + strcmp (units, "us") ? \ + (strcmp (units, "ms") ? \ + (strcmp (units, "s") ? \ + ((freq + (period - 1))/period) \ + : 1) \ + : (1000 + (period - 1))/period) \ + : ((1000000 + (period - 1))/period) + +/* + * Construct macros which contain the base address of the system clock and the + * timestamp device. These are used below to determine which driver to use for + * a given timer. + */ + +#define __ALT_CLK_BASE(name) name##_BASE +#define _ALT_CLK_BASE(name) __ALT_CLK_BASE(name) + +#define ALT_SYS_CLK_BASE _ALT_CLK_BASE(ALT_SYS_CLK) +#define ALT_TIMESTAMP_CLK_BASE _ALT_CLK_BASE(ALT_TIMESTAMP_CLK) + +/* + * If there is no system clock, then the above macro will result in + * ALT_SYS_CLK_BASE being set to none_BASE. We therefore need to provide an + * invalid value for this, so that no timer is wrongly identified as the system + * clock. + */ + +#define none_BASE 0xffffffff + +/* + * ALTERA_AVALON_TIMER_INIT is the macro used by alt_sys_init() to provide + * the run time initialisation of the device. In this case this translates to + * a call to alt_avalon_timer_sc_init() if the device is the system clock, i.e. + * if it has the name "sysclk". + * + * If the device is not the system clock, then it is used to provide the + * timestamp facility. + * + * To ensure as much as possible is evaluated at compile time, rather than + * compare the name of the device to "/dev/sysclk" using strcmp(), the base + * address of the device is compared to SYSCLK_BASE to determine whether it's + * the system clock. Since the base address of a device must be unique, these + * two aproaches are equivalent. + * + * This macro performs a sanity check to ensure that the interrupt has been + * connected for this device. If not, then an apropriate error message is + * generated at build time. + */ + + +#define ALTERA_AVALON_TIMER_INIT(name, dev) \ + if (name##_BASE == ALT_SYS_CLK_BASE) \ + { \ + if (name##_IRQ == ALT_IRQ_NOT_CONNECTED) \ + { \ + ALT_LINK_ERROR ("Error: Interrupt not connected for " #dev ". " \ + "The system clock driver requires an interrupt to be " \ + "connected. Please select an IRQ for this device in " \ + "SOPC builder."); \ + } \ + else \ + { \ + alt_avalon_timer_sc_init((void*) name##_BASE, \ + name##_IRQ_INTERRUPT_CONTROLLER_ID, \ + name##_IRQ, \ + ALTERA_AVALON_TIMER_FREQ(name##_FREQ, \ + name##_PERIOD, \ + name##_PERIOD_UNITS));\ + } \ + } \ + else if (name##_BASE == ALT_TIMESTAMP_CLK_BASE) \ + { \ + if (name##_SNAPSHOT) \ + { \ + altera_avalon_timer_ts_base = (void*) name##_BASE; \ + altera_avalon_timer_ts_freq = name##_FREQ; \ + } \ + else \ + { \ + ALT_LINK_ERROR ("Error: Snapshot register not available for " \ + #dev ". " \ + "The timestamp driver requires the snapshot register " \ + "to be readable. Please enable this register for this " \ + "device in SOPC builder."); \ + } \ + } + +/* + * + */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __ALT_AVALON_TIMER_H__ */ diff --git a/software/sys_controller_bsp/drivers/inc/altera_avalon_timer_regs.h b/software/sys_controller_bsp/drivers/inc/altera_avalon_timer_regs.h new file mode 100644 index 0000000..37bb44d --- /dev/null +++ b/software/sys_controller_bsp/drivers/inc/altera_avalon_timer_regs.h @@ -0,0 +1,202 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#ifndef __ALTERA_AVALON_TIMER_REGS_H__ +#define __ALTERA_AVALON_TIMER_REGS_H__ + +#include + +/* STATUS register */ +#define ALTERA_AVALON_TIMER_STATUS_REG 0 +#define IOADDR_ALTERA_AVALON_TIMER_STATUS(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_STATUS_REG) +#define IORD_ALTERA_AVALON_TIMER_STATUS(base) \ + IORD(base, ALTERA_AVALON_TIMER_STATUS_REG) +#define IOWR_ALTERA_AVALON_TIMER_STATUS(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_STATUS_REG, data) +#define ALTERA_AVALON_TIMER_STATUS_TO_MSK (0x1) +#define ALTERA_AVALON_TIMER_STATUS_TO_OFST (0) +#define ALTERA_AVALON_TIMER_STATUS_RUN_MSK (0x2) +#define ALTERA_AVALON_TIMER_STATUS_RUN_OFST (1) + +/* CONTROL register */ +#define ALTERA_AVALON_TIMER_CONTROL_REG 1 +#define IOADDR_ALTERA_AVALON_TIMER_CONTROL(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_CONTROL_REG) +#define IORD_ALTERA_AVALON_TIMER_CONTROL(base) \ + IORD(base, ALTERA_AVALON_TIMER_CONTROL_REG) +#define IOWR_ALTERA_AVALON_TIMER_CONTROL(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_CONTROL_REG, data) +#define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK (0x1) +#define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST (0) +#define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK (0x2) +#define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST (1) +#define ALTERA_AVALON_TIMER_CONTROL_START_MSK (0x4) +#define ALTERA_AVALON_TIMER_CONTROL_START_OFST (2) +#define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK (0x8) +#define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST (3) + +/* Period and SnapShot Register for COUNTER_SIZE = 32 */ +/*----------------------------------------------------*/ +/* PERIODL register */ +#define ALTERA_AVALON_TIMER_PERIODL_REG 2 +#define IOADDR_ALTERA_AVALON_TIMER_PERIODL(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIODL_REG) +#define IORD_ALTERA_AVALON_TIMER_PERIODL(base) \ + IORD(base, ALTERA_AVALON_TIMER_PERIODL_REG) +#define IOWR_ALTERA_AVALON_TIMER_PERIODL(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_PERIODL_REG, data) +#define ALTERA_AVALON_TIMER_PERIODL_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_PERIODL_OFST (0) + +/* PERIODH register */ +#define ALTERA_AVALON_TIMER_PERIODH_REG 3 +#define IOADDR_ALTERA_AVALON_TIMER_PERIODH(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIODH_REG) +#define IORD_ALTERA_AVALON_TIMER_PERIODH(base) \ + IORD(base, ALTERA_AVALON_TIMER_PERIODH_REG) +#define IOWR_ALTERA_AVALON_TIMER_PERIODH(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_PERIODH_REG, data) +#define ALTERA_AVALON_TIMER_PERIODH_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_PERIODH_OFST (0) + +/* SNAPL register */ +#define ALTERA_AVALON_TIMER_SNAPL_REG 4 +#define IOADDR_ALTERA_AVALON_TIMER_SNAPL(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAPL_REG) +#define IORD_ALTERA_AVALON_TIMER_SNAPL(base) \ + IORD(base, ALTERA_AVALON_TIMER_SNAPL_REG) +#define IOWR_ALTERA_AVALON_TIMER_SNAPL(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_SNAPL_REG, data) +#define ALTERA_AVALON_TIMER_SNAPL_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_SNAPL_OFST (0) + +/* SNAPH register */ +#define ALTERA_AVALON_TIMER_SNAPH_REG 5 +#define IOADDR_ALTERA_AVALON_TIMER_SNAPH(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAPH_REG) +#define IORD_ALTERA_AVALON_TIMER_SNAPH(base) \ + IORD(base, ALTERA_AVALON_TIMER_SNAPH_REG) +#define IOWR_ALTERA_AVALON_TIMER_SNAPH(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_SNAPH_REG, data) +#define ALTERA_AVALON_TIMER_SNAPH_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_SNAPH_OFST (0) + +/* Period and SnapShot Register for COUNTER_SIZE = 64 */ +/*----------------------------------------------------*/ +/* PERIOD_0 register */ +#define ALTERA_AVALON_TIMER_PERIOD_0_REG 2 +#define IOADDR_ALTERA_AVALON_TIMER_PERIOD_0(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIOD_0_REG) +#define IORD_ALTERA_AVALON_TIMER_PERIOD_0(base) \ + IORD(base, ALTERA_AVALON_TIMER_PERIOD_0_REG) +#define IOWR_ALTERA_AVALON_TIMER_PERIOD_0(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_PERIOD_0_REG, data) +#define ALTERA_AVALON_TIMER_PERIOD_0_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_PERIOD_0_OFST (0) + +/* PERIOD_1 register */ +#define ALTERA_AVALON_TIMER_PERIOD_1_REG 3 +#define IOADDR_ALTERA_AVALON_TIMER_PERIOD_1(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIOD_1_REG) +#define IORD_ALTERA_AVALON_TIMER_PERIOD_1(base) \ + IORD(base, ALTERA_AVALON_TIMER_PERIOD_1_REG) +#define IOWR_ALTERA_AVALON_TIMER_PERIOD_1(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_PERIOD_1_REG, data) +#define ALTERA_AVALON_TIMER_PERIOD_1_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_PERIOD_1_OFST (0) + +/* PERIOD_2 register */ +#define ALTERA_AVALON_TIMER_PERIOD_2_REG 4 +#define IOADDR_ALTERA_AVALON_TIMER_PERIOD_2(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIOD_2_REG) +#define IORD_ALTERA_AVALON_TIMER_PERIOD_2(base) \ + IORD(base, ALTERA_AVALON_TIMER_PERIOD_2_REG) +#define IOWR_ALTERA_AVALON_TIMER_PERIOD_2(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_PERIOD_2_REG, data) +#define ALTERA_AVALON_TIMER_PERIOD_2_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_PERIOD_2_OFST (0) + +/* PERIOD_3 register */ +#define ALTERA_AVALON_TIMER_PERIOD_3_REG 5 +#define IOADDR_ALTERA_AVALON_TIMER_PERIOD_3(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIOD_3_REG) +#define IORD_ALTERA_AVALON_TIMER_PERIOD_3(base) \ + IORD(base, ALTERA_AVALON_TIMER_PERIOD_3_REG) +#define IOWR_ALTERA_AVALON_TIMER_PERIOD_3(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_PERIOD_3_REG, data) +#define ALTERA_AVALON_TIMER_PERIOD_3_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_PERIOD_3_OFST (0) + +/* SNAP_0 register */ +#define ALTERA_AVALON_TIMER_SNAP_0_REG 6 +#define IOADDR_ALTERA_AVALON_TIMER_SNAP_0(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAP_0_REG) +#define IORD_ALTERA_AVALON_TIMER_SNAP_0(base) \ + IORD(base, ALTERA_AVALON_TIMER_SNAP_0_REG) +#define IOWR_ALTERA_AVALON_TIMER_SNAP_0(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_SNAP_0_REG, data) +#define ALTERA_AVALON_TIMER_SNAP_0_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_SNAP_0_OFST (0) + +/* SNAP_1 register */ +#define ALTERA_AVALON_TIMER_SNAP_1_REG 7 +#define IOADDR_ALTERA_AVALON_TIMER_SNAP_1(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAP_1_REG) +#define IORD_ALTERA_AVALON_TIMER_SNAP_1(base) \ + IORD(base, ALTERA_AVALON_TIMER_SNAP_1_REG) +#define IOWR_ALTERA_AVALON_TIMER_SNAP_1(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_SNAP_1_REG, data) +#define ALTERA_AVALON_TIMER_SNAP_1_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_SNAP_1_OFST (0) + +/* SNAP_2 register */ +#define ALTERA_AVALON_TIMER_SNAP_2_REG 8 +#define IOADDR_ALTERA_AVALON_TIMER_SNAP_2(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAP_2_REG) +#define IORD_ALTERA_AVALON_TIMER_SNAP_2(base) \ + IORD(base, ALTERA_AVALON_TIMER_SNAP_2_REG) +#define IOWR_ALTERA_AVALON_TIMER_SNAP_2(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_SNAP_2_REG, data) +#define ALTERA_AVALON_TIMER_SNAP_2_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_SNAP_2_OFST (0) + +/* SNAP_3 register */ +#define ALTERA_AVALON_TIMER_SNAP_3_REG 9 +#define IOADDR_ALTERA_AVALON_TIMER_SNAP_3(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAP_3_REG) +#define IORD_ALTERA_AVALON_TIMER_SNAP_3(base) \ + IORD(base, ALTERA_AVALON_TIMER_SNAP_3_REG) +#define IOWR_ALTERA_AVALON_TIMER_SNAP_3(base, data) \ + IOWR(base, ALTERA_AVALON_TIMER_SNAP_3_REG, data) +#define ALTERA_AVALON_TIMER_SNAP_3_MSK (0xFFFF) +#define ALTERA_AVALON_TIMER_SNAP_3_OFST (0) + +#endif /* __ALTERA_AVALON_TIMER_REGS_H__ */ diff --git a/software/sys_controller_bsp/drivers/src/Altera_UP_SD_Card_Avalon_Interface_mod.c b/software/sys_controller_bsp/drivers/src/Altera_UP_SD_Card_Avalon_Interface_mod.c deleted file mode 100644 index b98e077..0000000 --- a/software/sys_controller_bsp/drivers/src/Altera_UP_SD_Card_Avalon_Interface_mod.c +++ /dev/null @@ -1,1908 +0,0 @@ -/****************************************************************************** -* * -* License Agreement * -* * -* Copyright (c) 2006 Altera Corporation, San Jose, California, USA. * -* All rights reserved. * -* * -* Permission is hereby granted, free of charge, to any person obtaining a * -* copy of this software and associated documentation files (the "Software"), * -* to deal in the Software without restriction, including without limitation * -* the rights to use, copy, modify, merge, publish, distribute, sublicense, * -* and/or sell copies of the Software, and to permit persons to whom the * -* Software is furnished to do so, subject to the following conditions: * -* * -* The above copyright notice and this permission notice shall be included in * -* all copies or substantial portions of the Software. * -* * -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * -* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * -* DEALINGS IN THE SOFTWARE. * -* * -* This agreement shall be governed in all respects by the laws of the State * -* of California and by the laws of the United States of America. * -* * -******************************************************************************/ - -#include -#include -#include -#include -#include -#include "Altera_UP_SD_Card_Avalon_Interface_mod.h" - -/////////////////////////////////////////////////////////////////////////// -// Local Define Statements -/////////////////////////////////////////////////////////////////////////// - -#define CHAR_TO_UPPER(ch) ((char) (((ch >= 'a') && (ch <= 'z')) ? ((ch-'a')+'A'): ch)) - -// Data Buffer Address -#define SD_CARD_BUFFER(base, x) (base + x) -// 128-bit Card Identification Number -#define SD_CARD_CID(base, x) (base + 0x0200 + x) -// 128-bit Card Specific Data Register -#define SD_CARD_CSD(base, x) (base + 0x0210 + x) -// 32-bit Operating Conditions Register -#define SD_CARD_OCR(base) (base + 0x0220) -// 32-bit Card Status Register -#define SD_CARD_STATUS(base) (base + 0x0224) -// 16-bit Relative Card Address Register -#define SD_CARD_RCA(base) (base + 0x0228) -// 32-bit Card Argument Register -#define SD_CARD_ARGUMENT(base) (base + 0x022C) -// 16-bit Card Command Register -#define SD_CARD_COMMAND(base) (base + 0x0230) -// 16-bit Card Auxiliary Status Register -#define SD_CARD_AUX_STATUS(base) (base + 0x0234) -// 32-bit R1 Response Register -#define SD_CARD_R1_RESPONSE(base) (base + 0x0238) - -#define CMD_READ_BLOCK 17 -#define CMD_WRITE_BLOCK 24 - -// FAT 12/16 related stuff -//#define BOOT_SECTOR_DATA_SIZE 0x005A -#define MAX_FILES_OPENED 2 - -/******************************************************************************/ -/****** LOCAL DATA STRUCTURES ***********************************************/ -/******************************************************************************/ - - -typedef struct s_FAT_12_16_boot_sector { - unsigned char jump_instruction[3]; - char OEM_name[8]; - unsigned short int sector_size_in_bytes; - unsigned char sectors_per_cluster; - unsigned short int reserved_sectors; - unsigned char number_of_FATs; - unsigned short int max_number_of_dir_entires; - unsigned short int number_of_sectors_in_partition; - unsigned char media_descriptor; - unsigned short int number_of_sectors_per_table; - unsigned short int number_of_sectors_per_track; - unsigned short int number_of_heads; - unsigned int number_of_hidden_sectors; - unsigned int total_sector_count_if_above_32MB; - unsigned char drive_number; - unsigned char current_head; - unsigned char boot_signature; - unsigned char volume_id[4]; - char volume_label[11]; - unsigned char file_system_type[8]; - unsigned char bits_for_cluster_index; - unsigned int first_fat_sector_offset; - unsigned int second_fat_sector_offset; - unsigned int root_directory_sector_offset; - unsigned int data_sector_offset; -} t_FAT_12_16_boot_sector; - - -typedef struct s_file_record { - unsigned char name[8]; - unsigned char extension[3]; - unsigned char attributes; - unsigned short int create_time; - unsigned short int create_date; - unsigned short int last_access_date; - unsigned short int last_modified_time; - unsigned short int last_modified_date; - unsigned short int start_cluster_index; - unsigned int file_size_in_bytes; - /* The following fields are only used when a file has been created or opened. */ - unsigned int current_cluster_index; - unsigned int current_sector_in_cluster; - unsigned int current_byte_position; - // Absolute location of the file record on the SD Card. - unsigned int file_record_cluster; - unsigned int file_record_sector_in_cluster; - short int file_record_offset; - // Is this record in use and has the file been modified. - unsigned int home_directory_cluster; - bool modified; - bool in_use; -} t_file_record; - - -typedef struct s_find_data { - unsigned int directory_root_cluster; // 0 means root directory. - unsigned int current_cluster_index; - unsigned int current_sector_in_cluster; - short int file_index_in_sector; - bool valid; -} t_find_data; - - -/////////////////////////////////////////////////////////////////////////// -// Local Variables -/////////////////////////////////////////////////////////////////////////// - - -bool initialized = false; -bool is_sd_card_formated_as_FAT16 = false; -volatile short int *aux_status_register = NULL; -volatile int *status_register = NULL; -volatile short int *CSD_register_w0 = NULL; -volatile short int *command_register = NULL; -volatile int *command_argument_register = NULL; -volatile char *buffer_memory = NULL; -int fat_partition_offset_in_512_byte_sectors = 0; -int fat_partition_size_in_512_byte_sectors = 0; - -#ifndef SD_RAW_IFACE -t_FAT_12_16_boot_sector boot_sector_data; -#endif - -alt_up_sd_card_dev *device_pointer = NULL; - -#ifndef SD_RAW_IFACE -// Pointers to currently opened files. -t_file_record active_files[MAX_FILES_OPENED]; -#endif -bool current_sector_modified = false; -unsigned int current_sector_index = 0; - -#ifndef SD_RAW_IFACE -t_find_data search_data; -#endif - - -/////////////////////////////////////////////////////////////////////////// -// Local Functions -/////////////////////////////////////////////////////////////////////////// - -#ifndef SD_RAW_IFACE -static bool Write_Sector_Data(int sector_index, int partition_offset) -#else -bool Write_Sector_Data(int sector_index, int partition_offset) -#endif -// This function writes a sector at the specified address on the SD Card. -{ - bool result = false; - - if (alt_up_sd_card_is_Present()) - { - short int reg_state = 0xff; - - /* Multiply sector offset by sector size to get the address. Sector size is 512. Also, - * the SD card reads data in 512 byte chunks, so the address must be a multiple of 512. */ - IOWR_32DIRECT(command_argument_register, 0, (sector_index + partition_offset)*512); - IOWR_16DIRECT(command_register, 0, CMD_WRITE_BLOCK); - do { - reg_state = (short int) IORD_16DIRECT(aux_status_register,0); - } while ((reg_state & 0x04)!=0); - // Make sure the request did not time out. - if ((reg_state & 0x10) == 0) - { - result = true; - current_sector_modified = false; - current_sector_index = sector_index+partition_offset; - } - } - return result; -} - -#ifndef SD_RAW_IFACE -static bool Save_Modified_Sector() -#else -bool Save_Modified_Sector() -#endif -// If the sector has been modified, then save it to the SD Card. -{ - bool result = true; - if (current_sector_modified) - { - result = Write_Sector_Data(current_sector_index, 0); - } - return result; -} - -#ifndef SD_RAW_IFACE -static bool Read_Sector_Data(int sector_index, int partition_offset) -#else -bool Read_Sector_Data(int sector_index, int partition_offset) -#endif -// This function reads a sector at the specified address on the SD Card. -{ - bool result = false; - - if (alt_up_sd_card_is_Present()) - { - short int reg_state = 0xff; - - /* Write data to the SD card if the current buffer is out of date. */ - if (current_sector_modified) - { - if (Write_Sector_Data(current_sector_index, 0) == false) - { - return false; - } - } - /* Multiply sector offset by sector size to get the address. Sector size is 512. Also, - * the SD card reads data in 512 byte chunks, so the address must be a multiple of 512. */ - IOWR_32DIRECT(command_argument_register, 0, (sector_index + partition_offset)*512); - IOWR_16DIRECT(command_register, 0, CMD_READ_BLOCK); - do { - reg_state = (short int) IORD_16DIRECT(aux_status_register,0); - } while ((reg_state & 0x04)!=0); - // Make sure the request did not time out. - if ((reg_state & 0x10) == 0) - { - result = true; - current_sector_modified = false; - current_sector_index = sector_index+partition_offset; - } - } - return result; -} - -#ifndef SD_RAW_IFACE -static bool get_cluster_flag(unsigned int cluster_index, unsigned short int *flag) -// Read a cluster flag. -{ - unsigned int sector_index = (cluster_index / 256) + fat_partition_offset_in_512_byte_sectors; - - sector_index = sector_index + boot_sector_data.first_fat_sector_offset; - - if (sector_index != current_sector_index) - { - if (Read_Sector_Data(sector_index, 0) == false) - { - return false; - } - } - *flag = (unsigned short int) IORD_16DIRECT(device_pointer->base, 2*(cluster_index % 256)); - return true; -} - - -static bool mark_cluster(unsigned int cluster_index, short int flag, bool first_fat) -// Place a marker on the specified cluster in a given FAT. -{ - unsigned int sector_index = (cluster_index / 256) + fat_partition_offset_in_512_byte_sectors; - - if (first_fat) - { - sector_index = sector_index + boot_sector_data.first_fat_sector_offset; - } - else - { - sector_index = sector_index + boot_sector_data.second_fat_sector_offset; - } - - if (sector_index != current_sector_index) - { - if (Read_Sector_Data(sector_index, 0) == false) - { - return false; - } - } - IOWR_16DIRECT(device_pointer->base, 2*(cluster_index % 256), flag); - current_sector_modified = true; - return true; -} - - -static bool Check_for_Master_Boot_Record(void) -// This function reads the first 512 bytes on the SD Card. This data should -// contain the Master Boot Record. If it does, then print -// relevant information and return true. Otherwise, return false. -{ - bool result = false; - int index; - int end, offset, partition_size; - - /* Load the first 512 bytes of data from SD card. */ - if (Read_Sector_Data(0, 0)) - { - end = (short int) IORD_16DIRECT(device_pointer->base,0x1fe); - - // Check if the end of the sector contains an end string 0xaa55. - if ((end & 0x0000ffff) == 0x0000aa55) - { - // Check four partition entries and see if any are valid - for (index = 0; index < 4; index++) - { - int partition_data_offset = (index * 16) + 0x01be; - char type; - - // Read Partition type - type = (unsigned char) IORD_8DIRECT(device_pointer->base,partition_data_offset + 0x04); - - // Check if this is an FAT parition - if ((type == 1) || (type == 4) || (type == 6) || (type == 14)) - { - // Get partition offset and size. - offset = (((unsigned short int) IORD_16DIRECT(device_pointer->base,partition_data_offset + 0x0A)) << 16) | ((unsigned short int) IORD_16DIRECT(device_pointer->base,partition_data_offset + 0x08)); - partition_size = (((unsigned short int) IORD_16DIRECT(device_pointer->base,partition_data_offset + 0x0E)) << 16) | ((unsigned short int) IORD_16DIRECT(device_pointer->base,partition_data_offset + 0x0C)); - - // Check if the partition is valid - if (partition_size > 0) - { - result = true; - fat_partition_size_in_512_byte_sectors = partition_size; - fat_partition_offset_in_512_byte_sectors = offset; - break; - } - } - } - } - } - - return result; -} - - -static bool Read_File_Record_At_Offset(int offset, t_file_record *record, unsigned int cluster_index, unsigned int sector_in_cluster) -// This function reads a file record -{ - bool result = false; - if (((offset & 0x01f) == 0) && (alt_up_sd_card_is_Present()) && (is_sd_card_formated_as_FAT16)) - { - int counter; - - for (counter = 0; counter < 8; counter++) - { - record->name[counter] = (char) IORD_8DIRECT(device_pointer->base, offset+counter); - } - for (counter = 0; counter < 3; counter++) - { - record->extension[counter] = (char) IORD_8DIRECT(device_pointer->base, offset+counter+8); - } - record->attributes = (char) IORD_8DIRECT(device_pointer->base, offset+11); - /* Ignore reserved bytes at locations 12 and 13. */ - record->create_time = (unsigned short int) IORD_16DIRECT(device_pointer->base, offset+14); - record->create_date = (unsigned short int) IORD_16DIRECT(device_pointer->base, offset+16); - record->last_access_date = (unsigned short int) IORD_16DIRECT(device_pointer->base, offset+18); - /* Ignore reserved bytes at locations 20 and 21. */ - record->last_modified_time = (unsigned short int) IORD_16DIRECT(device_pointer->base, offset+22); - record->last_modified_date = (unsigned short int) IORD_16DIRECT(device_pointer->base, offset+24); - record->start_cluster_index = (unsigned short int) IORD_16DIRECT(device_pointer->base, offset+26); - record->file_size_in_bytes = (unsigned int) IORD_32DIRECT(device_pointer->base, offset+28); - record->file_record_cluster = cluster_index; - record->file_record_sector_in_cluster = sector_in_cluster; - record->file_record_offset = offset; - result = true; - } - return result; -} - - -static bool Write_File_Record_At_Offset(int offset, t_file_record *record) -// This function writes a file record at a given offset. The offset is given in bytes. -{ - bool result = false; - if (((offset & 0x01f) == 0) && (alt_up_sd_card_is_Present()) && (is_sd_card_formated_as_FAT16)) - { - int counter; - - for (counter = 0; counter < 8; counter=counter+2) - { - short int two_chars = (short int) record->name[counter+1]; - two_chars = two_chars << 8; - two_chars = two_chars | record->name[counter]; - IOWR_16DIRECT(device_pointer->base, offset+counter, two_chars); - } - for (counter = 0; counter < 3; counter++) - { - IOWR_8DIRECT(device_pointer->base, offset+counter+8, record->extension[counter]); - } - IOWR_8DIRECT(device_pointer->base, offset+11, record->attributes); - /* Ignore reserved bytes at locations 12 and 13. */ - IOWR_16DIRECT(device_pointer->base, offset+14, record->create_time); - IOWR_16DIRECT(device_pointer->base, offset+16, record->create_date); - IOWR_16DIRECT(device_pointer->base, offset+18, record->last_access_date); - /* Ignore reserved bytes at locations 20 and 21. */ - IOWR_16DIRECT(device_pointer->base, offset+22, record->last_modified_time); - IOWR_16DIRECT(device_pointer->base, offset+24, record->last_modified_date); - IOWR_16DIRECT(device_pointer->base, offset+26, record->start_cluster_index); - IOWR_32DIRECT(device_pointer->base, offset+28, record->file_size_in_bytes); - current_sector_modified = true; - result = true; - } - return result; -} - - -static bool Check_for_DOS_FAT(int FAT_partition_start_sector) -// This function reads the boot sector for the FAT file system on the SD Card. -// The offset_address should point to the sector on the card where the boot sector is located. -// The sector number is specified either in the master Boot Record, or is 0 by default for a purely FAT -// based file system. If the specified sector contains a FAT boot sector, then this function prints the -// relevant information and returns 1. Otherwise, it returns 0. -{ - bool result = false; - int counter = 0; - short int end; - - result = Read_Sector_Data(0, FAT_partition_start_sector); - end = (short int) IORD_16DIRECT(device_pointer->base, 0x1fe); - if (((end & 0x0000ffff) == 0x0000aa55) && (result)) - { - int num_clusters = 0; - - boot_sector_data.jump_instruction[0] = (char) IORD_8DIRECT(device_pointer->base, 0); - boot_sector_data.jump_instruction[1] = (char) IORD_8DIRECT(device_pointer->base, 1); - boot_sector_data.jump_instruction[2] = (char) IORD_8DIRECT(device_pointer->base, 2); - for (counter = 0; counter < 8; counter++) - { - boot_sector_data.OEM_name[counter] = (char) IORD_8DIRECT(device_pointer->base, 3+counter); - } - boot_sector_data.sector_size_in_bytes = (((unsigned char) IORD_8DIRECT(device_pointer->base, 12)) << 8 ) | ((char) IORD_8DIRECT(device_pointer->base, 11)); - boot_sector_data.sectors_per_cluster = ((unsigned char) IORD_8DIRECT(device_pointer->base, 13)); - boot_sector_data.reserved_sectors = ((unsigned short int) IORD_16DIRECT(device_pointer->base, 14)); - boot_sector_data.number_of_FATs = ((unsigned char) IORD_8DIRECT(device_pointer->base, 16)); - boot_sector_data.max_number_of_dir_entires = (((unsigned short int)(((unsigned char) IORD_8DIRECT(device_pointer->base, 18)))) << 8 ) | ((unsigned char) IORD_8DIRECT(device_pointer->base, 17)); - boot_sector_data.number_of_sectors_in_partition = (((unsigned short int)(((unsigned char) IORD_8DIRECT(device_pointer->base, 20)))) << 8 ) | ((unsigned char) IORD_8DIRECT(device_pointer->base, 19)); - boot_sector_data.media_descriptor = ((unsigned char) IORD_8DIRECT(device_pointer->base, 21)); - boot_sector_data.number_of_sectors_per_table = ((unsigned short int) IORD_16DIRECT(device_pointer->base, 22)); - boot_sector_data.number_of_sectors_per_track = ((unsigned short int) IORD_16DIRECT(device_pointer->base, 24)); - boot_sector_data.number_of_heads = ((unsigned short int) IORD_16DIRECT(device_pointer->base, 26)); - boot_sector_data.number_of_hidden_sectors = ((unsigned int) IORD_32DIRECT(device_pointer->base, 28)); - boot_sector_data.total_sector_count_if_above_32MB = ((unsigned int) IORD_32DIRECT(device_pointer->base, 32)); - boot_sector_data.drive_number = ((unsigned char) IORD_8DIRECT(device_pointer->base, 36)); - boot_sector_data.current_head = ((unsigned char) IORD_8DIRECT(device_pointer->base, 37)); - boot_sector_data.boot_signature = ((unsigned char) IORD_8DIRECT(device_pointer->base, 38)); - boot_sector_data.first_fat_sector_offset = boot_sector_data.reserved_sectors; - boot_sector_data.second_fat_sector_offset = boot_sector_data.first_fat_sector_offset + boot_sector_data.number_of_sectors_per_table; - boot_sector_data.root_directory_sector_offset = boot_sector_data.second_fat_sector_offset + boot_sector_data.number_of_sectors_per_table; - boot_sector_data.data_sector_offset = boot_sector_data.root_directory_sector_offset + (32*boot_sector_data.max_number_of_dir_entires / boot_sector_data.sector_size_in_bytes); - - if (boot_sector_data.number_of_sectors_in_partition > 0) - { - num_clusters = (boot_sector_data.number_of_sectors_in_partition / boot_sector_data.sectors_per_cluster); - } - else - { - num_clusters = (boot_sector_data.total_sector_count_if_above_32MB / boot_sector_data.sectors_per_cluster); - } - if (num_clusters < 4087) - { - boot_sector_data.bits_for_cluster_index = 12; - } - else if (num_clusters <= 65517) - { - boot_sector_data.bits_for_cluster_index = 16; - } - else - { - boot_sector_data.bits_for_cluster_index = 32; - } - - for (counter = 0; counter < 4; counter++) - { - boot_sector_data.volume_id[counter] = ((char) IORD_8DIRECT(device_pointer->base, 39+counter)); - } - for (counter = 0; counter < 11; counter++) - { - boot_sector_data.volume_label[counter] = ((char) IORD_8DIRECT(device_pointer->base, 43+counter)); - } - for (counter = 0; counter < 8; counter++) - { - boot_sector_data.file_system_type[counter] = ((char) IORD_8DIRECT(device_pointer->base, 54+counter)); - } - // Clear file records - for (counter = 0; counter < MAX_FILES_OPENED; counter++) - { - active_files[counter].in_use = false; - } - result = true; - } - else - { - result = false; - } - return result; -} - - -static bool Look_for_FAT16(void) -// Read the SD card to determine if it contains a FAT16 partition. -{ - bool result = false; - - if (alt_up_sd_card_is_Present()) - { - short int csd_file_format = *CSD_register_w0; - - fat_partition_offset_in_512_byte_sectors = 0; - fat_partition_size_in_512_byte_sectors = 0; - - if (((csd_file_format & 0x8000) == 0) && ((csd_file_format & 0x0c00) != 0x0c00)) - { - if ((csd_file_format & 0x0c00) == 0x0400) - { - /* SD Card contains files stored in a DOS FAT (floppy like) file format, without a partition table */ - result = Check_for_DOS_FAT(0); - } - if ((csd_file_format & 0x0c00) == 0x0000) - { - /* SD Card contains files stored in a Hard disk-like file format that contains a partition table */ - if (Check_for_Master_Boot_Record()) - { - result = Check_for_DOS_FAT(fat_partition_offset_in_512_byte_sectors); - } - } - if (result == true) - { - // Accept only FAT16, not FAT12. - if (boot_sector_data.bits_for_cluster_index != 16) - { - result = false; - } - else - { - fat_partition_size_in_512_byte_sectors = boot_sector_data.number_of_sectors_in_partition; - } - } - } - } - return result; -} - - -static void filename_to_upper_case(char *file_name) -// Change file name to upper case. -{ - int index; - int length = strlen(file_name); - - for (index = 0; index < length; index++) - { - if ((file_name[index] >= 'a') && (file_name[index] <= 'z')) - { - file_name[index] = (file_name[index] - 'a') + 'A'; - } - } -} - - -static bool check_file_name_for_FAT16_compliance(char *file_name) -// Check if the file complies with FAT16 naming convention. -{ - int length = strlen(file_name); - int index; - int last_dir_break_position = -1; - int last_period = -1; - bool result = true; - - for(index = 0; index < length; index++) - { - if ((file_name[index] == ' ') || - ((last_dir_break_position == (index - 1)) && ((file_name[index] == '\\') || (file_name[index] == '/'))) || - ((index - last_period == 9) && (file_name[index] != '.')) || - ((last_dir_break_position != last_period) && (index - last_period > 3) && - (file_name[index] != '\\') && (file_name[index] != '/')) - ) - { - result = false; - break; - } - if ((file_name[index] == '\\') || (file_name[index] == '/')) - { - last_period = index; - last_dir_break_position = index; - } - if (file_name[index] == '.') - { - last_period = index; - } - } - if ((file_name[length-1] == '\\') || (file_name[length-1] == '/')) - { - result = false; - } - return result; -} - - -static int get_dir_divider_location(char *name) -// Find a directory divider location. -{ - int index = 0; - int length = strlen(name); - - for(index = 0; index < length; index++) - { - if ((name[index] == '\\') || (name[index] == '/')) - { - break; - } - } - - if (index == length) - { - index = -1; - } - - return index; -} - - -static bool match_file_record_to_name_ext(t_file_record *file_record, char *name, char *extension) -/* See if the given name and extension match the file record. Return true if this is so, false otherwise. */ -{ - bool match = true; - int index; - - for (index = 0; index < 8; index++) - { - if (CHAR_TO_UPPER(file_record->name[index]) != CHAR_TO_UPPER(name[index])) - { - match = false; - break; - } - } - for (index = 0; index < 3; index++) - { - if (CHAR_TO_UPPER(file_record->extension[index]) != CHAR_TO_UPPER(extension[index])) - { - match = false; - break; - } - } - return match; -} - - -static bool get_home_directory_cluster_for_file(char *file_name, int *home_directory_cluster, t_file_record *file_record) -// Scan the directories in given in the file name and find the root directory for the file. -{ - bool result = false; - int home_dir_cluster = 0; - int location, index; - int start_location = 0; - - /* Get Next Directory. */ - location = get_dir_divider_location( file_name ); - while (location > 0) - { - char name[8] = { ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' }; - char extension[3] = { ' ', ' ', ' ' }; - int ext_index = -1; - int new_cluster = home_dir_cluster; - - // Get the name of the directory in name/extension format. - for (index = 0; index < location; index++) - { - if (file_name[index+start_location] == '.') - { - ext_index = index; - } - else if (ext_index < 0) - { - name[index] = file_name[index+start_location]; - } - else - { - extension[index-ext_index] = file_name[index+start_location]; - } - } - - if (home_dir_cluster == 0) - { - /* We are in the root directory. Scan the directory (of predefined size) and see if you can find the specified file. */ - int max_root_dir_sectors = ((32*boot_sector_data.max_number_of_dir_entires) / boot_sector_data.sector_size_in_bytes); - int sector_index; - - for (sector_index = 0; sector_index < max_root_dir_sectors; sector_index++) - { - if (Read_Sector_Data(sector_index+boot_sector_data.root_directory_sector_offset, fat_partition_offset_in_512_byte_sectors)) - { - int file_counter; - - for (file_counter = 0; file_counter < 16; file_counter++) - { - - // Read file record. - Read_File_Record_At_Offset(file_counter*32, file_record, 0, sector_index); - if ((file_record->name[0] != 0xe5) && (file_record->name[0] != 0x00)) - { - bool match = match_file_record_to_name_ext(file_record, name, extension); - if (match) - { - new_cluster = file_record->start_cluster_index; - file_record->file_record_cluster = 1; // Home directory is a subdirectory in the root directory. - break; - } - } - } - } - else - { - break; - } - if (new_cluster != home_dir_cluster) - { - break; - } - } - if (new_cluster != home_dir_cluster) - { - // A valid directory is found, so go to it. - home_dir_cluster = new_cluster; - start_location = start_location+location+1; - } - else - { - // Directory path is invalid. - return false; - } - } else { - // This is a subdirectory that can have any number of elements. So scan through it as though it was a file - // and see if you can find the directory of interest. - int cluster = home_dir_cluster; - - do { - int start_sector = ( cluster - 2 ) * ( boot_sector_data.sectors_per_cluster ) + boot_sector_data.data_sector_offset; - int sector_index; - - for (sector_index = 0; sector_index < boot_sector_data.sectors_per_cluster; sector_index++) - { - if (Read_Sector_Data(sector_index + start_sector, fat_partition_offset_in_512_byte_sectors)) - { - int file_counter; - - for (file_counter = 0; file_counter < 16; file_counter++) - { - // Read file record. - Read_File_Record_At_Offset(file_counter*32, file_record, cluster, sector_index); - if ((file_record->name[0] != 0xe5) && (file_record->name[0] != 0x00)) - { - bool match = match_file_record_to_name_ext(file_record, name, extension); - if (match) - { - new_cluster = file_record->start_cluster_index; - break; - } - } - } - } - else - { - break; - } - if (new_cluster != home_dir_cluster) - { - break; - } - } - // If this is the end of the cluster and the directory has not been found, then see if there is another cluster - // that holds data for the current directory. - if (new_cluster == home_dir_cluster) - { - unsigned short int next_cluster; - - if (get_cluster_flag(new_cluster, &next_cluster)) - { - // The directory needs to be expanded to store more files. - if ((next_cluster & 0x0000fff8) == 0x0000fff8) - { - return false; - } - new_cluster = (next_cluster & 0x0000fff8); - } - else - { - // Directory path is invalid. - return false; - } - } - } while ((cluster < 0x0000fff8) && (new_cluster == home_dir_cluster)); - if (new_cluster != home_dir_cluster) - { - // A valid directory is found, so go to it. - home_dir_cluster = new_cluster; - start_location = start_location+location+1; - } - else - { - // Directory path is invalid. - return false; - } - } - location = get_dir_divider_location(&(file_name[start_location])); - if (location < 0) - { - // Directory has been located. - result = true; - } - } - - *home_directory_cluster = home_dir_cluster; - if (home_dir_cluster == 0) - { - file_record->file_record_cluster = 0; // Home directory is the root directory. - result = true; - } - return result; -} - - -static bool find_file_in_directory(int directory_start_cluster, char *file_name, t_file_record *file_record) -// Given a cluster and a file name, check if the file already exists. Return the file record if the file is found. -{ - int location = get_dir_divider_location( file_name ); - int last_dir_separator = 0; - char name[8] = { ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' }; - char extension[3] = { ' ', ' ', ' ' }; - int ext_index = -1; - int cluster = directory_start_cluster; - int index; - int length = strlen(file_name); - bool result = false; - - // Skip through all directory separators. - while (location > 0) - { - last_dir_separator = last_dir_separator+location+1; - location = get_dir_divider_location( &(file_name[last_dir_separator]) ); - } - - // Get the name of the file in name/extension format. - for (index = last_dir_separator; index < length; index++) - { - if (file_name[index] == '.') - { - ext_index = index; - } - else if (ext_index < 0) - { - name[index-last_dir_separator] = file_name[index]; - } - else - { - extension[index-ext_index-1] = file_name[index]; - } - } - - // Look for the file. - if (directory_start_cluster == 0) - { - /* We are in the root directory. Scan the directory (of predefined size) and see if you can find the specified file. */ - int max_root_dir_sectors = ((32*boot_sector_data.max_number_of_dir_entires) / boot_sector_data.sector_size_in_bytes); - int sector_index; - - for (sector_index = 0; sector_index < max_root_dir_sectors; sector_index++) - { - if (Read_Sector_Data( sector_index + boot_sector_data.root_directory_sector_offset, - fat_partition_offset_in_512_byte_sectors)) - { - int file_counter; - - for (file_counter = 0; file_counter < 16; file_counter++) - { - // Read file record. - Read_File_Record_At_Offset(file_counter*32, file_record, 0, sector_index); - if ((file_record->name[0] != 0xe5) && (file_record->name[0] != 0x00)) - { - bool match = match_file_record_to_name_ext(file_record, name, extension); - - if (match) - { - result = true; - break; - } - } - } - } - else - { - break; - } - if (result) - { - break; - } - } - } - else - { - do { - int start_sector = ( cluster - 2 ) * ( boot_sector_data.sectors_per_cluster ) + boot_sector_data.data_sector_offset; - int sector_index; - - for (sector_index = 0; sector_index < boot_sector_data.sectors_per_cluster; sector_index++) - { - if (Read_Sector_Data(sector_index + start_sector, fat_partition_offset_in_512_byte_sectors)) - { - int file_counter; - - for (file_counter = 0; file_counter < 16; file_counter++) - { - // Read file record. - Read_File_Record_At_Offset(file_counter*32, file_record, cluster, sector_index); - if ((file_record->name[0] != 0xe5) && (file_record->name[0] != 0x00)) - { - bool match = match_file_record_to_name_ext(file_record, name, extension); - - if (match) - { - result = true; - break; - } - } - } - } - else - { - break; - } - if (result) - { - break; - } - } - // If this is the end of the cluster and the file has not been found, then see if there is another cluster - // that holds data for the current directory. - if (result == false) - { - unsigned short int new_cluster; - - if (get_cluster_flag(cluster, &new_cluster)) - { - // The directory needs to be expanded to store more files. - if ((new_cluster & 0x0000fff8) == 0x0000fff8) - { - return false; - } - cluster = (new_cluster & 0x0000fff8); - } - else - { - // Directory path is invalid. - return false; - } - } - } while ((cluster < 0x0000fff8) && (result == false)); - } - - return result; -} - - -static bool find_first_empty_cluster(unsigned int *cluster_number) -// Find the first empty cluster. It will be marked by a 0 entry in the File Allocation Table. -{ - unsigned int sector = boot_sector_data.first_fat_sector_offset; - unsigned int cluster_index = 2; - short int cluster = -1; - bool result = false; - unsigned max_cluster_index = 0; - unsigned int non_data_sectors = boot_sector_data.data_sector_offset; - unsigned int less_than_32 = boot_sector_data.number_of_sectors_in_partition; - unsigned int greater_than_32 = boot_sector_data.total_sector_count_if_above_32MB; - - if (less_than_32 > greater_than_32) - { - max_cluster_index = ((less_than_32 - non_data_sectors) / boot_sector_data.sectors_per_cluster) + 1; - } - else - { - max_cluster_index = ((greater_than_32 - non_data_sectors) / boot_sector_data.sectors_per_cluster) + 1; - } - // Find an empty cluster for the file. - while (sector != boot_sector_data.second_fat_sector_offset) - { - if (Read_Sector_Data( sector, fat_partition_offset_in_512_byte_sectors)) - { - do { - cluster = ((unsigned short int) IORD_16DIRECT(device_pointer->base, 2*(cluster_index % 256))); - if (cluster == 0) - { - // Free cluster found. - break; - } - else - { - cluster_index++; - } - } while ((cluster_index % 256) != 0); - } - if (cluster == 0) - { - break; - } - sector++; - } - if ((cluster == 0) && (cluster <= max_cluster_index)) - { - *cluster_number = cluster_index; - result = true; - } - return result; -} - - -static int find_first_empty_record_in_a_subdirectory(int start_cluster_index) -// Search for a free spot in a subdirectory. Return an encoded location for the file record. -{ - int result = -1; - int cluster = start_cluster_index; - do { - int start_sector = ( cluster - 2 ) * ( boot_sector_data.sectors_per_cluster ) + boot_sector_data.data_sector_offset; - int sector_index; - - for (sector_index = 0; sector_index < boot_sector_data.sectors_per_cluster; sector_index++) - { - if (Read_Sector_Data(sector_index + start_sector, fat_partition_offset_in_512_byte_sectors)) - { - int file_counter; - - for (file_counter = 0; file_counter < 16; file_counter++) - { - unsigned short int leading_char; - - // Read file record. - leading_char = ((unsigned char) IORD_8DIRECT(device_pointer->base, file_counter*32)); - if ((leading_char == 0x00e5) || (leading_char == 0)) - { - result = (cluster) | ((sector_index*16 + file_counter) << 16); - return result; - } - } - } - else - { - break; - } - } - // If this is the end of the cluster and the file has not been found, then see if there is another cluster - // that holds data for the current directory. - if (result < 0) - { - unsigned short int new_cluster; - if (get_cluster_flag(cluster, &new_cluster)) - { - // The directory needs to be expanded to store more files. - if ((new_cluster & 0x0000fff8) == 0x0000fff8) - { - unsigned int new_dir_cluster; - if (find_first_empty_cluster(&new_dir_cluster)) - { - // Add the new cluster to the linked list of the given directory. - if (mark_cluster(cluster, ((short int) (new_dir_cluster)), true) && - mark_cluster(new_dir_cluster, ((short int) (0xffff)), true) && - mark_cluster(cluster, ((short int) (new_dir_cluster)), false) && - mark_cluster(new_dir_cluster, ((short int) (0xffff)), false)) - { - Save_Modified_Sector(); - // The new file will begin at the first entry of the directory. - result = new_dir_cluster; - } - } - cluster = (new_cluster & 0x0000fff8); - } - } - else - { - // Error encountered. - result = -1; - } - } - } while ((cluster < 0x0000fff8) && (result == -1)); - return result; -} - - -static int find_first_empty_record_in_root_directory() -// Find a first unused record location to use. Return -1 if none is found. -{ - int max_root_dir_sectors = ((32*boot_sector_data.max_number_of_dir_entires) / boot_sector_data.sector_size_in_bytes); - int sector_index; - int result = -1; - - for (sector_index = 0; sector_index < max_root_dir_sectors; sector_index++) - { - if (Read_Sector_Data( sector_index + boot_sector_data.root_directory_sector_offset, - fat_partition_offset_in_512_byte_sectors)) - { - int file_counter; - - for (file_counter = 0; file_counter < 16; file_counter++) - { - unsigned short int leading_char; - - // Read first character of the file record. - leading_char = ((unsigned char) IORD_8DIRECT(device_pointer->base, file_counter*32)); - if ((leading_char == 0x00e5) || (leading_char == 0)) - { - result = (sector_index*16 + file_counter) << 16; - return result; - } - } - } - else - { - break; - } - } - return result; -} - -static void convert_filename_to_name_extension(char *filename, char *name, char *extension) -// This function converts the file name into a name . extension format. -{ - int counter; - int local = 0; - - for(counter = 0; counter < 8; counter++) - { - if (filename[local] != '.') - { - name[counter] = filename[local]; - if (filename[local] != 0) local++; - } - else - { - name[counter] = ' '; - } - } - if (filename[local] == '.') local++; - for(counter = 0; counter < 3; counter++) - { - if (filename[local] != 0) - { - extension[counter] = filename[local]; - local++; - } - else - { - extension[counter] = ' '; - } - } - -} - -static bool create_file(char *name, t_file_record *file_record, t_file_record *home_dir) -// Create a file in a given directory. Expand the directory if needed. -{ - unsigned int cluster_number; - bool result = false; - - if (find_first_empty_cluster(&cluster_number)) - { - int record_index; - - if (home_dir->file_record_cluster == 0) - { - // Put a file in the root directory. - record_index = find_first_empty_record_in_root_directory(); - } - else - { - // Put a file in a subdirectory. - record_index = find_first_empty_record_in_a_subdirectory(home_dir->start_cluster_index); - } - if (record_index >= 0) - { - unsigned int file_record_sector; - int location = get_dir_divider_location( name ); - int last_dir_separator = 0; - - // Skip through all directory separators. - while (location > 0) - { - last_dir_separator = last_dir_separator+location+1; - location = get_dir_divider_location( &(name[last_dir_separator]) ); - } - - convert_filename_to_name_extension(&(name[last_dir_separator]), (char *)file_record->name, (char *)file_record->extension); - - file_record->attributes = 0; - file_record->create_time = 0; - file_record->create_date = 0; - file_record->last_access_date = 0; - file_record->last_modified_time = 0; - file_record->last_modified_date = 0; - file_record->start_cluster_index = cluster_number; - file_record->file_size_in_bytes = 0; - file_record->current_cluster_index = cluster_number; - file_record->current_sector_in_cluster = 0; - file_record->current_byte_position = 0; - file_record->file_record_cluster = record_index & 0x0000ffff; - file_record->file_record_sector_in_cluster = ((record_index >> 16) & 0x0000ffff) / 16; - file_record->file_record_offset = (((record_index >> 16) & 0x0000ffff) % 16)*32; - file_record->home_directory_cluster = home_dir->start_cluster_index; - file_record->in_use = true; - file_record->modified = true; - // Now write the record at the specified location. - file_record_sector = (file_record->file_record_cluster == 0) ? - (boot_sector_data.root_directory_sector_offset + file_record->file_record_sector_in_cluster): - (boot_sector_data.data_sector_offset + (file_record->file_record_cluster-2)*boot_sector_data.sectors_per_cluster + - file_record->file_record_sector_in_cluster); - - if (Read_Sector_Data(file_record_sector, fat_partition_offset_in_512_byte_sectors)) - { - if (Write_File_Record_At_Offset(file_record->file_record_offset, file_record)) - { - Save_Modified_Sector(); - // Mark the first cluster of the file as the last cluster at first. - mark_cluster(cluster_number, ((short int) (0xffff)), true); - if (mark_cluster(cluster_number, ((short int) (0xffff)), false)) - { - result = true; - } - } - } - } - - } - return result; -} - - -static void copy_file_record_name_to_string(t_file_record *file_record, char *file_name) -/* Copy a file name from the file record to a given string */ -{ - int index; - int flength = 0; - - /* Copy file name.*/ - for (index = 0; index < 8; index++) - { - if (file_record->name[index] != ' ') - { - file_name[flength] = file_record->name[index]; - flength = flength + 1; - } - } - if (file_record->extension[0] != ' ') - { - file_name[flength] = '.'; - flength = flength + 1; - for (index = 0; index < 3; index++) - { - if (file_record->extension[index] != ' ') - { - file_name[flength] = file_record->extension[index]; - flength = flength + 1; - } - } - } - file_name[flength] = 0; -} -#endif //SD_RAW_IFACE - -/////////////////////////////////////////////////////////////////////////// -// Direct functions -/////////////////////////////////////////////////////////////////////////// - - -alt_up_sd_card_dev* alt_up_sd_card_open_dev(const char* name) -{ - // find the device from the device list - // (see altera_hal/HAL/inc/priv/alt_file.h - // and altera_hal/HAL/src/alt_find_dev.c - // for details) - alt_up_sd_card_dev *dev = (alt_up_sd_card_dev *) alt_find_dev(name, &alt_dev_list); - - if (dev != NULL) - { - aux_status_register = ((short int *) SD_CARD_AUX_STATUS(dev->base)); - status_register = ((int *) SD_CARD_STATUS(dev->base)); - CSD_register_w0 = ((short int *) SD_CARD_CSD(dev->base, 0)); - command_register = ((short int *) SD_CARD_COMMAND(dev->base)); - command_argument_register = ((int *) SD_CARD_ARGUMENT(dev->base)); - buffer_memory = (char *) SD_CARD_BUFFER(dev->base, 0); - device_pointer = dev; - initialized = false; -#ifndef SD_RAW_IFACE - is_sd_card_formated_as_FAT16 = false; - search_data.valid = false; -#endif - } - return dev; -} - - -bool alt_up_sd_card_is_Present(void) -// Check if there is an SD Card insterted into the SD Card socket. -{ - bool result = false; - - if ((device_pointer != NULL) && ((IORD_16DIRECT(aux_status_register,0) & 0x02) != 0)) - { - result = true; - } - else if (initialized == true) - { - int index; - - initialized = false; -#ifndef SD_RAW_IFACE - search_data.valid = false; - is_sd_card_formated_as_FAT16 = false; - - for(index = 0; index < MAX_FILES_OPENED; index++) - { - active_files[index].in_use = false; - active_files[index].modified = false; - } -#endif - } - return result; -} - -#ifndef SD_RAW_IFACE -bool alt_up_sd_card_is_FAT16(void) -/* This function reads the SD card data in an effort to determine if the card is formated as a FAT16 - * volume. Please note that FAT12 has a similar format, but will not be supported by this driver. - * If the card contains a FAT16 volume, the local data structures will be initialized to allow reading and writing - * to the SD card as though it was a hard drive. - */ -{ - bool result = false; - - if (alt_up_sd_card_is_Present()) - { - // Check if an SD Card is in the SD Card slot. - if (initialized == false) - { - // Now determine if the card is formatted as FAT 16. - is_sd_card_formated_as_FAT16 = Look_for_FAT16(); - initialized = is_sd_card_formated_as_FAT16; - search_data.valid = false; - } - result = is_sd_card_formated_as_FAT16; - } - else - { - // If not then you may as well not open the device. - initialized = false; - is_sd_card_formated_as_FAT16 = false; - } - - return result; -} - - -short int alt_up_sd_card_find_first(char *directory_to_search_through, char *file_name) -/* This function sets up a search algorithm to go through a given directory looking for files. - * If the search directory is valid, then the function searches for the first file it finds. - * Inputs: - * directory_to_search_through - name of the directory to search through - * file_name - an array to store a name of the file found. Must be 13 bytes long (12 bytes for file name and 1 byte of NULL termination). - * Outputs: - * 0 - success - * 1 - invalid directory - * 2 - No card or incorrect card format. - * - * To specify a directory give the name in a format consistent with the following regular expression: - * [{[valid_chars]+}/]*. - * - * In other words, give a path name starting at the root directory, where each directory name is followed by a '/'. - * Then, append a '.' to the directory name. Examples: - * "." - look through the root directory - * "first/." - look through a directory named "first" that is located in the root directory. - * "first/sub/." - look through a directory named "sub", that is located within the subdirectory named "first". "first" is located in the root directory. - * Invalid examples include: - * "/.", "/////." - this is not the root directory. - * "/first/." - the first character may not be a '/'. - */ -{ - short int result = 2; - if ((alt_up_sd_card_is_Present()) && (is_sd_card_formated_as_FAT16)) - { - int home_directory_cluster; - t_file_record file_record; - - if (get_home_directory_cluster_for_file(directory_to_search_through, &home_directory_cluster, &file_record)) - { - search_data.directory_root_cluster = home_directory_cluster; - search_data.current_cluster_index = home_directory_cluster; - search_data.current_sector_in_cluster = 0; - search_data.file_index_in_sector = -1; - search_data.valid = true; - result = alt_up_sd_card_find_next(file_name); - } - else - { - result = 1; - } - } - return result; -} - - -short int alt_up_sd_card_find_next(char *file_name) -/* This function searches for the next file in a given directory, as specified by the find_first function. - * Inputs: - * file_name - an array to store a name of the file found. Must be 13 bytes long (12 bytes for file name and 1 byte of NULL termination). - * Outputs: - * -1 - end of directory. - * 0 - success - * 2 - No card or incorrect card format. - * 3 - find_first has not been called successfully. - */ -{ - short int result = 2; - if ((alt_up_sd_card_is_Present()) && (is_sd_card_formated_as_FAT16)) - { - if (search_data.valid) - { - t_file_record file_record; - int cluster = search_data.current_cluster_index; - - if (cluster == 0) - { - // Searching through the root directory - int max_root_dir_sectors = ((32*boot_sector_data.max_number_of_dir_entires) / boot_sector_data.sector_size_in_bytes); - int sector_index = search_data.current_sector_in_cluster; - int file_counter = search_data.file_index_in_sector+1; - - for (; sector_index < max_root_dir_sectors; sector_index++) - { - if (Read_Sector_Data( sector_index + boot_sector_data.root_directory_sector_offset, - fat_partition_offset_in_512_byte_sectors)) - { - for (; file_counter < 16; file_counter++) - { - if (Read_File_Record_At_Offset(file_counter*32, &file_record, 0, sector_index)) - { - if ((file_record.name[0] != 0) && (file_record.name[0] != 0xe5)) - { - /* Update search structure. */ - search_data.file_index_in_sector = file_counter; - search_data.current_sector_in_cluster = sector_index; - - /* Copy file name.*/ - copy_file_record_name_to_string(&file_record, file_name); - return 0; - } - } - } - file_counter = 0; - } - else - { - break; - } - } - result = -1; - } - else - { - int file_counter = search_data.file_index_in_sector+1; - do - { - int start_sector = ( cluster - 2 ) * ( boot_sector_data.sectors_per_cluster ) + boot_sector_data.data_sector_offset; - int sector_index = search_data.current_sector_in_cluster; - - for (; sector_index < boot_sector_data.sectors_per_cluster; sector_index++) - { - if (Read_Sector_Data(sector_index + start_sector, fat_partition_offset_in_512_byte_sectors)) - { - for (; file_counter < 16; file_counter++) - { - if (Read_File_Record_At_Offset(file_counter*32, &file_record, cluster, sector_index)) - { - if ((file_record.name[0] != 0) && (file_record.name[0] != 0xe5)) - { - /* Update search structure. */ - search_data.current_cluster_index = cluster; - search_data.file_index_in_sector = file_counter; - search_data.current_sector_in_cluster = sector_index; - - /* Copy file name.*/ - copy_file_record_name_to_string(&file_record, file_name); - return 0; - } - } - } - file_counter = 0; - } - else - { - break; - } - } - // If this is the end of the cluster and the file has not been found, then see if there is another cluster - // that holds data for the current directory. - if (sector_index >= boot_sector_data.sectors_per_cluster) - { - unsigned short int new_cluster; - - if (get_cluster_flag(cluster, &new_cluster)) - { - if ((new_cluster & 0x0000fff8) == 0x0000fff8) - { - result = -1; - search_data.valid = false; - } - cluster = ((new_cluster) & 0x0000fff8); - } - else - { - // Error encountered. - result = -1; - } - } - } while (cluster < 0x0000fff8); - } - } - else - { - // Call Find_First first. - result = 3; - } - } - return result; -} - - -short int alt_up_sd_card_fopen(char *name, bool create) -/* This function reads the SD card data in an effort to determine if the card is formated as a FAT16 - * volume. Please note that FAT12 has a similar format, but will not be supported by this driver. - * - * Inputs: - * name - a file name including a directory, relative to the root directory - * create - a flag set to true to create a file if it does not already exist - * Output: - * An index to the file record assigned to the specified file. -1 is returned if the file could not be opened. - * Return -2 if the specified file has already been opened previously. - */ -{ - short int file_record_index = -1; - - if ((alt_up_sd_card_is_Present()) && (is_sd_card_formated_as_FAT16)) - { - unsigned int home_directory_cluster = 0; - t_file_record home_dir; - - /* First check the file name format. It should not be longer than 12 characters, including a period and the extension. - * Rules: - * - no spaces - * - at most 12 chatacters per name, with a period in 9th position. - * - a / or a \ every at most 12 characters. - */ - filename_to_upper_case(name); - if (check_file_name_for_FAT16_compliance(name)) - { - int index; - - /* Get home directory cluster location for the specified file. 0 means root directory. */ - if (!get_home_directory_cluster_for_file(name, (int *) &home_directory_cluster, &home_dir)) - { - return file_record_index; - } - - /* Find a free file slot to store file specs in. */ - for (index = 0; index < MAX_FILES_OPENED; index++) - { - if (active_files[index].in_use == false) - { - file_record_index = index; - break; - } - } - if (file_record_index >= 0) - { - /* If file record is found, then look for the specified file. If the create flag is set to true - * and the file is not found, then it should be created in the current directory. - */ - - if (find_file_in_directory(home_directory_cluster, name, &(active_files[file_record_index]))) - { - if (create) - { - /* Do not allow overwriting existing files for now. */ - return -1; - } - active_files[file_record_index].current_cluster_index = active_files[file_record_index].start_cluster_index; - active_files[file_record_index].current_sector_in_cluster = 0; - active_files[file_record_index].current_byte_position = 0; - active_files[file_record_index].in_use = true; - active_files[file_record_index].modified = false; - - /* Check if the file has already been opened. */ - for (index = 0; index < MAX_FILES_OPENED; index++) - { - if ((file_record_index != index) && (active_files[index].in_use == true)) - { - if ((active_files[file_record_index].file_record_cluster == active_files[index].file_record_cluster) && - (active_files[file_record_index].file_record_sector_in_cluster == active_files[index].file_record_sector_in_cluster) && - (active_files[file_record_index].file_record_offset == active_files[index].file_record_offset)) - { - // file already in use. - file_record_index = -2; - break; - } - } - } - - } - else if (create) - { - /* Create file if needed. */ - if (create_file(name, &(active_files[file_record_index]), &home_dir)) - { - active_files[file_record_index].in_use = true; - active_files[file_record_index].modified = true; - } - else - { - /* If file creation fails then return an invalid file handle. */ - file_record_index = -1; - } - } - else - { - /* Otherwise the file could not be opened.*/ - file_record_index = -1; - } - } - } - } - - return file_record_index; -} - - -void alt_up_sd_card_set_attributes(short int file_handle, short int attributes) -/* Return file attributes, or -1 if the file_handle is invalid. - */ -{ - if ((file_handle >= 0) && (file_handle < MAX_FILES_OPENED)) - { - if (active_files[file_handle].in_use) - { - active_files[file_handle].attributes = ((char)(attributes & 0x00ff)); - } - } -} - - -short int alt_up_sd_card_get_attributes(short int file_handle) -/* Return file attributes, or -1 if the file_handle is invalid. - */ -{ - short int result = -1; - if ((file_handle >= 0) && (file_handle < MAX_FILES_OPENED)) - { - if (active_files[file_handle].in_use) - { - result = ((active_files[file_handle].attributes) & 0x00ff); - } - } - return result; -} - -short int alt_up_sd_card_read(short int file_handle) -/* Read a single character from a given file. Return -1 if at the end of a file. Any other negative number - * means that the file could not be read. A number between 0 and 255 is an ASCII character read from the SD Card. */ -{ - short int ch = -1; - - if ((file_handle >= 0) && (file_handle < MAX_FILES_OPENED)) - { - if (active_files[file_handle].in_use) - { - if (active_files[file_handle].current_byte_position < active_files[file_handle].file_size_in_bytes) - { - int data_sector = boot_sector_data.data_sector_offset + (active_files[file_handle].current_cluster_index - 2)*boot_sector_data.sectors_per_cluster + - active_files[file_handle].current_sector_in_cluster; - - if ((active_files[file_handle].current_byte_position > 0) && ((active_files[file_handle].current_byte_position % 512) == 0)) - { - // Read in a new sector of data. - if (active_files[file_handle].current_sector_in_cluster == boot_sector_data.sectors_per_cluster - 1) - { - // Go to the next cluster. - unsigned short int next_cluster; - if (get_cluster_flag(active_files[file_handle].current_cluster_index, &next_cluster)) - { - if ((next_cluster & 0x0000fff8) == 0x0000fff8) - { - /* End of file */ - return -1; - } - else - { - active_files[file_handle].current_cluster_index = next_cluster; - active_files[file_handle].current_sector_in_cluster = 0; - data_sector = boot_sector_data.data_sector_offset + (active_files[file_handle].current_cluster_index - 2)*boot_sector_data.sectors_per_cluster + - active_files[file_handle].current_sector_in_cluster; - } - } - else - { - return -2; - } - } - else - { - active_files[file_handle].current_sector_in_cluster = active_files[file_handle].current_sector_in_cluster + 1; - data_sector = data_sector + 1; - } - } - // Reading te first byte of the file. - if (current_sector_index != (data_sector + fat_partition_offset_in_512_byte_sectors)) - { - if (!Read_Sector_Data(data_sector, fat_partition_offset_in_512_byte_sectors)) - { - return -2; - } - } - - ch = (unsigned char) IORD_8DIRECT(buffer_memory, (active_files[file_handle].current_byte_position % 512)); - active_files[file_handle].current_byte_position = active_files[file_handle].current_byte_position + 1; - } - } - } - - return ch; -} - - -bool alt_up_sd_card_write(short int file_handle, char byte_of_data) -/* Write a single character to a given file. Return true if successful, and false otherwise. */ -{ - bool result = false; - - if ((file_handle >= 0) && (file_handle < MAX_FILES_OPENED)) - { - if (active_files[file_handle].in_use) - { - int data_sector = boot_sector_data.data_sector_offset + (active_files[file_handle].current_cluster_index - 2)*boot_sector_data.sectors_per_cluster + - active_files[file_handle].current_sector_in_cluster; - short int buffer_offset = active_files[file_handle].current_byte_position % boot_sector_data.sector_size_in_bytes; - - if (active_files[file_handle].current_byte_position < active_files[file_handle].file_size_in_bytes) - { - if ((active_files[file_handle].current_byte_position > 0) && (buffer_offset == 0)) - { - // Read in a new sector of data. - if (active_files[file_handle].current_sector_in_cluster == boot_sector_data.sectors_per_cluster - 1) - { - // Go to the next cluster. - unsigned short int next_cluster; - if (get_cluster_flag(active_files[file_handle].current_cluster_index, &next_cluster)) - { - if (next_cluster < 0x0000fff8) - { - active_files[file_handle].current_cluster_index = next_cluster; - active_files[file_handle].current_sector_in_cluster = 0; - data_sector = boot_sector_data.data_sector_offset + (active_files[file_handle].current_cluster_index - 2)*boot_sector_data.sectors_per_cluster + - active_files[file_handle].current_sector_in_cluster; - } - } - else - { - return false; - } - } - else - { - active_files[file_handle].current_sector_in_cluster = active_files[file_handle].current_sector_in_cluster + 1; - data_sector = data_sector + 1; - } - } - } - else - { - /* You are adding data to the end of the file, so increment its size and look for an additional data cluster if needed. */ - if ((active_files[file_handle].current_byte_position > 0) && (buffer_offset == 0)) - { - if (active_files[file_handle].current_sector_in_cluster == boot_sector_data.sectors_per_cluster - 1) - { - /* Find a new cluster if possible. */ - unsigned int cluster_number; - - if (find_first_empty_cluster(&cluster_number)) - { - // mark clusters in both File Allocation Tables. - mark_cluster(active_files[file_handle].current_cluster_index, ((unsigned short int) (cluster_number & 0x0000ffff)), true); - mark_cluster(cluster_number, 0xffff, true); - mark_cluster(active_files[file_handle].current_cluster_index, ((unsigned short int) (cluster_number & 0x0000ffff)), false); - mark_cluster(cluster_number, 0xffff, false); - // Change cluster index and sector index to compute a new data sector. - active_files[file_handle].current_cluster_index = cluster_number; - active_files[file_handle].current_sector_in_cluster = 0; - } - else - { - return false; - } - } - else - { - /* Read the next sector in the cluster and modify it. We only need to change the data_sector value. The actual read happens a few lines below. */ - active_files[file_handle].current_sector_in_cluster = active_files[file_handle].current_byte_position / boot_sector_data.sector_size_in_bytes; - } - data_sector = boot_sector_data.data_sector_offset + (active_files[file_handle].current_cluster_index - 2)*boot_sector_data.sectors_per_cluster + - active_files[file_handle].current_sector_in_cluster; - } - } - // Reading a data sector into the buffer. Note that changes to the most recently modified sector will be saved before - // a new sector is read from the SD Card. - if (current_sector_index != data_sector + fat_partition_offset_in_512_byte_sectors) - { - if (!Read_Sector_Data(data_sector, fat_partition_offset_in_512_byte_sectors)) - { - return false; - } - } - // Write a byte of data to the buffer. - IOWR_8DIRECT(buffer_memory, buffer_offset, byte_of_data); - active_files[file_handle].current_byte_position = active_files[file_handle].current_byte_position + 1; - - // Modify the file record only when necessary. - if (active_files[file_handle].current_byte_position >= active_files[file_handle].file_size_in_bytes) - { - active_files[file_handle].file_size_in_bytes = active_files[file_handle].file_size_in_bytes + 1; - active_files[file_handle].modified = true; - } - // Invaldiate the buffer to ensure that the buffer contents are written to the SD card whe nthe file is closed. - current_sector_modified = true; - result = true; - } - } - - return result; -} - - -bool alt_up_sd_card_fclose(short int file_handle) -// This function closes an opened file and saves data to SD Card if necessary. -{ - bool result = false; - if ((alt_up_sd_card_is_Present()) && (is_sd_card_formated_as_FAT16)) - { - if (active_files[file_handle].in_use) - { - if (active_files[file_handle].modified) - { - unsigned int record_sector = active_files[file_handle].file_record_sector_in_cluster; - if (active_files[file_handle].file_record_cluster == 0) - { - record_sector = record_sector + boot_sector_data.root_directory_sector_offset; - } - else - { - record_sector = record_sector + boot_sector_data.data_sector_offset + - (active_files[file_handle].file_record_cluster - 2)*boot_sector_data.sectors_per_cluster; - } - if (Read_Sector_Data(record_sector, fat_partition_offset_in_512_byte_sectors)) - { - if (Write_File_Record_At_Offset(active_files[file_handle].file_record_offset, &(active_files[file_handle]))) - { - // Make sure that the Data has been saved to the SD Card. - result = Save_Modified_Sector(); - } - } - } - active_files[file_handle].in_use = false; - result = true; - } - } - - return result; -} - -#endif //SD_RAW_IFACE diff --git a/software/sys_controller_bsp/drivers/src/altera_avalon_timer_sc.c b/software/sys_controller_bsp/drivers/src/altera_avalon_timer_sc.c new file mode 100644 index 0000000..d9a7b85 --- /dev/null +++ b/software/sys_controller_bsp/drivers/src/altera_avalon_timer_sc.c @@ -0,0 +1,110 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +* Altera does not recommend, suggest or require that this reference design * +* file be used in conjunction or combination with any other product. * +******************************************************************************/ + +#include + +#include "sys/alt_alarm.h" +#include "sys/alt_irq.h" + +#include "altera_avalon_timer.h" +#include "altera_avalon_timer_regs.h" + +#include "alt_types.h" +#include "sys/alt_log_printf.h" + +/* + * alt_avalon_timer_sc_irq() is the interrupt handler used for the system + * clock. This is called periodically when a timer interrupt occurs. The + * function first clears the interrupt condition, and then calls the + * alt_tick() function to notify the system that a timer tick has occurred. + * + * alt_tick() increments the system tick count, and updates any registered + * alarms, see alt_tick.c for further details. + */ +#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT +static void alt_avalon_timer_sc_irq (void* base) +#else +static void alt_avalon_timer_sc_irq (void* base, alt_u32 id) +#endif +{ + alt_irq_context cpu_sr; + + /* clear the interrupt */ + IOWR_ALTERA_AVALON_TIMER_STATUS (base, 0); + + /* + * Dummy read to ensure IRQ is negated before the ISR returns. + * The control register is read because reading the status + * register has side-effects per the register map documentation. + */ + IORD_ALTERA_AVALON_TIMER_CONTROL (base); + + /* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */ + ALT_LOG_SYS_CLK_HEARTBEAT(); + + /* + * Notify the system of a clock tick. disable interrupts + * during this time to safely support ISR preemption + */ + cpu_sr = alt_irq_disable_all(); + alt_tick (); + alt_irq_enable_all(cpu_sr); +} + +/* + * alt_avalon_timer_sc_init() is called to initialise the timer that will be + * used to provide the periodic system clock. This is called from the + * auto-generated alt_sys_init() function. + */ + +void alt_avalon_timer_sc_init (void* base, alt_u32 irq_controller_id, + alt_u32 irq, alt_u32 freq) +{ + /* set the system clock frequency */ + + alt_sysclk_init (freq); + + /* set to free running mode */ + + IOWR_ALTERA_AVALON_TIMER_CONTROL (base, + ALTERA_AVALON_TIMER_CONTROL_ITO_MSK | + ALTERA_AVALON_TIMER_CONTROL_CONT_MSK | + ALTERA_AVALON_TIMER_CONTROL_START_MSK); + + /* register the interrupt handler, and enable the interrupt */ +#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT + alt_ic_isr_register(irq_controller_id, irq, alt_avalon_timer_sc_irq, + base, NULL); +#else + alt_irq_register (irq, base, alt_avalon_timer_sc_irq); +#endif +} diff --git a/software/sys_controller_bsp/drivers/src/altera_avalon_timer_ts.c b/software/sys_controller_bsp/drivers/src/altera_avalon_timer_ts.c new file mode 100644 index 0000000..53988f6 --- /dev/null +++ b/software/sys_controller_bsp/drivers/src/altera_avalon_timer_ts.c @@ -0,0 +1,143 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +* Altera does not recommend, suggest or require that this reference design * +* file be used in conjunction or combination with any other product. * +******************************************************************************/ + +#include + +#include "system.h" +#include "sys/alt_timestamp.h" + +#include "altera_avalon_timer.h" +#include "altera_avalon_timer_regs.h" + +#include "alt_types.h" + +/* + * These functions are only available if a timestamp device has been selected + * for this system. + */ + +#if (ALT_TIMESTAMP_CLK_BASE != none_BASE) + +/* + * The function alt_timestamp_start() can be called at application level to + * initialise the timestamp facility. In this case the period register is + * set to full scale, i.e. 0xffffffff, and then started running. Note that + * the period register may not be writable, depending on the hardware + * configuration, in which case this function does not reset the period. + * + * The timer is not run in continuous mode, so that the user can detect timer + * roll-over, i.e. alt_timestamp() returns 0. + * + * The return value of this function is 0 upon sucess and -1 if in timestamp + * device has not been registered. + */ + +int alt_timestamp_start(void) +{ + void* base = altera_avalon_timer_ts_base; + + if (!altera_avalon_timer_ts_freq) + { + return -1; + } + else + { + if(ALT_TIMESTAMP_COUNTER_SIZE == 64) { + IOWR_ALTERA_AVALON_TIMER_CONTROL (base,ALTERA_AVALON_TIMER_CONTROL_STOP_MSK); + IOWR_ALTERA_AVALON_TIMER_PERIOD_0 (base, 0xFFFF); + IOWR_ALTERA_AVALON_TIMER_PERIOD_1 (base, 0xFFFF);; + IOWR_ALTERA_AVALON_TIMER_PERIOD_2 (base, 0xFFFF); + IOWR_ALTERA_AVALON_TIMER_PERIOD_3 (base, 0xFFFF); + IOWR_ALTERA_AVALON_TIMER_CONTROL (base, ALTERA_AVALON_TIMER_CONTROL_START_MSK); + } else { + IOWR_ALTERA_AVALON_TIMER_CONTROL (base,ALTERA_AVALON_TIMER_CONTROL_STOP_MSK); + IOWR_ALTERA_AVALON_TIMER_PERIODL (base, 0xFFFF); + IOWR_ALTERA_AVALON_TIMER_PERIODH (base, 0xFFFF); + IOWR_ALTERA_AVALON_TIMER_CONTROL (base, ALTERA_AVALON_TIMER_CONTROL_START_MSK); + } + } + return 0; +} + +/* + * alt_timestamp() returns the current timestamp count. In the event that + * the timer has run full period, or there is no timestamp available, this + * function return -1. + * + * The returned timestamp counts up from the last time the period register + * was reset. + */ + +alt_timestamp_type alt_timestamp(void) +{ + + void* base = altera_avalon_timer_ts_base; + + if (!altera_avalon_timer_ts_freq) + { +#if (ALT_TIMESTAMP_COUNTER_SIZE == 64) + return 0xFFFFFFFFFFFFFFFFULL; +#else + return 0xFFFFFFFF; +#endif + } + else + { +#if (ALT_TIMESTAMP_COUNTER_SIZE == 64) + IOWR_ALTERA_AVALON_TIMER_SNAP_0 (base, 0); + alt_timestamp_type snap_0 = IORD_ALTERA_AVALON_TIMER_SNAP_0(base) & ALTERA_AVALON_TIMER_SNAP_0_MSK; + alt_timestamp_type snap_1 = IORD_ALTERA_AVALON_TIMER_SNAP_1(base) & ALTERA_AVALON_TIMER_SNAP_1_MSK; + alt_timestamp_type snap_2 = IORD_ALTERA_AVALON_TIMER_SNAP_2(base) & ALTERA_AVALON_TIMER_SNAP_2_MSK; + alt_timestamp_type snap_3 = IORD_ALTERA_AVALON_TIMER_SNAP_3(base) & ALTERA_AVALON_TIMER_SNAP_3_MSK; + + return (0xFFFFFFFFFFFFFFFFULL - ( (snap_3 << 48) | (snap_2 << 32) | (snap_1 << 16) | (snap_0) )); +#else + IOWR_ALTERA_AVALON_TIMER_SNAPL (base, 0); + alt_timestamp_type lower = IORD_ALTERA_AVALON_TIMER_SNAPL(base) & ALTERA_AVALON_TIMER_SNAPL_MSK; + alt_timestamp_type upper = IORD_ALTERA_AVALON_TIMER_SNAPH(base) & ALTERA_AVALON_TIMER_SNAPH_MSK; + + return (0xFFFFFFFF - ((upper << 16) | lower)); +#endif + } +} + +/* + * Return the number of timestamp ticks per second. This will be 0 if no + * timestamp device has been registered. + */ + +alt_u32 alt_timestamp_freq(void) +{ + return altera_avalon_timer_ts_freq; +} + +#endif /* timestamp available */ diff --git a/ip/nios2_hw_crc/HAL/inc/ci_crc.h b/software/sys_controller_bsp/drivers/src/altera_avalon_timer_vars.c similarity index 82% rename from ip/nios2_hw_crc/HAL/inc/ci_crc.h rename to software/sys_controller_bsp/drivers/src/altera_avalon_timer_vars.c index ba4d983..cb8b197 100644 --- a/ip/nios2_hw_crc/HAL/inc/ci_crc.h +++ b/software/sys_controller_bsp/drivers/src/altera_avalon_timer_vars.c @@ -1,38 +1,45 @@ -/****************************************************************************** -* * -* License Agreement * -* * -* Copyright (c) 2008 Altera Corporation, San Jose, California, USA. * -* All rights reserved. * -* * -* Permission is hereby granted, free of charge, to any person obtaining a * -* copy of this software and associated documentation files (the "Software"), * -* to deal in the Software without restriction, including without limitation * -* the rights to use, copy, modify, merge, publish, distribute, sublicense, * -* and/or sell copies of the Software, and to permit persons to whom the * -* Software is furnished to do so, subject to the following conditions: * -* * -* The above copyright notice and this permission notice shall be included in * -* all copies or substantial portions of the Software. * -* * -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * -* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * -* DEALINGS IN THE SOFTWARE. * -* * -* This agreement shall be governed in all respects by the laws of the State * -* of California and by the laws of the United States of America. * -* Altera does not recommend, suggest or require that this reference design * -* file be used in conjunction or combination with any other product. * -******************************************************************************/ - - -#ifndef _CRCCI_H_ -#define _CRCCI_H_ - -unsigned long crcCI(unsigned char * input_data, unsigned long input_data_length, int do_initialize); - -#endif //_CRCCI_H_ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +* Altera does not recommend, suggest or require that this reference design * +* file be used in conjunction or combination with any other product. * +******************************************************************************/ + +#include + +#include "altera_avalon_timer.h" +#include "alt_types.h" + +/* + * Variables used to store the timestamp parameters. These are initialised + * from alt_sys_init() using the ALTERA_AVALON_TIMER_INIT macro + * defined in altera_avalon_timer.h. + */ + +void* altera_avalon_timer_ts_base = (void*) 0; +alt_u32 altera_avalon_timer_ts_freq = 0; diff --git a/software/sys_controller_bsp/libhal_bsp.a b/software/sys_controller_bsp/libhal_bsp.a index b07326cbd18f87a400ce0f0653d752f077231182..e7736052b6d22d44a6303750e714cd3d67826e29 100644 GIT binary patch delta 2088 zcmZ`)O>7%g5T3Wr#`$rG*NN@KPKjm5u~S8HY$x$H4oXrfDy4zu7Z8X1r%_NbZc{3n zi>($AAhl{Uhn`T>1N4A|DlbwGNXZF=Kq!!kzY3KKwW0^06{4p|6*KGIt&_sY^WHb} zX5PM^?~MyL#KzC!qCcmq@kD2j8VGa-SW4SKAl{kk(cOWWDgfvJC_e^Jxe8G8DuB`o zQ2$#|8*T#l|9-52_W?qm?AGW(fc@Jv&0hfVTL4{zkEJ#MO0}ORW_{KJaO4rdQA#p( zf)>E~Qt$uk5{*Bpm;Sid{Mzht24;_+nqJJD&gx+HlKb(Y);e@`% zxi?nMOs^bYT+DKSgVZS(LmRMJIVXHL?G8yz0&jP=iWl&{5}|gzh1-5tM9kpUk%;_& zGTQK{CnUPCKir5d)rz^RwWwDcuimzqHt$k<Rgicc-O5kPW#Mr)3Wunf^X+> z#>lW&`+DDM*{&((g8xW9z6`#Vj@M&4%i`ThgN{f^ws<^&8=mO%UrM`=xQY&WP!U7r zUtFf`{GJCe`|EZ9+edcb{@jPfzA#`TG$_0_A_mw{v4=6A7{hnG&SpME7UC1Q=qB8{ zRcxF9IO=T7m654{3@Y`EO?!}VMTt%Emgv~p-MoH(7X3_)>E4wyD>~tH6DPL95&)D=cx%`HovFU%Bu&BRnQtk(gonFF zvrFsLnP%AI9yNb9i%;giK-noG=aQ**I zQBB6JGdBH9NuN=ro}j0}hEjSm_54QsZW_}3HISoWfFP;)0j8ddXC^77AwLyiycaID zLg5I222#QGm!yeQ)aeicjE$Py!q}(;pEBkZvUFgycMYf9Eus&9?Tv^9w5KED4#v_E zX+You#e#0f(FK!{4WULW}*N9 delta 1936 zcmZ`)TWDNW6y4{}JDE)8k(r5^sdGDtnMqADub9j-mKo08?E%w`;AIh9OiRawqg0YD3YH40EoUh4($-UJA| zTJnZPfL-rYJemf0XaXSi6F{p3(Ed9>ig3rBiuW7?80X;tB_E`Kq0Wkr(L>k|xBtIS z(fWV=viKRD(wH(Qxg--L68MTah8N8?8N&S)ZiO6?QQYnF6lPEAkGQx-m|+geH&XKX9sBxCJ6^e}dm z^dZJvdt{^JZPhTK5{?zxW+!7F$m+?3wmHnWhE={)!dfCexp3iaTNd-v7Vp&b@pH42 z{HhBlPfwmaGxHpdwPo;3v`&oUh`rGfm#98zj~zdZM#K`{?TpdbR~5wG8M~GrV2L7< zn5YZl+>EnjUf)Big`6*&Uy*NxON|fA_8CSRV>RCpa+Az2?#85cM>sZWv~ zxwS3Al*)GDy~dW%Jbfu+A3CWMSLu?wf{WOd9iuKS;-%~|-mbM zqwop5k$bAZSL>x5JnQBrz}Kf6^C_Ls%)F@aA8Gc02`+1#ugwECxTs`XU>?nX8{d05jK>pIs_0~Zw;V_mN!+`s}E zV_oMy2x;+*bzLSLc9xzGO!S2&!d|Vg8S6T~gy4aUA0YT7WNOoSN?2_={{148$%T&* z0Ot|BiR=?{;a4F5ZrGaf$$h6qD>Yja{<1G7^62Z0iLbD`HzxH6?5_%Nr#aHvjvl-~ z%g>-f%XxuvV{^?}`n-8^?(iy%I6~HMsdWZuuOlkeTkyuA0M7MQO1a+?RIc>BxxI3S z_fKxCOB~*RQ+fN~rSiXqk{rBe+!9n0L(N8k`eWplv5V@J{NZ1>SO476jat1=)pj^G Ho45Q6MJO_1 diff --git a/software/sys_controller_bsp/linker.h b/software/sys_controller_bsp/linker.h index c045a5f..ca0486b 100644 --- a/software/sys_controller_bsp/linker.h +++ b/software/sys_controller_bsp/linker.h @@ -4,7 +4,7 @@ * Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys' * SOPC Builder design path: ../../sys.sopcinfo * - * Generated: Sun Oct 16 12:18:06 EEST 2016 + * Generated: Fri Oct 05 19:59:02 EEST 2018 */ /* @@ -65,11 +65,11 @@ * */ -#define EPCQ_CONTROLLER_0_AVL_MEM_REGION_BASE 0x0 +#define EPCQ_CONTROLLER_0_AVL_MEM_REGION_BASE 0x800000 #define EPCQ_CONTROLLER_0_AVL_MEM_REGION_SPAN 8388608 -#define ONCHIP_MEMORY2_0_REGION_BASE 0x810020 -#define ONCHIP_MEMORY2_0_REGION_SPAN 40928 -#define RESET_REGION_BASE 0x810000 +#define ONCHIP_MEMORY2_0_REGION_BASE 0x10020 +#define ONCHIP_MEMORY2_0_REGION_SPAN 36832 +#define RESET_REGION_BASE 0x10000 #define RESET_REGION_SPAN 32 diff --git a/software/sys_controller_bsp/linker.x b/software/sys_controller_bsp/linker.x index bb7d4db..7e01d5e 100644 --- a/software/sys_controller_bsp/linker.x +++ b/software/sys_controller_bsp/linker.x @@ -4,7 +4,7 @@ * Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys' * SOPC Builder design path: ../../sys.sopcinfo * - * Generated: Sun Oct 16 12:18:06 EEST 2016 + * Generated: Fri Oct 05 19:59:02 EEST 2018 */ /* @@ -50,14 +50,14 @@ MEMORY { - epcq_controller_0_avl_mem : ORIGIN = 0x0, LENGTH = 8388608 - reset : ORIGIN = 0x810000, LENGTH = 32 - onchip_memory2_0 : ORIGIN = 0x810020, LENGTH = 40928 + reset : ORIGIN = 0x10000, LENGTH = 32 + onchip_memory2_0 : ORIGIN = 0x10020, LENGTH = 36832 + epcq_controller_0_avl_mem : ORIGIN = 0x800000, LENGTH = 8388608 } /* Define symbols for each memory base-address */ -__alt_mem_epcq_controller_0_avl_mem = 0x0; -__alt_mem_onchip_memory2_0 = 0x810000; +__alt_mem_onchip_memory2_0 = 0x10000; +__alt_mem_epcq_controller_0_avl_mem = 0x800000; OUTPUT_FORMAT( "elf32-littlenios2", "elf32-littlenios2", @@ -309,24 +309,7 @@ SECTIONS * */ - .epcq_controller_0_avl_mem : AT ( LOADADDR (.bss) + SIZEOF (.bss) ) - { - PROVIDE (_alt_partition_epcq_controller_0_avl_mem_start = ABSOLUTE(.)); - *(.epcq_controller_0_avl_mem .epcq_controller_0_avl_mem. epcq_controller_0_avl_mem.*) - . = ALIGN(4); - PROVIDE (_alt_partition_epcq_controller_0_avl_mem_end = ABSOLUTE(.)); - } > epcq_controller_0_avl_mem - - PROVIDE (_alt_partition_epcq_controller_0_avl_mem_load_addr = LOADADDR(.epcq_controller_0_avl_mem)); - - /* - * - * This section's LMA is set to the .text region. - * crt0 will copy to this section's specified mapped region virtual memory address (VMA) - * - */ - - .onchip_memory2_0 LOADADDR (.epcq_controller_0_avl_mem) + SIZEOF (.epcq_controller_0_avl_mem) : AT ( LOADADDR (.epcq_controller_0_avl_mem) + SIZEOF (.epcq_controller_0_avl_mem) ) + .onchip_memory2_0 LOADADDR (.bss) + SIZEOF (.bss) : AT ( LOADADDR (.bss) + SIZEOF (.bss) ) { PROVIDE (_alt_partition_onchip_memory2_0_start = ABSOLUTE(.)); *(.onchip_memory2_0 .onchip_memory2_0. onchip_memory2_0.*) @@ -339,6 +322,23 @@ SECTIONS PROVIDE (_alt_partition_onchip_memory2_0_load_addr = LOADADDR(.onchip_memory2_0)); + /* + * + * This section's LMA is set to the .text region. + * crt0 will copy to this section's specified mapped region virtual memory address (VMA) + * + */ + + .epcq_controller_0_avl_mem : AT ( LOADADDR (.onchip_memory2_0) + SIZEOF (.onchip_memory2_0) ) + { + PROVIDE (_alt_partition_epcq_controller_0_avl_mem_start = ABSOLUTE(.)); + *(.epcq_controller_0_avl_mem .epcq_controller_0_avl_mem. epcq_controller_0_avl_mem.*) + . = ALIGN(4); + PROVIDE (_alt_partition_epcq_controller_0_avl_mem_end = ABSOLUTE(.)); + } > epcq_controller_0_avl_mem + + PROVIDE (_alt_partition_epcq_controller_0_avl_mem_load_addr = LOADADDR(.epcq_controller_0_avl_mem)); + /* * Stabs debugging sections. * @@ -386,7 +386,7 @@ SECTIONS /* * Don't override this, override the __alt_stack_* symbols instead. */ -__alt_data_end = 0x81a000; +__alt_data_end = 0x19000; /* * The next two symbols define the location of the default stack. You can @@ -402,4 +402,4 @@ PROVIDE( __alt_stack_limit = __alt_stack_base ); * Override this symbol to put the heap in a different memory. */ PROVIDE( __alt_heap_start = end ); -PROVIDE( __alt_heap_limit = 0x81a000 ); +PROVIDE( __alt_heap_limit = 0x19000 ); diff --git a/software/sys_controller_bsp/mem_init.mk b/software/sys_controller_bsp/mem_init.mk index dbb339c..014f1e9 100644 --- a/software/sys_controller_bsp/mem_init.mk +++ b/software/sys_controller_bsp/mem_init.mk @@ -161,7 +161,7 @@ ACDS_VERSION := 17.1 SIM_OPTIMIZE ?= 0 # The CPU reset address as needed by elf2flash -RESET_ADDRESS ?= 0x00810000 +RESET_ADDRESS ?= 0x00010000 # The specific Nios II ELF file format to use. NIOS2_ELF_FORMAT ?= elf32-littlenios2 @@ -175,8 +175,8 @@ MEM_0 := epcq_controller_0 $(MEM_0)_NAME := epcq_controller_0 HEX_FILES += $(MEM_INIT_DIR)/$(MEM_0).hex MEM_INIT_INSTALL_FILES += $(MEM_INIT_INSTALL_DIR)/$(MEM_0).hex -$(MEM_0)_START := 0x00000000 -$(MEM_0)_END := 0x007fffff +$(MEM_0)_START := 0x00800000 +$(MEM_0)_END := 0x00ffffff $(MEM_0)_SPAN := 0x00800000 $(MEM_0)_HIERARCHICAL_PATH := epcq_controller_0 $(MEM_0)_WIDTH := 32 @@ -198,9 +198,9 @@ DAT_FILES += $(HDL_SIM_DIR)/$(MEM_1).dat HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_1).dat SYM_FILES += $(HDL_SIM_DIR)/$(MEM_1).sym HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_1).sym -$(MEM_1)_START := 0x00810000 -$(MEM_1)_END := 0x00819fff -$(MEM_1)_SPAN := 0x0000a000 +$(MEM_1)_START := 0x00010000 +$(MEM_1)_END := 0x00018fff +$(MEM_1)_SPAN := 0x00009000 $(MEM_1)_HIERARCHICAL_PATH := onchip_memory2_0 $(MEM_1)_WIDTH := 32 $(MEM_1)_HEX_DATA_WIDTH := 32 @@ -304,10 +304,10 @@ ELF_TO_HEX_CMD = $(strip $(if $(flash_mem_boot_loader_flag), \ $(ELF_TO_HEX_CMD_NO_BOOTLOADER) \ )) -$(HEX_FILES): %.hex: $(ELF) - $(post-process-info) - @$(MKDIR) $(@D) - $(ELF_TO_HEX_CMD) +#$(HEX_FILES): %.hex: $(ELF) +# $(post-process-info) +# @$(MKDIR) $(@D) +# $(ELF_TO_HEX_CMD) $(SYM_FILES): %.sym: $(ELF) $(post-process-info) diff --git a/software/sys_controller_bsp/memory.gdb b/software/sys_controller_bsp/memory.gdb index 41fd763..5197bae 100644 --- a/software/sys_controller_bsp/memory.gdb +++ b/software/sys_controller_bsp/memory.gdb @@ -3,7 +3,7 @@ # Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys' # SOPC Builder design path: ../../sys.sopcinfo # -# Generated: Sun Oct 16 12:18:06 EEST 2016 +# Generated: Fri Oct 05 19:59:02 EEST 2018 # DO NOT MODIFY THIS FILE # @@ -46,8 +46,8 @@ # The cache attribute is specified which improves GDB performance # by allowing GDB to cache memory contents on the host. -# epcq_controller_0_avl_mem -memory 0x0 0x800000 cache - # onchip_memory2_0 -memory 0x810000 0x81a000 cache +memory 0x10000 0x19000 cache + +# epcq_controller_0_avl_mem +memory 0x800000 0x1000000 cache diff --git a/software/sys_controller_bsp/settings.bsp b/software/sys_controller_bsp/settings.bsp index 6657c70..5b765a8 100644 --- a/software/sys_controller_bsp/settings.bsp +++ b/software/sys_controller_bsp/settings.bsp @@ -2,8 +2,8 @@ hal default - Sep 25, 2018 9:18:49 PM - 1537899529022 + Oct 5, 2018 8:21:01 PM + 1538758741996 ./ settings.bsp ../../sys.sopcinfo @@ -898,101 +898,101 @@ false - - epcq_controller_0_avl_mem - 0x00000000 - 0x007FFFFF - 8388608 - flash, memory, non-volatile - onchip_memory2_0 - 0x00810000 - 0x00819FFF + 0x00010000 - 0x00019FFF 40960 memory timer_0 - 0x00821000 - 0x0082101F + 0x00020000 - 0x0002001F 32 timer + + jtag_uart_0 + 0x00020020 - 0x00020027 + 8 + printable + epcq_controller_0_avl_csr - 0x00821020 - 0x0082103F + 0x00020100 - 0x0002011F 32 i2c_opencores_1 - 0x00821040 - 0x0082105F + 0x00021020 - 0x0002103F 32 i2c_opencores_0 - 0x00821060 - 0x0082107F + 0x00021040 - 0x0002105F 32 pio_8 - 0x00821080 - 0x0082108F + 0x00021060 - 0x0002106F 16 pio_7 - 0x00821090 - 0x0082109F + 0x00021070 - 0x0002107F 16 pio_6 - 0x008210A0 - 0x008210AF + 0x00021080 - 0x0002108F 16 pio_5 - 0x008210B0 - 0x008210BF + 0x00021090 - 0x0002109F 16 pio_4 - 0x008210C0 - 0x008210CF + 0x000210A0 - 0x000210AF 16 pio_3 - 0x008210D0 - 0x008210DF + 0x000210B0 - 0x000210BF 16 pio_2 - 0x008210E0 - 0x008210EF + 0x000210C0 - 0x000210CF 16 pio_1 - 0x008210F0 - 0x008210FF + 0x000210D0 - 0x000210DF 16 pio_0 - 0x00821100 - 0x0082110F + 0x000210E0 - 0x000210EF 16 - jtag_uart_0 - 0x00821110 - 0x00821117 - 8 - printable + epcq_controller_0_avl_mem + 0x00800000 - 0x00FFFFFF + 8388608 + flash, memory, non-volatile .text @@ -1018,4 +1018,4 @@ .stack onchip_memory2_0 - \ No newline at end of file + diff --git a/software/sys_controller_bsp/system.h b/software/sys_controller_bsp/system.h index e07c2c7..3f10d63 100644 --- a/software/sys_controller_bsp/system.h +++ b/software/sys_controller_bsp/system.h @@ -4,7 +4,7 @@ * Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys' * SOPC Builder design path: ../../sys.sopcinfo * - * Generated: Sun Mar 25 16:51:03 EEST 2018 + * Generated: Fri Oct 05 19:59:02 EEST 2018 */ /* @@ -62,7 +62,7 @@ #define ALT_CPU_ARCHITECTURE "altera_nios2_gen2" #define ALT_CPU_BIG_ENDIAN 0 -#define ALT_CPU_BREAK_ADDR 0x00820820 +#define ALT_CPU_BREAK_ADDR 0x00000820 #define ALT_CPU_CPU_ARCH_NIOS2_R1 #define ALT_CPU_CPU_FREQ 27000000u #define ALT_CPU_CPU_ID_SIZE 1 @@ -72,7 +72,7 @@ #define ALT_CPU_DCACHE_LINE_SIZE 0 #define ALT_CPU_DCACHE_LINE_SIZE_LOG2 0 #define ALT_CPU_DCACHE_SIZE 0 -#define ALT_CPU_EXCEPTION_ADDR 0x00810020 +#define ALT_CPU_EXCEPTION_ADDR 0x00010020 #define ALT_CPU_FLASH_ACCELERATOR_LINES 0 #define ALT_CPU_FLASH_ACCELERATOR_LINE_SIZE 0 #define ALT_CPU_FLUSHDA_SUPPORTED @@ -87,10 +87,10 @@ #define ALT_CPU_ICACHE_LINE_SIZE 0 #define ALT_CPU_ICACHE_LINE_SIZE_LOG2 0 #define ALT_CPU_ICACHE_SIZE 0 -#define ALT_CPU_INST_ADDR_WIDTH 0x18 +#define ALT_CPU_INST_ADDR_WIDTH 0x11 #define ALT_CPU_NAME "nios2_qsys_0" #define ALT_CPU_OCI_VERSION 1 -#define ALT_CPU_RESET_ADDR 0x00810000 +#define ALT_CPU_RESET_ADDR 0x00010000 /* @@ -99,7 +99,7 @@ */ #define NIOS2_BIG_ENDIAN 0 -#define NIOS2_BREAK_ADDR 0x00820820 +#define NIOS2_BREAK_ADDR 0x00000820 #define NIOS2_CPU_ARCH_NIOS2_R1 #define NIOS2_CPU_FREQ 27000000u #define NIOS2_CPU_ID_SIZE 1 @@ -109,7 +109,7 @@ #define NIOS2_DCACHE_LINE_SIZE 0 #define NIOS2_DCACHE_LINE_SIZE_LOG2 0 #define NIOS2_DCACHE_SIZE 0 -#define NIOS2_EXCEPTION_ADDR 0x00810020 +#define NIOS2_EXCEPTION_ADDR 0x00010020 #define NIOS2_FLASH_ACCELERATOR_LINES 0 #define NIOS2_FLASH_ACCELERATOR_LINE_SIZE 0 #define NIOS2_FLUSHDA_SUPPORTED @@ -123,9 +123,9 @@ #define NIOS2_ICACHE_LINE_SIZE 0 #define NIOS2_ICACHE_LINE_SIZE_LOG2 0 #define NIOS2_ICACHE_SIZE 0 -#define NIOS2_INST_ADDR_WIDTH 0x18 +#define NIOS2_INST_ADDR_WIDTH 0x11 #define NIOS2_OCI_VERSION 1 -#define NIOS2_RESET_ADDR 0x00810000 +#define NIOS2_RESET_ADDR 0x00010000 /* @@ -140,7 +140,7 @@ #define ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0_N 0x9 //#define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0(A) __builtin_custom_ini(ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0_N,(A)) #define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0_N 0x8 - + #define ALT_CI_NIOS2_HW_CRC32_0(n,A) n #define ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0(A) A #define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0(A) A @@ -179,19 +179,19 @@ #define ALT_NUM_INTERNAL_INTERRUPT_CONTROLLERS 1 #define ALT_NUM_INTERRUPT_CONTROLLERS 1 #define ALT_STDERR "/dev/jtag_uart_0" -#define ALT_STDERR_BASE 0x821110 +#define ALT_STDERR_BASE 0x20020 #define ALT_STDERR_DEV jtag_uart_0 #define ALT_STDERR_IS_JTAG_UART #define ALT_STDERR_PRESENT #define ALT_STDERR_TYPE "altera_avalon_jtag_uart" #define ALT_STDIN "/dev/jtag_uart_0" -#define ALT_STDIN_BASE 0x821110 +#define ALT_STDIN_BASE 0x20020 #define ALT_STDIN_DEV jtag_uart_0 #define ALT_STDIN_IS_JTAG_UART #define ALT_STDIN_PRESENT #define ALT_STDIN_TYPE "altera_avalon_jtag_uart" #define ALT_STDOUT "/dev/jtag_uart_0" -#define ALT_STDOUT_BASE 0x821110 +#define ALT_STDOUT_BASE 0x20020 #define ALT_STDOUT_DEV jtag_uart_0 #define ALT_STDOUT_IS_JTAG_UART #define ALT_STDOUT_PRESENT @@ -205,7 +205,7 @@ */ #define ALT_MODULE_CLASS_epcq_controller_0_avl_csr altera_epcq_controller_mod -#define EPCQ_CONTROLLER_0_AVL_CSR_BASE 0x821020 +#define EPCQ_CONTROLLER_0_AVL_CSR_BASE 0x20100 #define EPCQ_CONTROLLER_0_AVL_CSR_FLASH_TYPE "EPCS64" #define EPCQ_CONTROLLER_0_AVL_CSR_IRQ 2 #define EPCQ_CONTROLLER_0_AVL_CSR_IRQ_INTERRUPT_CONTROLLER_ID 0 @@ -225,7 +225,7 @@ */ #define ALT_MODULE_CLASS_epcq_controller_0_avl_mem altera_epcq_controller_mod -#define EPCQ_CONTROLLER_0_AVL_MEM_BASE 0x0 +#define EPCQ_CONTROLLER_0_AVL_MEM_BASE 0x800000 #define EPCQ_CONTROLLER_0_AVL_MEM_FLASH_TYPE "EPCS64" #define EPCQ_CONTROLLER_0_AVL_MEM_IRQ -1 #define EPCQ_CONTROLLER_0_AVL_MEM_IRQ_INTERRUPT_CONTROLLER_ID -1 @@ -255,7 +255,7 @@ */ #define ALT_MODULE_CLASS_i2c_opencores_0 i2c_opencores -#define I2C_OPENCORES_0_BASE 0x821060 +#define I2C_OPENCORES_0_BASE 0x21040 #define I2C_OPENCORES_0_IRQ 3 #define I2C_OPENCORES_0_IRQ_INTERRUPT_CONTROLLER_ID 0 #define I2C_OPENCORES_0_NAME "/dev/i2c_opencores_0" @@ -269,7 +269,7 @@ */ #define ALT_MODULE_CLASS_i2c_opencores_1 i2c_opencores -#define I2C_OPENCORES_1_BASE 0x821040 +#define I2C_OPENCORES_1_BASE 0x21020 #define I2C_OPENCORES_1_IRQ 4 #define I2C_OPENCORES_1_IRQ_INTERRUPT_CONTROLLER_ID 0 #define I2C_OPENCORES_1_NAME "/dev/i2c_opencores_1" @@ -283,7 +283,7 @@ */ #define ALT_MODULE_CLASS_jtag_uart_0 altera_avalon_jtag_uart -#define JTAG_UART_0_BASE 0x821110 +#define JTAG_UART_0_BASE 0x20020 #define JTAG_UART_0_IRQ 1 #define JTAG_UART_0_IRQ_INTERRUPT_CONTROLLER_ID 0 #define JTAG_UART_0_NAME "/dev/jtag_uart_0" @@ -303,7 +303,7 @@ #define ALT_MODULE_CLASS_onchip_memory2_0 altera_avalon_onchip_memory2 #define ONCHIP_MEMORY2_0_ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR 0 #define ONCHIP_MEMORY2_0_ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE 0 -#define ONCHIP_MEMORY2_0_BASE 0x810000 +#define ONCHIP_MEMORY2_0_BASE 0x10000 #define ONCHIP_MEMORY2_0_CONTENTS_INFO "" #define ONCHIP_MEMORY2_0_DUAL_PORT 0 #define ONCHIP_MEMORY2_0_GUI_RAM_BLOCK_TYPE "AUTO" @@ -330,7 +330,7 @@ */ #define ALT_MODULE_CLASS_pio_0 altera_avalon_pio -#define PIO_0_BASE 0x821100 +#define PIO_0_BASE 0x210e0 #define PIO_0_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_0_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_0_CAPTURE 0 @@ -357,7 +357,7 @@ */ #define ALT_MODULE_CLASS_pio_1 altera_avalon_pio -#define PIO_1_BASE 0x8210f0 +#define PIO_1_BASE 0x210d0 #define PIO_1_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_1_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_1_CAPTURE 0 @@ -384,7 +384,7 @@ */ #define ALT_MODULE_CLASS_pio_2 altera_avalon_pio -#define PIO_2_BASE 0x8210e0 +#define PIO_2_BASE 0x210c0 #define PIO_2_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_2_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_2_CAPTURE 0 @@ -411,7 +411,7 @@ */ #define ALT_MODULE_CLASS_pio_3 altera_avalon_pio -#define PIO_3_BASE 0x8210d0 +#define PIO_3_BASE 0x210b0 #define PIO_3_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_3_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_3_CAPTURE 0 @@ -438,7 +438,7 @@ */ #define ALT_MODULE_CLASS_pio_4 altera_avalon_pio -#define PIO_4_BASE 0x8210c0 +#define PIO_4_BASE 0x210a0 #define PIO_4_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_4_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_4_CAPTURE 0 @@ -465,7 +465,7 @@ */ #define ALT_MODULE_CLASS_pio_5 altera_avalon_pio -#define PIO_5_BASE 0x8210b0 +#define PIO_5_BASE 0x21090 #define PIO_5_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_5_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_5_CAPTURE 0 @@ -492,7 +492,7 @@ */ #define ALT_MODULE_CLASS_pio_6 altera_avalon_pio -#define PIO_6_BASE 0x8210a0 +#define PIO_6_BASE 0x21080 #define PIO_6_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_6_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_6_CAPTURE 0 @@ -519,7 +519,7 @@ */ #define ALT_MODULE_CLASS_pio_7 altera_avalon_pio -#define PIO_7_BASE 0x821090 +#define PIO_7_BASE 0x21070 #define PIO_7_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_7_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_7_CAPTURE 0 @@ -546,7 +546,7 @@ */ #define ALT_MODULE_CLASS_pio_8 altera_avalon_pio -#define PIO_8_BASE 0x821080 +#define PIO_8_BASE 0x21060 #define PIO_8_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_8_BIT_MODIFYING_OUTPUT_REGISTER 0 #define PIO_8_CAPTURE 0 @@ -574,7 +574,7 @@ #define ALT_MODULE_CLASS_timer_0 altera_avalon_timer #define TIMER_0_ALWAYS_RUN 0 -#define TIMER_0_BASE 0x821000 +#define TIMER_0_BASE 0x20000 #define TIMER_0_COUNTER_SIZE 32 #define TIMER_0_FIXED_PERIOD 0 #define TIMER_0_FREQ 27000000 diff --git a/sys.qsys b/sys.qsys index c109206..39f9b68 100644 --- a/sys.qsys +++ b/sys.qsys @@ -21,23 +21,33 @@ { datum _sortIndex { - value = "8"; + value = "6"; type = "int"; } } element epcq_controller_0.avl_csr { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523808"; + value = "131328"; type = "String"; } } element epcq_controller_0.avl_mem { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "0"; + value = "8388608"; type = "String"; } } @@ -45,15 +55,20 @@ { datum _sortIndex { - value = "9"; + value = "7"; type = "int"; } } element i2c_opencores_0.avalon_slave_0 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523872"; + value = "135232"; type = "String"; } } @@ -61,15 +76,20 @@ { datum _sortIndex { - value = "10"; + value = "8"; type = "int"; } } element i2c_opencores_1.avalon_slave_0 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523840"; + value = "135200"; type = "String"; } } @@ -77,51 +97,24 @@ { datum _sortIndex { - value = "7"; + value = "5"; type = "int"; } } element jtag_uart_0.avalon_jtag_slave { - datum baseAddress - { - value = "8524048"; - type = "String"; - } - } - element nios2_hw_crc32_0 - { - datum _sortIndex - { - value = "2"; - type = "int"; - } - } - element nios2_qsys_0 - { - datum _sortIndex + datum _lockedAddress { value = "1"; - type = "int"; + type = "boolean"; } - } - element nios2_qsys_0.debug_mem_slave - { datum baseAddress { - value = "8521728"; + value = "131104"; type = "String"; } } - element nios_custom_instr_bitswap_0 - { - datum _sortIndex - { - value = "4"; - type = "int"; - } - } - element nios_custom_instr_endianconverter_0 + element master_0 { datum _sortIndex { @@ -133,15 +126,33 @@ { datum _sortIndex { - value = "5"; + value = "2"; type = "int"; } } element onchip_memory2_0.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8454144"; + value = "65536"; + type = "String"; + } + } + element onchip_memory2_0.s2 + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + datum baseAddress + { + value = "65536"; type = "String"; } } @@ -149,15 +160,20 @@ { datum _sortIndex { - value = "11"; + value = "9"; type = "int"; } } element pio_0.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8524032"; + value = "135392"; type = "String"; } } @@ -165,15 +181,20 @@ { datum _sortIndex { - value = "12"; + value = "10"; type = "int"; } } element pio_1.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8524016"; + value = "135376"; type = "String"; } } @@ -181,15 +202,20 @@ { datum _sortIndex { - value = "13"; + value = "11"; type = "int"; } } element pio_2.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8524000"; + value = "135360"; type = "String"; } } @@ -197,15 +223,20 @@ { datum _sortIndex { - value = "14"; + value = "12"; type = "int"; } } element pio_3.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523984"; + value = "135344"; type = "String"; } } @@ -213,15 +244,20 @@ { datum _sortIndex { - value = "15"; + value = "13"; type = "int"; } } element pio_4.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523968"; + value = "135328"; type = "String"; } } @@ -229,15 +265,20 @@ { datum _sortIndex { - value = "16"; + value = "14"; type = "int"; } } element pio_5.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523952"; + value = "135312"; type = "String"; } } @@ -245,15 +286,20 @@ { datum _sortIndex { - value = "17"; + value = "15"; type = "int"; } } element pio_6.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523936"; + value = "135296"; type = "String"; } } @@ -261,15 +307,20 @@ { datum _sortIndex { - value = "18"; + value = "16"; type = "int"; } } element pio_7.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523920"; + value = "135280"; type = "String"; } } @@ -277,31 +328,57 @@ { datum _sortIndex { - value = "19"; + value = "17"; type = "int"; } } element pio_8.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523904"; + value = "135264"; type = "String"; } } + element pulpino_0 + { + datum _sortIndex + { + value = "1"; + type = "int"; + } + } + element pulpino_0.avalon_slave_debug + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + } element timer_0 { datum _sortIndex { - value = "6"; + value = "4"; type = "int"; } } element timer_0.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "8523776"; + value = "131072"; type = "String"; } } @@ -337,6 +414,11 @@ internal="i2c_opencores_1.export" type="conduit" dir="end" /> + + @@ -436,210 +523,18 @@ - - - - - - - - - - - - - - nios2_qsys_0.jtag_debug_module - - - - - - ]]> - - - - - - - ]]> - - - - - - - - - - - - - - - - - - - - - - ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 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PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 - - - - - - - - - - - - - - - - - ]]> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 - + @@ -666,7 +561,7 @@ - + @@ -799,6 +694,18 @@ + + + + + + + + + + + + @@ -814,175 +721,174 @@ + + + + + - + - + - + - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + start="master_0.master" + end="onchip_memory2_0.s2"> - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -994,11 +900,17 @@ + + - - - + + + - - - - - - + start="pulpino_0.interrupt_receiver" + end="jtag_uart_0.irq"> + - nios_custom_instr_endianconverter_0 - - - - - nios_custom_instr_bitswap_0 - - - + start="clk_27.clk_reset" + end="master_0.clk_reset" /> - + diff --git a/sys.sopcinfo b/sys.sopcinfo index 9194afe..8f6d1fe 100644 --- a/sys.sopcinfo +++ b/sys.sopcinfo @@ -1,11 +1,11 @@ - + java.lang.Integer - 1524077647 + 1538769758 false true false @@ -330,12 +330,6 @@ parameters are a RESULT of the module parameters. --> 1 clk - - false - nios2_qsys_0 - clk - nios2_qsys_0.clk - false jtag_uart_0 @@ -402,12 +396,24 @@ parameters are a RESULT of the module parameters. --> clk pio_8.clk + + false + master_0 + clk + master_0.clk + false onchip_memory2_0 clk1 onchip_memory2_0.clk1 + + false + pulpino_0 + clk_sink + pulpino_0.clk_sink + false i2c_opencores_0 @@ -3632,1949 +3638,59 @@ parameters are a RESULT of the module parameters. --> - - - int - 32 - false - true - true - true - - - java.math.BigInteger - 4294967295 - false - true - true - true - - - java.math.BigInteger - 79764919 - false - true - true - true - - - int - 1 - false - true - true - true - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 4294967295 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - - - - java.lang.String - - true - true - false - true - - - int - 3 - true - true - false - true - - - int - 0 - false - false - true - true - - - com.altera.sopcmodel.custominstruction.CustomInstruction$ClockCycleType - VARIABLE - true - true - true - true - - - int - 0 - true - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - false - true - - - int - 1 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios_custom_instruction - false - - clk - Input - 1 - clk - - - clk_en - Input - 1 - clk_en - - - dataa - Input - 32 - dataa - - - done - Output - 1 - done - - - n - Input - 3 - n - - - reset - Input - 1 - reset - - - result - Output - 32 - result - - - start - Input - 1 - start - - - - + path="master_0"> debug.hostConnection - type jtag id 70:34|110:135 + type jtag id 110:132 - - embeddedsw.CMacro.BIG_ENDIAN + + int 0 - - - embeddedsw.CMacro.BREAK_ADDR - 0x00820820 - - - embeddedsw.CMacro.CPU_ARCH_NIOS2_R1 - - - - embeddedsw.CMacro.CPU_FREQ - 27000000u - - - embeddedsw.CMacro.CPU_ID_SIZE - 1 - - - embeddedsw.CMacro.CPU_ID_VALUE - 0x00000000 - - - embeddedsw.CMacro.CPU_IMPLEMENTATION - "tiny" - - - embeddedsw.CMacro.DATA_ADDR_WIDTH - 24 - - - embeddedsw.CMacro.DCACHE_LINE_SIZE - 0 - - - embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2 - 0 - - - embeddedsw.CMacro.DCACHE_SIZE - 0 - - - embeddedsw.CMacro.EXCEPTION_ADDR - 0x00810020 - - - embeddedsw.CMacro.FLASH_ACCELERATOR_LINES - 0 - - - embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE - 0 - - - embeddedsw.CMacro.FLUSHDA_SUPPORTED - - - - embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT - 0 - - - embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT - 0 - - - embeddedsw.CMacro.HARDWARE_MULX_PRESENT - 0 - - - embeddedsw.CMacro.HAS_DEBUG_CORE - 1 - - - embeddedsw.CMacro.HAS_DEBUG_STUB - - - - embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION - - - - embeddedsw.CMacro.HAS_JMPI_INSTRUCTION - - - - embeddedsw.CMacro.ICACHE_LINE_SIZE - 0 - - - embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2 - 0 - - - embeddedsw.CMacro.ICACHE_SIZE - 0 - - - embeddedsw.CMacro.INST_ADDR_WIDTH - 24 - - - embeddedsw.CMacro.OCI_VERSION - 1 - - - embeddedsw.CMacro.RESET_ADDR - 0x00810000 - - - embeddedsw.configuration.DataCacheVictimBufImpl - ram - - - embeddedsw.configuration.HDLSimCachesCleared - 1 - - - embeddedsw.configuration.breakOffset - 32 - - - embeddedsw.configuration.breakSlave - nios2_qsys_0.debug_mem_slave - - - embeddedsw.configuration.cpuArchitecture - Nios II - - - embeddedsw.configuration.exceptionOffset - 32 - - - embeddedsw.configuration.exceptionSlave - onchip_memory2_0.s1 - - - embeddedsw.configuration.resetOffset - 0 - - - embeddedsw.configuration.resetSlave - onchip_memory2_0.s1 - - - embeddedsw.dts.compatible - altr,nios2-1.1 - - - embeddedsw.dts.group - cpu - - - embeddedsw.dts.name - nios2 - - - embeddedsw.dts.params.altr,exception-addr - 0x00810020 - - - embeddedsw.dts.params.altr,implementation - "tiny" - - - embeddedsw.dts.params.altr,reset-addr - 0x00810000 - - - embeddedsw.dts.params.clock-frequency - 27000000u - - - embeddedsw.dts.params.dcache-line-size - 0 - - - embeddedsw.dts.params.dcache-size - 0 - - - embeddedsw.dts.params.icache-line-size - 0 - - - embeddedsw.dts.params.icache-size - 0 - - - embeddedsw.dts.vendor - altr - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false false true true true - - boolean - false - false - true - true - true - - - boolean - false + + int + 50000 false false true true - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - true - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - int - 1 - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - true - false - true - false - true - - + int 0 false - false - true - true - - - int - 0 - false - false - true - true - - - boolean - true - false - false - true - true - - - boolean - true - false - true - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - true - false - true - false - true - - - boolean - true - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - false - true - true - - - boolean - false - false - false - true - true - - - boolean - false - false - false - true - true - - - boolean - true - false - false - true - true - - - boolean - false - false - true - true - true - - - boolean - true - false - true - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - false - true - true - - - int - 8 - false - false - true - true - - - int - 8 - false - false - true - true - - - int - 0 - false - false - true - true - - - int - 0 - false - true - true - true - - - int - 32 - false - true - true - true - - - int - 0 - false - true - true - true - - - int - 32 - false - true - false - true - - - java.lang.String - - false - true - false - true - - - java.lang.String - - false - true - false - true - - - java.lang.String - onchip_memory2_0.s1 - false - true - true - true - - - java.lang.String - None - false - false - true - true - - - java.lang.String - onchip_memory2_0.s1 - false - true - true - true - - - java.lang.String - nios2_qsys_0.jtag_debug_module - false - true - false - true - - - java.lang.String - Internal - false - false - true - true - - - java.lang.String - Dynamic - false - false - true - true - - - int - 8 - false - false - true - true - - - int - 1 - false - true - false - true - - - boolean - false - true - true - false - true - - - java.lang.String - medium_le_shift - true - true - false - true - - - java.lang.String - no_mul - true - true - false - true - - - int - 0 - false - false - true - true - - - int - 2 - false - false - true - true - - - int - 0 - false - false - true - true - - - int - 1 - false - false - true - true - - - java.lang.String - no_div - false - false - true - true - - - int - 12 - false - false - true - true - - - int - 12 - false - false - true - true - - - int - 4 - false - false - true - true - - - int - 6 - false - false - true - true - - - int - 7 - false - false - true - true - - - int - 16 - false - false - true - true - - - int - 8 - false - false - true - true - - - java.lang.String - Tiny - false - true - true - true - - - int - 0 - false - false - true - true - - - int - 2 - false - false - true - true - - - int - 0 - false - false - true - true - - - java.lang.String - Automatic - false - true - false - true - - - java.lang.String - Automatic - false - true - false - true - - - int - 0 - false - false - true - true - - - java.lang.String - None - false - false - true - true - - - java.lang.String - false - false - false - true - true - - - java.lang.String - ram - false - false - true - true - - - int - 0 - false - false - true - true - - - java.lang.String - Automatic - false - true - false - true - - - java.lang.String - Automatic - false - true - false - true - - - int - 0 - false - false - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - true - true - - - boolean - true - false - true - false - true - - - boolean - true - false - true - false - true - - - boolean - true - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - java.lang.String - Automatic - false - true - false - true - - - java.lang.String - Automatic - false - true - false - true - - - boolean - false - false - true - false - true - - - java.lang.String - Automatic - false - true - false - true - - - java.lang.String - Automatic - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - true - false - true - true - true - - - boolean - true - false - true - false - true - - - boolean - false - false - false - true - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - false - true - - - java.lang.String - _128 - false - false - true - true - - - int - 0 - false - false - true - true - - - int - 0 - false - false - true - true - - - java.lang.String - none - false - false - true - true - - - java.lang.String - onchip_trace - false - false - true - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - long - 0 - false - true - false - true - - - int - 8454144 - true - true - true - true - - - int - 8454176 - true - true - true - true - - - int - 8521760 - true - true - false - true - - - int - 0 - true - true - true - true - - - java.lang.String - false - true - true - false - true - - - int - 0 - true - true - false - true - - - java.lang.String - nios2_qsys_0.debug_mem_slave - true - true - false - true - - - int - 32 - true - true - false - true - - - boolean - false - true - true - false - true - - - boolean - false - true - true - false - true - - - java.lang.String - "synthesis translate_on" - true - true - false - true - - - java.lang.String - "synthesis translate_off" - true - true - false - true - - - boolean - false - true - true - false - true - - - boolean - false - true - true - false - true - - - boolean - false - true - true - false - true - - - boolean - false - true - true - false - true - - - int - 24 - false - true - false - true - ADDRESS_WIDTH - instruction_master - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - flash_instruction_master - - - int - 24 - false - true - false - true - ADDRESS_WIDTH - data_master - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_data_master_0 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_data_master_1 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_data_master_2 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_data_master_3 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_instruction_master_0 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_instruction_master_1 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_instruction_master_2 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - tightly_coupled_instruction_master_3 - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - data_master_high_performance - - - int - 1 - false - true - false - true - ADDRESS_WIDTH - instruction_master_high_performance - - - java.lang.String - ]]> - false - true - false - true - ADDRESS_MAP - instruction_master - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - flash_instruction_master - - - java.lang.String - ]]> - false - true - false - true - ADDRESS_MAP - data_master - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_data_master_0 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_data_master_1 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_data_master_2 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_data_master_3 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_instruction_master_0 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_instruction_master_1 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_instruction_master_2 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - tightly_coupled_instruction_master_3 - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - data_master_high_performance - - - java.lang.String - - false - true - false - true - ADDRESS_MAP - instruction_master_high_performance - - - long - 27000000 - false true false true CLOCK_RATE - clk + clock - + + int + 0 + false + true + true + true + + + int + 2 + false + false + true + true + + java.lang.String CYCLONEIVE false @@ -5583,65 +3699,6 @@ the requested settings for a module instance. --> true DEVICE_FAMILY - - long - 31 - false - true - false - true - INTERRUPTS_USED - irq - - - java.lang.String - ]]> - false - true - false - true - CUSTOM_INSTRUCTION_SLAVES - custom_instruction_master - - - java.lang.String - ]]> - false - true - false - true - CUSTOM_INSTRUCTION_SLAVES - custom_instruction_master_a - - - java.lang.String - ]]> - false - true - false - true - CUSTOM_INSTRUCTION_SLAVES - custom_instruction_master_b - - - java.lang.String - ]]> - false - true - false - true - CUSTOM_INSTRUCTION_SLAVES - custom_instruction_master_c - - - java.lang.String - ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 - false - true - false - true - DEVICE_FEATURES - java.lang.String EP4CE15E22C8 @@ -5660,33 +3717,14 @@ the requested settings for a module instance. --> true DEVICE_SPEEDGRADE - - java.lang.Integer - 1 - false - true - false - true - CLOCK_DOMAIN - clk - - - java.lang.Integer - 1 - false - true - false - true - RESET_DOMAIN - clk - java.lang.String - UNKNOWN + Cyclone IV E false true - true + false true + DEVICE_FAMILY boolean @@ -5732,38 +3770,22 @@ parameters are a RESULT of the module parameters. --> true true - - java.lang.Boolean - true - true - true - false - true - - - java.lang.Long - 27000000 - true - true - false - true - clock false - clk + clk_clk Input 1 clk - + java.lang.String - clk + false true true @@ -5771,7 +3793,7 @@ parameters are a RESULT of the module parameters. --> com.altera.sopcmodel.reset.Reset$Edges - DEASSERT + NONE false true true @@ -5796,19 +3818,13 @@ parameters are a RESULT of the module parameters. --> reset false - reset_n + clk_reset_reset Input 1 - reset_n - - - reset_req - Input - 1 - reset_req + reset - + @@ -5816,6 +3832,10 @@ parameters are a RESULT of the module parameters. --> debug.providesServices master + + debug.visible + true + com.altera.entityinterfaces.IConnectionPoint @@ -5826,7 +3846,7 @@ parameters are a RESULT of the module parameters. --> int - 1 + 0 false true false @@ -5858,7 +3878,7 @@ parameters are a RESULT of the module parameters. --> java.lang.String - reset + clk_reset false true true @@ -5874,7 +3894,7 @@ parameters are a RESULT of the module parameters. --> boolean - true + false false true true @@ -6018,7 +4038,7 @@ parameters are a RESULT of the module parameters. --> boolean - true + false false true false @@ -6075,606 +4095,79 @@ parameters are a RESULT of the module parameters. --> avalon true - d_address + master_address Output - 24 + 32 address - d_byteenable - Output - 4 - byteenable - - - d_read - Output - 1 - read - - - d_readdata + master_readdata Input 32 readdata - d_waitrequest - Input + master_read + Output 1 - waitrequest + read - d_write + master_write Output 1 write - d_writedata + master_writedata Output 32 writedata - debug_mem_slave_debugaccess_to_roms - Output - 1 - debugaccess - - - false - jtag_uart_0 - avalon_jtag_slave - jtag_uart_0.avalon_jtag_slave - 8524048 - 8 - - - false - i2c_opencores_0 - avalon_slave_0 - i2c_opencores_0.avalon_slave_0 - 8523872 - 32 - - - false - i2c_opencores_1 - avalon_slave_0 - i2c_opencores_1.avalon_slave_0 - 8523840 - 32 - - - false - epcq_controller_0 - avl_csr - epcq_controller_0.avl_csr - 8523808 - 32 - - - false - epcq_controller_0 - avl_mem - epcq_controller_0.avl_mem - 0 - 8388608 - - - false - nios2_qsys_0 - debug_mem_slave - nios2_qsys_0.debug_mem_slave - 8521728 - 2048 - - - false - onchip_memory2_0 - s1 - onchip_memory2_0.s1 - 8454144 - 40960 - - - false - pio_0 - s1 - pio_0.s1 - 8524032 - 16 - - - false - pio_1 - s1 - pio_1.s1 - 8524016 - 16 - - - false - pio_2 - s1 - pio_2.s1 - 8524000 - 16 - - - false - pio_3 - s1 - pio_3.s1 - 8523984 - 16 - - - false - pio_4 - s1 - pio_4.s1 - 8523968 - 16 - - - false - timer_0 - s1 - timer_0.s1 - 8523776 - 32 - - - false - pio_5 - s1 - pio_5.s1 - 8523952 - 16 - - - false - pio_6 - s1 - pio_6.s1 - 8523936 - 16 - - - false - pio_7 - s1 - pio_7.s1 - 8523920 - 16 - - - false - pio_8 - s1 - pio_8.s1 - 8523904 - 16 - - - - - - com.altera.entityinterfaces.IConnectionPoint - - false - true - false - true - - - int - 1 - false - true - false - true - - - com.altera.sopcmodel.avalon.EAddrBurstUnits - SYMBOLS - false - true - true - true - - - boolean - true - false - true - false - true - - - java.lang.String - clk - false - true - true - true - - - java.lang.String - reset - false - true - true - true - - - int - 8 - false - true - true - true - - - boolean - false - false - true - true - true - - - com.altera.sopcmodel.avalon.EAddrBurstUnits - WORDS - false - true - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - true - true - - - boolean - false - false - true - true - true - - - int - 0 - false - true - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - true - false - true - true - true - - - int - 32 - false - true - false - true - - - int - 0 - false - true - true - true - - - int - 0 - false - true - true - true - - - int - 0 - false - true - true - true - - - int - 1 - false - true - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - true - true - - - com.altera.sopcmodel.avalon.TimingUnits - Cycles - false - true - true - true - - - int - 0 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - avalon - true - - i_address - Output - 24 - address - - - i_read - Output - 1 - read - - - i_readdata - Input - 32 - readdata - - - i_waitrequest + master_waitrequest Input 1 waitrequest + + master_readdatavalid + Input + 1 + readdatavalid + + + master_byteenable + Output + 4 + byteenable + false - nios2_qsys_0 - debug_mem_slave - nios2_qsys_0.debug_mem_slave - 8521728 - 2048 + pulpino_0 + avalon_slave_debug + pulpino_0.avalon_slave_debug + 0 + 8192 false onchip_memory2_0 - s1 - onchip_memory2_0.s1 - 8454144 + s2 + onchip_memory2_0.s2 + 65536 40960 - + - - com.altera.entityinterfaces.IConnectionPoint - nios2_qsys_0.data_master - false - true - true - true - - java.lang.String - clk - false - true - false - true - - - java.lang.String - reset - false - true - false - true - - java.lang.String false true - false - true - - - com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme - INDIVIDUAL_REQUESTS - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - interrupt - true - - irq - Input - 32 - irq - - - false - i2c_opencores_0 - interrupt_sender - i2c_opencores_0.interrupt_sender - 3 - - - false - epcq_controller_0 - interrupt_sender - epcq_controller_0.interrupt_sender - 2 - - - false - i2c_opencores_1 - interrupt_sender - i2c_opencores_1.interrupt_sender - 4 - - - false - jtag_uart_0 - irq - jtag_uart_0.irq - 1 - - - false - timer_0 - irq - timer_0.irq - 0 - - - - - - java.lang.String - clk - false - true true true @@ -6696,7 +4189,7 @@ parameters are a RESULT of the module parameters. --> com.altera.sopcmodel.reset.Reset$Edges - DEASSERT + NONE false true true @@ -6721,869 +4214,12 @@ parameters are a RESULT of the module parameters. --> reset true - debug_reset_request + master_reset_reset Output 1 reset - - - - embeddedsw.configuration.hideDevice - 1 - - - qsys.ui.connect - instruction_master,data_master - - - com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment - DYNAMIC - false - true - false - true - - - int - 0 - false - true - false - true - - - java.math.BigInteger - 2048 - true - true - false - true - - - com.altera.sopcmodel.avalon.EAddrBurstUnits - WORDS - false - true - true - true - - - boolean - false - false - true - false - true - - - java.lang.String - clk - false - true - true - true - - - java.lang.String - reset - false - true - true - true - - - int - 8 - false - true - true - true - - - java.math.BigInteger - 0 - false - true - false - true - - - com.altera.entityinterfaces.IConnectionPoint - - false - true - false - true - - - boolean - false - false - true - true - true - - - com.altera.sopcmodel.avalon.EAddrBurstUnits - WORDS - false - true - true - true - - - boolean - false - false - true - false - true - - - java.math.BigInteger - 0 - false - true - true - true - - - int - 0 - false - false - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - true - true - - - int - 0 - false - false - true - true - - - int - 0 - false - false - true - true - - - int - 1 - false - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - true - true - - - int - 1 - false - true - false - true - - - int - 1 - false - false - true - true - - - boolean - true - false - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - false - true - true - - - com.altera.sopcmodel.avalon.TimingUnits - Cycles - false - false - true - true - - - boolean - false - false - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - false - true - - - int - 0 - false - true - false - true - - - int - 0 - false - false - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - avalon - false - - debug_mem_slave_address - Input - 9 - address - - - debug_mem_slave_byteenable - Input - 4 - byteenable - - - debug_mem_slave_debugaccess - Input - 1 - debugaccess - - - debug_mem_slave_read - Input - 1 - read - - - debug_mem_slave_readdata - Output - 32 - readdata - - - debug_mem_slave_waitrequest - Output - 1 - waitrequest - - - debug_mem_slave_write - Input - 1 - write - - - debug_mem_slave_writedata - Input - 32 - writedata - - - - - - java.lang.String - - true - true - false - true - - - int - 8 - false - true - false - true - - - int - 0 - false - false - true - true - - - boolean - false - false - true - false - true - - - int - 8 - false - true - false - true - - - int - 0 - true - true - false - true - - - boolean - true - false - true - false - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios_custom_instruction - true - - E_ci_multi_done - Input - 1 - done - - - E_ci_multi_clk_en - Output - 1 - clk_en - - - E_ci_multi_start - Output - 1 - start - - - E_ci_result - Input - 32 - result - - - D_ci_a - Output - 5 - a - - - D_ci_b - Output - 5 - b - - - D_ci_c - Output - 5 - c - - - D_ci_n - Output - 8 - n - - - D_ci_readra - Output - 1 - readra - - - D_ci_readrb - Output - 1 - readrb - - - D_ci_writerc - Output - 1 - writerc - - - E_ci_dataa - Output - 32 - dataa - - - E_ci_datab - Output - 32 - datab - - - E_ci_multi_clock - Output - 1 - clk - - - E_ci_multi_reset - Output - 1 - reset - - - E_ci_multi_reset_req - Output - 1 - reset_req - - - W_ci_estatus - Output - 1 - estatus - - - W_ci_ipending - Output - 32 - ipending - - - false - nios2_hw_crc32_0 - nios_custom_instruction_slave - nios2_hw_crc32_0.nios_custom_instruction_slave - 0 - nios2_hw_crc32_0 - - - false - nios_custom_instr_endianconverter_0 - s1 - nios_custom_instr_endianconverter_0.s1 - 8 - nios_custom_instr_endianconverter_0 - - - false - nios_custom_instr_bitswap_0 - s1 - nios_custom_instr_bitswap_0.s1 - 9 - nios_custom_instr_bitswap_0 - - - - - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - - - - java.lang.String - - true - true - false - true - - - int - 0 - true - true - false - true - - - int - 1 - false - false - true - true - - - com.altera.sopcmodel.custominstruction.CustomInstruction$ClockCycleType - COMBINATORIAL - true - true - true - true - - - int - 0 - true - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - false - true - - - int - 1 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios_custom_instruction - false - - dataa - Input - 32 - dataa - - - datab - Input - 32 - datab - - - result - Output - 32 - result - - - - - - - java.lang.String - CYCLONEIVE - false - true - false - true - DEVICE_FAMILY - - - java.lang.String - Cyclone IV E - false - true - false - true - DEVICE_FAMILY - - - boolean - false - false - true - true - true - - - - - java.lang.String - - true - true - false - true - - - int - 0 - true - true - false - true - - - int - 1 - false - false - true - true - - - com.altera.sopcmodel.custominstruction.CustomInstruction$ClockCycleType - COMBINATORIAL - true - true - true - true - - - int - 0 - true - true - false - true - - - boolean - false - false - true - false - true - - - int - 0 - false - true - false - true - - - int - 1 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios_custom_instruction - false - - dataa - Input - 32 - dataa - - - datab - Input - 32 - datab - - - result - Output - 32 - result - - embeddedsw.CMacro.DUAL_PORT - 0 + 1 embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE @@ -7638,7 +4274,7 @@ the requested settings for a module instance. --> embeddedsw.CMacro.SINGLE_CLOCK_OP - 0 + 1 embeddedsw.CMacro.SIZE_MULTIPLE @@ -7722,7 +4358,7 @@ the requested settings for a module instance. --> boolean - false + true false true true @@ -7732,7 +4368,7 @@ the requested settings for a module instance. --> boolean false false - false + true true true @@ -7788,7 +4424,7 @@ the requested settings for a module instance. --> java.lang.String DONT_CARE false - false + true true true @@ -7810,15 +4446,15 @@ the requested settings for a module instance. --> boolean - false + true false - false + true true true boolean - false + true true true false @@ -7836,7 +4472,7 @@ the requested settings for a module instance. --> int 1 false - false + true true true @@ -7979,51 +4615,6 @@ the requested settings for a module instance. --> true true - - - - boolean - false - false - true - false - true - - - java.lang.String - - false - true - false - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - clock - false - - clk - Input - 1 - clk - - int - 0 + 1 false true false @@ -8401,6 +4992,428 @@ parameters are a RESULT of the module parameters. --> byteenable + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 1 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 1 + false + true + false + true + + + java.math.BigInteger + 40960 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk1 + false + true + true + true + + + java.lang.String + reset1 + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 40960 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address2 + Input + 14 + address + + + chipselect2 + Input + 1 + chipselect + + + clken2 + Input + 1 + clken + + + write2 + Input + 1 + write + + + readdata2 + Output + 32 + readdata + + + writedata2 + Input + 32 + writedata + + + byteenable2 + Input + 4 + byteenable + + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + int + 32 + false + true + true + true + + + int + 32 + false + true + true + true + + + int + 10 + false + true + true + true + + + int + 10 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + java.math.BigInteger + 31 + false + true + false + true + INTERRUPTS_USED + interrupt_receiver + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.String + clk_sink + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + rst_n + Input + 1 + reset_n + + + + + + java.lang.String + clk_sink + false + true + true + true + + + java.lang.String + + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + testmode_i + Input + 1 + testmode_i + + + fetch_enable_i + Input + 1 + fetch_enable_i + + + clock_gating_i + Input + 1 + clock_gating_i + + + boot_addr_i + Input + 32 + boot_addr_i + + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + java.lang.String + clk_sink + false + true + false + true + + + java.lang.String + reset_sink + false + true + false + true + + + java.lang.String + + false + true + false + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + INDIVIDUAL_REQUESTS + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + true + + irq_i + Input + 32 + irq + + + false + epcq_controller_0 + interrupt_sender + epcq_controller_0.interrupt_sender + 2 + + + false + i2c_opencores_0 + interrupt_sender + i2c_opencores_0.interrupt_sender + 3 + + + false + i2c_opencores_1 + interrupt_sender + i2c_opencores_1.interrupt_sender + 4 + + + false + timer_0 + irq + timer_0.irq + 0 + + + false + jtag_uart_0 + irq + jtag_uart_0.irq + 1 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_sink + false + true + true + true + + + java.lang.String + reset_sink + false + true + true + true + + + int + 8 + false + true + true + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + instr_addr + Output + 32 + address + + + instr_rdata + Input + 32 + readdata + + + instr_read + Output + 1 + read + + + instr_rvalid + Input + 1 + readdatavalid + + + instr_busy + Input + 1 + waitrequest + + + false + onchip_memory2_0 + s1 + onchip_memory2_0.s1 + 65536 + 40960 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_sink + false + true + true + true + + + java.lang.String + reset_sink + false + true + true + true + + + int + 8 + false + true + true + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + lsu_addr + Output + 32 + address + + + lsu_rdata + Input + 32 + readdata + + + lsu_read + Output + 1 + read + + + lsu_rvalid + Input + 1 + readdatavalid + + + lsu_busy + Input + 1 + waitrequest + + + lsu_write + Output + 1 + write + + + lsu_be + Output + 4 + byteenable + + + lsu_wdata + Output + 32 + writedata + + + lsu_resp + Input + 2 + response + + + lsu_wrespvalid + Input + 1 + writeresponsevalid + + + false + jtag_uart_0 + avalon_jtag_slave + jtag_uart_0.avalon_jtag_slave + 131104 + 8 + + + false + i2c_opencores_0 + avalon_slave_0 + i2c_opencores_0.avalon_slave_0 + 135232 + 32 + + + false + i2c_opencores_1 + avalon_slave_0 + i2c_opencores_1.avalon_slave_0 + 135200 + 32 + + + false + epcq_controller_0 + avl_csr + epcq_controller_0.avl_csr + 131328 + 32 + + + false + epcq_controller_0 + avl_mem + epcq_controller_0.avl_mem + 8388608 + 8388608 + + + false + timer_0 + s1 + timer_0.s1 + 131072 + 32 + + + false + pio_0 + s1 + pio_0.s1 + 135392 + 16 + + + false + pio_1 + s1 + pio_1.s1 + 135376 + 16 + + + false + pio_2 + s1 + pio_2.s1 + 135360 + 16 + + + false + pio_3 + s1 + pio_3.s1 + 135344 + 16 + + + false + pio_4 + s1 + pio_4.s1 + 135328 + 16 + + + false + pio_5 + s1 + pio_5.s1 + 135312 + 16 + + + false + pio_6 + s1 + pio_6.s1 + 135296 + 16 + + + false + pio_7 + s1 + pio_7.s1 + 135280 + 16 + + + false + pio_8 + s1 + pio_8.s1 + 135264 + 16 + + + false + onchip_memory2_0 + s2 + onchip_memory2_0.s2 + 65536 + 40960 + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 8192 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_sink + false + true + true + true + + + java.lang.String + reset_sink + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 8192 + false + true + true + true + + + int + 0 + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 1 + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + false + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + false + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + debug_addr + Input + 15 + address + + + debug_rdata + Output + 32 + readdata + + + debug_read + Input + 1 + read + + + debug_rvalid + Output + 1 + readdatavalid + + + debug_busy + Output + 1 + waitrequest + + + debug_write + Input + 1 + write + + + debug_wdata + Input + 32 + writedata + + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00010000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_instr + onchip_memory2_0 + s1 + + int @@ -16145,7 +14697,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 0x00821110 + 0x00020020 false true true @@ -16175,16 +14727,16 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - data_master + pulpino_0 + avalon_master_lsu jtag_uart_0 avalon_jtag_slave int @@ -16196,7 +14748,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 0x00821060 + 0x00021040 false true true @@ -16226,16 +14778,16 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - data_master + pulpino_0 + avalon_master_lsu i2c_opencores_0 avalon_slave_0 int @@ -16247,7 +14799,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 0x00821040 + 0x00021020 false true true @@ -16277,16 +14829,16 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - data_master + pulpino_0 + avalon_master_lsu i2c_opencores_1 avalon_slave_0 int @@ -16298,7 +14850,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 0x00821020 + 0x00020100 false true true @@ -16328,16 +14880,16 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - data_master + pulpino_0 + avalon_master_lsu epcq_controller_0 avl_csr int @@ -16347,6 +14899,618 @@ parameters are a RESULT of the module parameters. --> true true + + java.math.BigInteger + 0x00800000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + epcq_controller_0 + avl_mem + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00020000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + timer_0 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x000210e0 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_0 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x000210d0 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_1 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x000210c0 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_2 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x000210b0 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_3 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x000210a0 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_4 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021090 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_5 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021080 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_6 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021070 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_7 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021060 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + pio_8 + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00010000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + avalon_master_lsu + onchip_memory2_0 + s2 + + + + int + 1 + false + true + true + true + java.math.BigInteger 0x0000 @@ -16379,17 +15543,17 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - data_master - epcq_controller_0 - avl_mem + master_0 + master + pulpino_0 + avalon_slave_debug + start="master_0.master" + end="onchip_memory2_0.s2"> int 1 @@ -16400,7 +15564,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 0x00820800 + 0x00010000 false true true @@ -16430,700 +15594,10 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - data_master - nios2_qsys_0 - debug_mem_slave - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00810000 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master + master_0 + master onchip_memory2_0 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00821100 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_0 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x008210f0 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_1 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x008210e0 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_2 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x008210d0 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_3 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x008210c0 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_4 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00821000 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - timer_0 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x008210b0 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_5 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x008210a0 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_6 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00821090 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_7 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00821080 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - data_master - pio_8 - s1 - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00820800 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - instruction_master - nios2_qsys_0 - debug_mem_slave - - - - int - 1 - false - true - true - true - - - java.math.BigInteger - 0x00810000 - false - true - true - true - - - boolean - false - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - instruction_master - onchip_memory2_0 - s1 - - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - clk_27 - clk - nios2_qsys_0 - clk + s2 pio_8 clk + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_27 + clk + master_0 + clk + onchip_memory2_0 clk1 + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_27 + clk + pulpino_0 + clk_sink + clock_sink - - int - 3 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - irq - i2c_opencores_0 - interrupt_sender - - int @@ -17595,16 +16088,51 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - irq + pulpino_0 + interrupt_receiver epcq_controller_0 interrupt_sender + + int + 3 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + pulpino_0 + interrupt_receiver + i2c_opencores_0 + interrupt_sender + + int @@ -17630,51 +16158,16 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - irq + pulpino_0 + interrupt_receiver i2c_opencores_1 interrupt_sender - - int - 1 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - irq - jtag_uart_0 - irq - - int @@ -17700,54 +16193,22 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - irq + pulpino_0 + interrupt_receiver timer_0 irq - - java.lang.String - nios2_hw_crc32_0 - false - true - true - true - - - java.lang.String - - true - true - true - true - - + start="pulpino_0.interrupt_receiver" + end="jtag_uart_0.irq"> + int 1 false true - false - true - - - long - 0 - false - true - true - true - - - int - -1 - true - true true true @@ -17767,57 +16228,17 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - custom_instruction_master - nios2_hw_crc32_0 - nios_custom_instruction_slave + pulpino_0 + interrupt_receiver + jtag_uart_0 + irq - - java.lang.String - nios_custom_instr_endianconverter_0 - false - true - true - true - - - java.lang.String - - true - true - true - true - - - int - 1 - false - true - false - true - - - long - 8 - false - true - true - true - - - int - -1 - true - true - true - true - + start="clk_27.clk_reset" + end="master_0.clk_reset"> java.lang.String UNKNOWN @@ -17834,77 +16255,10 @@ parameters are a RESULT of the module parameters. --> true true - nios2_qsys_0 - custom_instruction_master - nios_custom_instr_endianconverter_0 - s1 - - - - java.lang.String - nios_custom_instr_bitswap_0 - false - true - true - true - - - java.lang.String - - true - true - true - true - - - int - 1 - false - true - false - true - - - long - 9 - false - true - true - true - - - int - -1 - true - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - nios2_qsys_0 - custom_instruction_master - nios_custom_instr_bitswap_0 - s1 + clk_27 + clk_reset + master_0 + clk_reset i2c_opencores_1 clock_reset - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false - false - true - true - true - - clk_27 - clk_reset - nios2_qsys_0 - reset - onchip_memory2_0 reset1 + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_27 + clk_reset + pulpino_0 + reset_sink + 1 clock_source @@ -18387,7 +16741,7 @@ parameters are a RESULT of the module parameters. --> 17.1 - 16 + 17 clock_sink com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint @@ -18395,7 +16749,7 @@ parameters are a RESULT of the module parameters. --> 17.1 - 16 + 17 reset_sink com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint @@ -18403,7 +16757,7 @@ parameters are a RESULT of the module parameters. --> 17.1 - 17 + 18 avalon_slave com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint @@ -18427,7 +16781,7 @@ parameters are a RESULT of the module parameters. --> 17.1 - 11 + 12 conduit_end com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint @@ -18444,44 +16798,20 @@ parameters are a RESULT of the module parameters. --> 1 - nios2_hw_crc32 + altera_jtag_avalon_master com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - nios2_hw_crc32 + JTAG to Avalon Master Bridge 17.1 3 - nios_custom_instruction_slave - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Custom Instruction Slave - 17.1 - - - 1 - altera_nios2_gen2 - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Nios II Processor - 17.1 - - - 2 avalon_master com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Memory Mapped Master 17.1 - - 1 - interrupt_receiver - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Interrupt Receiver - 17.1 - 1 reset_source @@ -18490,30 +16820,6 @@ parameters are a RESULT of the module parameters. --> Reset Output 17.1 - - 1 - nios_custom_instruction_master - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Custom Instruction Master - 17.1 - - - 1 - altera_nios_custom_instr_bitswap - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Bitswap - 17.1 - - - 1 - altera_nios_custom_instr_endianconverter - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Endian Converter - 17.1 - 1 altera_avalon_onchip_memory2 @@ -18530,6 +16836,22 @@ parameters are a RESULT of the module parameters. --> PIO (Parallel I/O) 17.1 + + 1 + pulpino + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + pulpino + 1.0 + + + 1 + interrupt_receiver + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Receiver + 17.1 + 1 altera_avalon_timer @@ -18547,7 +16869,7 @@ parameters are a RESULT of the module parameters. --> 17.1 - 16 + 17 clock com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection @@ -18563,15 +16885,7 @@ parameters are a RESULT of the module parameters. --> 17.1 - 3 - nios_custom_instruction - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IConnection - Nios II Custom Instruction Connection - 17.1 - - - 16 + 17 reset com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection diff --git a/tools/bin2hex.c b/tools/bin2hex.c new file mode 100644 index 0000000..df206fb --- /dev/null +++ b/tools/bin2hex.c @@ -0,0 +1,53 @@ +#include +#include +#include +#include +#include +#include +#include + +#define MEMBLK 1024 + +int main(int argc, char **argv) +{ + unsigned char block[4]; + unsigned int csum; + + int fd_i; + FILE *fd_o; + struct stat fileinfo; + + unsigned int i; + + if (argc != 3) { + printf("usage: %s binfile hexfile\n", argv[0]); + return -1; + } + + if ((fd_i = open(argv[1], O_RDONLY)) == -1 || fstat(fd_i, &fileinfo) == -1) { + printf("Couldn't open file\n"); + return -1; + } + + printf("size: %u bytes\n", fileinfo.st_size); + + if ((fd_o = fopen(argv[2], "w")) == NULL) { + printf("invalid outfile\n"); + return -1; + } + + for (i=0; i>8)+((i/4)&0xff)+block[3]+block[2]+block[1]+block[0]; + csum &= 0xff; + csum = (~csum+1)&0xff; + fprintf(fd_o, ":04%.4X00%.2X%.2X%.2X%.2X%.2X\n", i/4, block[3],block[2],block[1],block[0],csum); + } + + fprintf(fd_o, ":00000001FF\n"); + + fclose(fd_o); + close(fd_i); + + return 0; +}