mirror of
https://github.com/marqs85/ossc.git
synced 2024-06-04 06:29:28 +00:00
add missing IP files
This commit is contained in:
parent
0b51fd7758
commit
ba8ad6ce4c
1
ossc.qsf
1
ossc.qsf
|
@ -243,6 +243,7 @@ set_global_assignment -name VERILOG_FILE rtl/lat_tester.v
|
||||||
set_global_assignment -name QIP_FILE rtl/linebuf.qip
|
set_global_assignment -name QIP_FILE rtl/linebuf.qip
|
||||||
set_global_assignment -name QIP_FILE rtl/pll_2x.qip
|
set_global_assignment -name QIP_FILE rtl/pll_2x.qip
|
||||||
set_global_assignment -name QIP_FILE rtl/pll_3x.qip
|
set_global_assignment -name QIP_FILE rtl/pll_3x.qip
|
||||||
|
set_global_assignment -name QIP_FILE rtl/lpm_mult_4_sl.qip
|
||||||
set_global_assignment -name CDF_FILE output_files/Chain1.cdf
|
set_global_assignment -name CDF_FILE output_files/Chain1.cdf
|
||||||
set_global_assignment -name SIGNALTAP_FILE output_files/ossc_la.stp
|
set_global_assignment -name SIGNALTAP_FILE output_files/ossc_la.stp
|
||||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
5
rtl/lpm_mult_4_sl.qip
Normal file
5
rtl/lpm_mult_4_sl.qip
Normal file
|
@ -0,0 +1,5 @@
|
||||||
|
set_global_assignment -name IP_TOOL_NAME "LPM_MULT"
|
||||||
|
set_global_assignment -name IP_TOOL_VERSION "17.1"
|
||||||
|
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
|
||||||
|
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "lpm_mult_4_sl.v"]
|
||||||
|
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mult_4_sl_bb.v"]
|
116
rtl/lpm_mult_4_sl.v
Normal file
116
rtl/lpm_mult_4_sl.v
Normal file
|
@ -0,0 +1,116 @@
|
||||||
|
// megafunction wizard: %LPM_MULT%
|
||||||
|
// GENERATION: STANDARD
|
||||||
|
// VERSION: WM1.0
|
||||||
|
// MODULE: lpm_mult
|
||||||
|
|
||||||
|
// ============================================================
|
||||||
|
// File Name: lpm_mult_4_sl.v
|
||||||
|
// Megafunction Name(s):
|
||||||
|
// lpm_mult
|
||||||
|
//
|
||||||
|
// Simulation Library Files(s):
|
||||||
|
// lpm
|
||||||
|
// ============================================================
|
||||||
|
// ************************************************************
|
||||||
|
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||||
|
//
|
||||||
|
// 17.1.1 Internal Build 593 12/11/2017 SJ Lite Edition
|
||||||
|
// ************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
//Copyright (C) 2017 Intel Corporation. All rights reserved.
|
||||||
|
//Your use of Intel Corporation's design tools, logic functions
|
||||||
|
//and other software and tools, and its AMPP partner logic
|
||||||
|
//functions, and any output files from any of the foregoing
|
||||||
|
//(including device programming or simulation files), and any
|
||||||
|
//associated documentation or information are expressly subject
|
||||||
|
//to the terms and conditions of the Intel Program License
|
||||||
|
//Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||||
|
//the Intel FPGA IP License Agreement, or other applicable license
|
||||||
|
//agreement, including, without limitation, that your use is for
|
||||||
|
//the sole purpose of programming logic devices manufactured by
|
||||||
|
//Intel and sold by Intel or its authorized distributors. Please
|
||||||
|
//refer to the applicable agreement for further details.
|
||||||
|
|
||||||
|
|
||||||
|
// synopsys translate_off
|
||||||
|
`timescale 1 ps / 1 ps
|
||||||
|
// synopsys translate_on
|
||||||
|
module lpm_mult_4_sl (
|
||||||
|
clock,
|
||||||
|
dataa,
|
||||||
|
datab,
|
||||||
|
result);
|
||||||
|
|
||||||
|
input clock;
|
||||||
|
input [7:0] dataa;
|
||||||
|
input [3:0] datab;
|
||||||
|
output [7:0] result;
|
||||||
|
|
||||||
|
wire [7:0] sub_wire0;
|
||||||
|
wire [7:0] result = sub_wire0[7:0];
|
||||||
|
|
||||||
|
lpm_mult lpm_mult_component (
|
||||||
|
.clock (clock),
|
||||||
|
.dataa (dataa),
|
||||||
|
.datab (datab),
|
||||||
|
.result (sub_wire0),
|
||||||
|
.aclr (1'b0),
|
||||||
|
.clken (1'b1),
|
||||||
|
.sclr (1'b0),
|
||||||
|
.sum (1'b0));
|
||||||
|
defparam
|
||||||
|
lpm_mult_component.lpm_hint = "MAXIMIZE_SPEED=9",
|
||||||
|
lpm_mult_component.lpm_pipeline = 1,
|
||||||
|
lpm_mult_component.lpm_representation = "UNSIGNED",
|
||||||
|
lpm_mult_component.lpm_type = "LPM_MULT",
|
||||||
|
lpm_mult_component.lpm_widtha = 8,
|
||||||
|
lpm_mult_component.lpm_widthb = 4,
|
||||||
|
lpm_mult_component.lpm_widthp = 8;
|
||||||
|
|
||||||
|
|
||||||
|
endmodule
|
||||||
|
|
||||||
|
// ============================================================
|
||||||
|
// CNX file retrieval info
|
||||||
|
// ============================================================
|
||||||
|
// Retrieval info: PRIVATE: AutoSizeResult NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: B_isConstant NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: ConstantB NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
|
||||||
|
// Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "1"
|
||||||
|
// Retrieval info: PRIVATE: Latency NUMERIC "1"
|
||||||
|
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||||
|
// Retrieval info: PRIVATE: SignedMult NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: USE_MULT NUMERIC "1"
|
||||||
|
// Retrieval info: PRIVATE: ValidConstant NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: WidthA NUMERIC "8"
|
||||||
|
// Retrieval info: PRIVATE: WidthB NUMERIC "4"
|
||||||
|
// Retrieval info: PRIVATE: WidthP NUMERIC "8"
|
||||||
|
// Retrieval info: PRIVATE: aclr NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: clken NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: new_diagram STRING "1"
|
||||||
|
// Retrieval info: PRIVATE: optimize NUMERIC "1"
|
||||||
|
// Retrieval info: LIBRARY: lpm lpm.lpm_components.all
|
||||||
|
// Retrieval info: CONSTANT: LPM_HINT STRING "MAXIMIZE_SPEED=9"
|
||||||
|
// Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1"
|
||||||
|
// Retrieval info: CONSTANT: LPM_REPRESENTATION STRING "UNSIGNED"
|
||||||
|
// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_MULT"
|
||||||
|
// Retrieval info: CONSTANT: LPM_WIDTHA NUMERIC "8"
|
||||||
|
// Retrieval info: CONSTANT: LPM_WIDTHB NUMERIC "4"
|
||||||
|
// Retrieval info: CONSTANT: LPM_WIDTHP NUMERIC "8"
|
||||||
|
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock"
|
||||||
|
// Retrieval info: USED_PORT: dataa 0 0 8 0 INPUT NODEFVAL "dataa[7..0]"
|
||||||
|
// Retrieval info: USED_PORT: datab 0 0 4 0 INPUT NODEFVAL "datab[3..0]"
|
||||||
|
// Retrieval info: USED_PORT: result 0 0 8 0 OUTPUT NODEFVAL "result[7..0]"
|
||||||
|
// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
|
||||||
|
// Retrieval info: CONNECT: @dataa 0 0 8 0 dataa 0 0 8 0
|
||||||
|
// Retrieval info: CONNECT: @datab 0 0 4 0 datab 0 0 4 0
|
||||||
|
// Retrieval info: CONNECT: result 0 0 8 0 @result 0 0 8 0
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.v TRUE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.inc FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.cmp FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.bsf FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl_inst.v FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl_bb.v TRUE
|
||||||
|
// Retrieval info: LIB_FILE: lpm
|
89
rtl/lpm_mult_4_sl_bb.v
Normal file
89
rtl/lpm_mult_4_sl_bb.v
Normal file
|
@ -0,0 +1,89 @@
|
||||||
|
// megafunction wizard: %LPM_MULT%VBB%
|
||||||
|
// GENERATION: STANDARD
|
||||||
|
// VERSION: WM1.0
|
||||||
|
// MODULE: lpm_mult
|
||||||
|
|
||||||
|
// ============================================================
|
||||||
|
// File Name: lpm_mult_4_sl.v
|
||||||
|
// Megafunction Name(s):
|
||||||
|
// lpm_mult
|
||||||
|
//
|
||||||
|
// Simulation Library Files(s):
|
||||||
|
// lpm
|
||||||
|
// ============================================================
|
||||||
|
// ************************************************************
|
||||||
|
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||||
|
//
|
||||||
|
// 17.1.1 Internal Build 593 12/11/2017 SJ Lite Edition
|
||||||
|
// ************************************************************
|
||||||
|
|
||||||
|
//Copyright (C) 2017 Intel Corporation. All rights reserved.
|
||||||
|
//Your use of Intel Corporation's design tools, logic functions
|
||||||
|
//and other software and tools, and its AMPP partner logic
|
||||||
|
//functions, and any output files from any of the foregoing
|
||||||
|
//(including device programming or simulation files), and any
|
||||||
|
//associated documentation or information are expressly subject
|
||||||
|
//to the terms and conditions of the Intel Program License
|
||||||
|
//Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||||
|
//the Intel FPGA IP License Agreement, or other applicable license
|
||||||
|
//agreement, including, without limitation, that your use is for
|
||||||
|
//the sole purpose of programming logic devices manufactured by
|
||||||
|
//Intel and sold by Intel or its authorized distributors. Please
|
||||||
|
//refer to the applicable agreement for further details.
|
||||||
|
|
||||||
|
module lpm_mult_4_sl (
|
||||||
|
clock,
|
||||||
|
dataa,
|
||||||
|
datab,
|
||||||
|
result);
|
||||||
|
|
||||||
|
input clock;
|
||||||
|
input [7:0] dataa;
|
||||||
|
input [3:0] datab;
|
||||||
|
output [7:0] result;
|
||||||
|
|
||||||
|
endmodule
|
||||||
|
|
||||||
|
// ============================================================
|
||||||
|
// CNX file retrieval info
|
||||||
|
// ============================================================
|
||||||
|
// Retrieval info: PRIVATE: AutoSizeResult NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: B_isConstant NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: ConstantB NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
|
||||||
|
// Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "1"
|
||||||
|
// Retrieval info: PRIVATE: Latency NUMERIC "1"
|
||||||
|
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||||
|
// Retrieval info: PRIVATE: SignedMult NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: USE_MULT NUMERIC "1"
|
||||||
|
// Retrieval info: PRIVATE: ValidConstant NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: WidthA NUMERIC "8"
|
||||||
|
// Retrieval info: PRIVATE: WidthB NUMERIC "4"
|
||||||
|
// Retrieval info: PRIVATE: WidthP NUMERIC "8"
|
||||||
|
// Retrieval info: PRIVATE: aclr NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: clken NUMERIC "0"
|
||||||
|
// Retrieval info: PRIVATE: new_diagram STRING "1"
|
||||||
|
// Retrieval info: PRIVATE: optimize NUMERIC "1"
|
||||||
|
// Retrieval info: LIBRARY: lpm lpm.lpm_components.all
|
||||||
|
// Retrieval info: CONSTANT: LPM_HINT STRING "MAXIMIZE_SPEED=9"
|
||||||
|
// Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1"
|
||||||
|
// Retrieval info: CONSTANT: LPM_REPRESENTATION STRING "UNSIGNED"
|
||||||
|
// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_MULT"
|
||||||
|
// Retrieval info: CONSTANT: LPM_WIDTHA NUMERIC "8"
|
||||||
|
// Retrieval info: CONSTANT: LPM_WIDTHB NUMERIC "4"
|
||||||
|
// Retrieval info: CONSTANT: LPM_WIDTHP NUMERIC "8"
|
||||||
|
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock"
|
||||||
|
// Retrieval info: USED_PORT: dataa 0 0 8 0 INPUT NODEFVAL "dataa[7..0]"
|
||||||
|
// Retrieval info: USED_PORT: datab 0 0 4 0 INPUT NODEFVAL "datab[3..0]"
|
||||||
|
// Retrieval info: USED_PORT: result 0 0 8 0 OUTPUT NODEFVAL "result[7..0]"
|
||||||
|
// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
|
||||||
|
// Retrieval info: CONNECT: @dataa 0 0 8 0 dataa 0 0 8 0
|
||||||
|
// Retrieval info: CONNECT: @datab 0 0 4 0 datab 0 0 4 0
|
||||||
|
// Retrieval info: CONNECT: result 0 0 8 0 @result 0 0 8 0
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.v TRUE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.inc FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.cmp FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl.bsf FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl_inst.v FALSE
|
||||||
|
// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_mult_4_sl_bb.v TRUE
|
||||||
|
// Retrieval info: LIB_FILE: lpm
|
Loading…
Reference in New Issue
Block a user