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BSP and sw modifications

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This commit is contained in:
marqs
2018-09-25 22:34:52 +03:00
parent 530df663b6
commit e1d8446752
13 changed files with 60 additions and 132 deletions
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software/sys_controller_bsp/HAL/inc/io.h
+8 -8
View File
@@ -51,18 +51,18 @@ extern "C"
((void *)(((alt_u8*)BASE) + (OFFSET)))
#define IORD_32DIRECT(BASE, OFFSET) \
__builtin_ldwio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)))
(*(volatile alt_u32*)(__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET))))
#define IORD_16DIRECT(BASE, OFFSET) \
__builtin_ldhuio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)))
(*(volatile alt_u16*)(__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET))))
#define IORD_8DIRECT(BASE, OFFSET) \
__builtin_ldbuio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)))
(*(volatile alt_u8*)(__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET))))
#define IOWR_32DIRECT(BASE, OFFSET, DATA) \
__builtin_stwio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)), (DATA))
(*(volatile alt_u32*)(__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET))) = (DATA))
#define IOWR_16DIRECT(BASE, OFFSET, DATA) \
__builtin_sthio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)), (DATA))
(*(volatile alt_u16*)(__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET))) = (DATA))
#define IOWR_8DIRECT(BASE, OFFSET, DATA) \
__builtin_stbio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)), (DATA))
(*(volatile alt_u8*)(__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET))) = (DATA))
/* Native bus access functions */
@@ -70,9 +70,9 @@ extern "C"
((void *)(((alt_u8*)BASE) + ((REGNUM) * (SYSTEM_BUS_WIDTH/8))))
#define IORD(BASE, REGNUM) \
__builtin_ldwio (__IO_CALC_ADDRESS_NATIVE ((BASE), (REGNUM)))
(*(volatile alt_u32*)(__IO_CALC_ADDRESS_NATIVE ((BASE), (REGNUM))))
#define IOWR(BASE, REGNUM, DATA) \
__builtin_stwio (__IO_CALC_ADDRESS_NATIVE ((BASE), (REGNUM)), (DATA))
(*(volatile alt_u32*)(__IO_CALC_ADDRESS_NATIVE ((BASE), (REGNUM))) = (DATA))
#ifdef __cplusplus
}
software/sys_controller_bsp/Makefile
+6 -84
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@@ -112,10 +112,10 @@ SOPC_FILE := ../../sys.sopcinfo
#-------------------------------------------------------------------------------
# Archiver command. Creates library files.
AR = nios2-elf-ar
AR = riscv64-unknown-elf-ar
# Assembler command. Note that CC is used for .S files.
AS = nios2-elf-gcc
AS = riscv64-unknown-elf-gcc
# Custom flags only passed to the archiver. This content of this variable is
# directly passed to the archiver rather than the more standard "ARFLAGS". The
@@ -139,10 +139,10 @@ BSP_CFLAGS_OPTIMIZATION = -Os
BSP_CFLAGS_WARNINGS = -Wall
# C compiler command.
CC = nios2-elf-gcc -xc
CC = riscv64-unknown-elf-gcc -xc
# C++ compiler command.
CXX = nios2-elf-gcc -xc++
CXX = riscv64-unknown-elf-gcc -xc++
# Command used to remove files during 'clean' target.
RM = rm -f
@@ -222,7 +222,6 @@ altera_avalon_timer_driver_SRCS_ROOT := drivers
# altera_avalon_timer_driver sources
altera_avalon_timer_driver_C_LIB_SRCS := \
$(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_sc.c \
$(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_ts.c \
$(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_vars.c
@@ -238,96 +237,25 @@ altera_nios2_gen2_hal_driver_SRCS_ROOT := HAL
# altera_nios2_gen2_hal_driver sources
altera_nios2_gen2_hal_driver_C_LIB_SRCS := \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/altera_nios2_gen2_irq.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_usleep.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_busy_sleep.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_irq_vars.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_icache_flush.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_icache_flush_all.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_dcache_flush.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_dcache_flush_all.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_dcache_flush_no_writeback.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_ecc_fatal_exception.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_instruction_exception_entry.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_irq_register.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_iic.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_remap_cached.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_remap_uncached.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_uncached_free.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_uncached_malloc.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_do_ctors.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_do_dtors.c \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_gmon.c
altera_nios2_gen2_hal_driver_ASM_LIB_SRCS := \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_ecc_fatal_entry.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_exception_entry.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_exception_trap.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_exception_muldiv.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_irq_entry.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_software_exception.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_mcount.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_log_macro.S \
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/crt0.S
$(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_do_dtors.c
# hal sources root
hal_SRCS_ROOT := HAL
# hal sources
hal_C_LIB_SRCS := \
$(hal_SRCS_ROOT)/src/alt_alarm_start.c \
$(hal_SRCS_ROOT)/src/alt_close.c \
$(hal_SRCS_ROOT)/src/alt_dev.c \
$(hal_SRCS_ROOT)/src/alt_dev_llist_insert.c \
$(hal_SRCS_ROOT)/src/alt_dma_rxchan_open.c \
$(hal_SRCS_ROOT)/src/alt_dma_txchan_open.c \
$(hal_SRCS_ROOT)/src/alt_environ.c \
$(hal_SRCS_ROOT)/src/alt_env_lock.c \
$(hal_SRCS_ROOT)/src/alt_errno.c \
$(hal_SRCS_ROOT)/src/alt_execve.c \
$(hal_SRCS_ROOT)/src/alt_exit.c \
$(hal_SRCS_ROOT)/src/alt_fcntl.c \
$(hal_SRCS_ROOT)/src/alt_fd_lock.c \
$(hal_SRCS_ROOT)/src/alt_fd_unlock.c \
$(hal_SRCS_ROOT)/src/alt_find_dev.c \
$(hal_SRCS_ROOT)/src/alt_find_file.c \
$(hal_SRCS_ROOT)/src/alt_flash_dev.c \
$(hal_SRCS_ROOT)/src/alt_fork.c \
$(hal_SRCS_ROOT)/src/alt_fs_reg.c \
$(hal_SRCS_ROOT)/src/alt_fstat.c \
$(hal_SRCS_ROOT)/src/alt_get_fd.c \
$(hal_SRCS_ROOT)/src/alt_getchar.c \
$(hal_SRCS_ROOT)/src/alt_getpid.c \
$(hal_SRCS_ROOT)/src/alt_gettod.c \
$(hal_SRCS_ROOT)/src/alt_iic_isr_register.c \
$(hal_SRCS_ROOT)/src/alt_instruction_exception_register.c \
$(hal_SRCS_ROOT)/src/alt_ioctl.c \
$(hal_SRCS_ROOT)/src/alt_io_redirect.c \
$(hal_SRCS_ROOT)/src/alt_irq_handler.c \
$(hal_SRCS_ROOT)/src/alt_isatty.c \
$(hal_SRCS_ROOT)/src/alt_kill.c \
$(hal_SRCS_ROOT)/src/alt_link.c \
$(hal_SRCS_ROOT)/src/alt_load.c \
$(hal_SRCS_ROOT)/src/alt_log_printf.c \
$(hal_SRCS_ROOT)/src/alt_lseek.c \
$(hal_SRCS_ROOT)/src/alt_main.c \
$(hal_SRCS_ROOT)/src/alt_malloc_lock.c \
$(hal_SRCS_ROOT)/src/alt_open.c \
$(hal_SRCS_ROOT)/src/alt_printf.c \
$(hal_SRCS_ROOT)/src/alt_putchar.c \
$(hal_SRCS_ROOT)/src/alt_putcharbuf.c \
$(hal_SRCS_ROOT)/src/alt_putstr.c \
$(hal_SRCS_ROOT)/src/alt_read.c \
$(hal_SRCS_ROOT)/src/alt_release_fd.c \
$(hal_SRCS_ROOT)/src/alt_rename.c \
$(hal_SRCS_ROOT)/src/alt_sbrk.c \
$(hal_SRCS_ROOT)/src/alt_settod.c \
$(hal_SRCS_ROOT)/src/alt_stat.c \
$(hal_SRCS_ROOT)/src/alt_tick.c \
$(hal_SRCS_ROOT)/src/alt_times.c \
$(hal_SRCS_ROOT)/src/alt_unlink.c \
$(hal_SRCS_ROOT)/src/alt_wait.c \
$(hal_SRCS_ROOT)/src/alt_write.c
# i2c_opencores_driver sources root
i2c_opencores_driver_SRCS_ROOT := drivers
@@ -339,11 +267,6 @@ i2c_opencores_driver_C_LIB_SRCS := \
# nios2_hw_crc32_driver sources root
nios2_hw_crc32_driver_SRCS_ROOT := drivers
# nios2_hw_crc32_driver sources
nios2_hw_crc32_driver_C_LIB_SRCS := \
$(nios2_hw_crc32_driver_SRCS_ROOT)/src/ci_crc.c \
$(nios2_hw_crc32_driver_SRCS_ROOT)/src/crc.c
# Assemble all component C source files
COMPONENT_C_LIB_SRCS += \
@@ -444,8 +367,7 @@ GENERATED_H_FILES := $(ABS_BSP_ROOT)/system.h
GENERATED_LINKER_SCRIPT := $(ABS_BSP_ROOT)/linker.x
GENERATED_FILES += $(GENERATED_H_FILES) \
$(GENERATED_LINKER_SCRIPT)
GENERATED_FILES += $(GENERATED_H_FILES)
#------------------------------------------------------------------------------
software/sys_controller_bsp/alt_sys_init.c
+5 -5
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@@ -49,7 +49,7 @@
*/
#include "system.h"
#include "sys/alt_irq.h"
//#include "sys/alt_irq.h"
#include "sys/alt_sys_init.h"
#include <stddef.h>
@@ -58,7 +58,7 @@
* Device headers
*/
#include "altera_nios2_gen2_irq.h"
//#include "altera_nios2_gen2_irq.h"
#include "altera_avalon_jtag_uart.h"
#include "altera_avalon_timer.h"
#include "altera_epcq_controller_mod.h"
@@ -68,7 +68,7 @@
* Allocate the device storage
*/
ALTERA_NIOS2_GEN2_IRQ_INSTANCE ( NIOS2_QSYS_0, nios2_qsys_0);
//ALTERA_NIOS2_GEN2_IRQ_INSTANCE ( NIOS2_QSYS_0, nios2_qsys_0);
ALTERA_AVALON_JTAG_UART_INSTANCE ( JTAG_UART_0, jtag_uart_0);
ALTERA_AVALON_TIMER_INSTANCE ( TIMER_0, timer_0);
ALTERA_EPCQ_CONTROLLER_MOD_AVL_MEM_AVL_CSR_INSTANCE ( EPCQ_CONTROLLER_0, EPCQ_CONTROLLER_0_AVL_MEM, EPCQ_CONTROLLER_0_AVL_CSR, epcq_controller_0);
@@ -83,11 +83,11 @@ I2C_OPENCORES_INSTANCE ( I2C_OPENCORES_1, i2c_opencores_1);
* present for backwards-compatibility.
*/
void alt_irq_init ( const void* base )
/*void alt_irq_init ( const void* base )
{
ALTERA_NIOS2_GEN2_IRQ_INIT ( NIOS2_QSYS_0, nios2_qsys_0);
alt_irq_cpu_enable_interrupts();
}
}*/
/*
* Initialize the non-interrupt controller devices.
software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_init.c
+1 -1
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@@ -35,7 +35,7 @@
#include <sys/stat.h>
#include "sys/alt_irq.h"
//#include "sys/alt_irq.h"
#include "sys/alt_alarm.h"
#include "sys/ioctl.h"
#include "alt_types.h"
software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_read.c
+1 -1
View File
@@ -35,7 +35,7 @@
#include <sys/stat.h>
#include "sys/alt_irq.h"
//#include "sys/alt_irq.h"
#include "sys/alt_alarm.h"
#include "sys/ioctl.h"
#include "alt_types.h"
software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_write.c
+1 -1
View File
@@ -35,7 +35,7 @@
#include <sys/stat.h>
#include "sys/alt_irq.h"
//#include "sys/alt_irq.h"
#include "sys/alt_alarm.h"
#include "sys/ioctl.h"
#include "alt_types.h"
software/sys_controller_bsp/libhal_bsp.a
BIN
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Binary file not shown.
software/sys_controller_bsp/public.mk
+6 -5
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@@ -19,7 +19,7 @@
# Path to the provided linker script.
BSP_LINKER_SCRIPT := $(ALT_LIBRARY_ROOT_DIR)/linker.x
BSP_LINKER_SCRIPT := link.riscv.ld
# Include paths:
# The path to root of all header files that a library wishes to make
@@ -119,15 +119,15 @@ ELF_PATCH_FLAG += --cpu_name $(CPU_NAME)
# Hardware Divider present.
# setting HARDWARE_DIVIDE is false
ALT_CFLAGS += -mno-hw-div
#ALT_CFLAGS += -mno-hw-div
# Hardware Multiplier present.
# setting HARDWARE_MULTIPLY is false
ALT_CFLAGS += -mno-hw-mul
#ALT_CFLAGS += -mno-hw-mul
# Hardware Mulx present.
# setting HARDWARE_MULX is false
ALT_CFLAGS += -mno-hw-mulx
#ALT_CFLAGS += -mno-hw-mulx
# Debug Core present.
# setting HAS_DEBUG_CORE is true
@@ -258,7 +258,8 @@ ALT_CPPFLAGS += -DSMALL_C_LIB
# generate GP-relative accesses for small data objects that are external, weak,
# or common. none
# setting hal.make.cflags_mgpopt is -mgpopt=global
ALT_CFLAGS += -mgpopt=global
#ALT_CFLAGS += -mgpopt=global
ALT_CFLAGS += -march=rv32imc -mabi=ilp32
# Enable BSP generation to query if SOPC system is big endian. If true ignores
# export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. none
software/sys_controller_bsp/settings.bsp
+2 -2
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@@ -2,8 +2,8 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>Apr 18, 2018 10:30:05 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1524079805195</BspGeneratedUnixTimeStamp>
<BspGeneratedTimeStamp>Sep 25, 2018 9:18:49 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1537899529022</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>
software/sys_controller_bsp/system.h
+7 -3
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@@ -133,14 +133,18 @@
*
*/
#define ALT_CI_NIOS2_HW_CRC32_0(n,A) __builtin_custom_ini(ALT_CI_NIOS2_HW_CRC32_0_N+(n&ALT_CI_NIOS2_HW_CRC32_0_N_MASK),(A))
//#define ALT_CI_NIOS2_HW_CRC32_0(n,A) __builtin_custom_ini(ALT_CI_NIOS2_HW_CRC32_0_N+(n&ALT_CI_NIOS2_HW_CRC32_0_N_MASK),(A))
#define ALT_CI_NIOS2_HW_CRC32_0_N 0x0
#define ALT_CI_NIOS2_HW_CRC32_0_N_MASK ((1<<3)-1)
#define ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0(A) __builtin_custom_ini(ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0_N,(A))
//#define ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0(A) __builtin_custom_ini(ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0_N,(A))
#define ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0_N 0x9
#define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0(A) __builtin_custom_ini(ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0_N,(A))
//#define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0(A) __builtin_custom_ini(ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0_N,(A))
#define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0_N 0x8
#define ALT_CI_NIOS2_HW_CRC32_0(n,A) n
#define ALT_CI_NIOS_CUSTOM_INSTR_BITSWAP_0(A) A
#define ALT_CI_NIOS_CUSTOM_INSTR_ENDIANCONVERTER_0(A) A
/*
* Define for each module class mastered by the CPU