# memory.gdb - GDB memory region definitions
#
# Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
# SOPC Builder design path: ../../sys.sopcinfo
#
# Generated: Fri Oct 05 19:59:02 EEST 2018

# DO NOT MODIFY THIS FILE
#
# Changing this file will have subtle consequences
# which will almost certainly lead to a nonfunctioning
# system. If you do modify this file, be aware that your
# changes will be overwritten and lost when this file
# is generated again.
#
# DO NOT MODIFY THIS FILE

# License Agreement
#
# Copyright (c) 2008
# Altera Corporation, San Jose, California, USA.
# All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
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# Define memory regions for each memory connected to the CPU.
# The cache attribute is specified which improves GDB performance
# by allowing GDB to cache memory contents on the host.

# onchip_memory2_0
memory 0x10000 0x19000 cache

# epcq_controller_0_avl_mem
memory 0x800000 0x1000000 cache