marqs c83653c880 Release 0.69 ... * Improved remote control handling code * Fixed occasional mode change loop when switching to a non-interlace mode utilizing odd-field sync signal * Fixed randomly missing blue channel at power-on when using DVI output mode * Added H-PLL coast options * Finer tuning range for scanline strength and mask		2016-04-15 22:05:53 +03:00
..
epcq_controller_0.hex	Initial public release (FW 0.64)	2016-02-23 01:03:50 +02:00
meminit.qip	Initial public release (FW 0.64)	2016-02-23 01:03:50 +02:00
meminit.spd	Initial public release (FW 0.64)	2016-02-23 01:03:50 +02:00
sys_onchip_memory2_0.hex	Release 0.69	2016-04-15 22:05:53 +03:00