99 lines
2.3 KiB
C
99 lines
2.3 KiB
C
#include <stdio.h>
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#include "../perfect6502.h"
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/* XXX hook up memory[] with RAM[] in runtime.c */
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/************************************************************
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*
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* Interface to OS Library Code / Monitor
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*
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************************************************************/
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extern int kernal_dispatch();
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/* imported by runtime.c */
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unsigned char A, X, Y, S, P;
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unsigned short PC;
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int N, Z, C;
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void
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init_monitor()
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{
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FILE *f;
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f = fopen("cbmbasic/cbmbasic.bin", "r");
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fread(memory + 0xA000, 1, 17591, f);
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fclose(f);
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/*
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* fill the KERNAL jumptable with JMP $F800;
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* we will put code there later that loads
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* the CPU state and returns
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*/
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for (unsigned short addr = 0xFF90; addr < 0xFFF3; addr += 3) {
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memory[addr+0] = 0x4C;
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memory[addr+1] = 0x00;
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memory[addr+2] = 0xF8;
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}
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/*
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* cbmbasic scribbles over 0x01FE/0x1FF, so we can't start
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* with a stackpointer of 0 (which seems to be the state
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* after a RESET), so RESET jumps to 0xF000, which contains
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* a JSR to the actual start of cbmbasic
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*/
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memory[0xf000] = 0x20;
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memory[0xf001] = 0x94;
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memory[0xf002] = 0xE3;
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memory[0xfffc] = 0x00;
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memory[0xfffd] = 0xF0;
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}
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void
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handle_monitor(void *state)
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{
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PC = readPC(state);
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if (PC >= 0xFF90 && ((PC - 0xFF90) % 3 == 0)) {
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/* get register status out of 6502 */
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A = readA(state);
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X = readX(state);
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Y = readY(state);
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S = readSP(state);
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P = readP(state);
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N = P >> 7;
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Z = (P >> 1) & 1;
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C = P & 1;
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kernal_dispatch();
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/* encode processor status */
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P &= 0x7C; /* clear N, Z, C */
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P |= (N << 7) | (Z << 1) | C;
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/*
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* all KERNAL calls make the 6502 jump to $F800, so we
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* put code there that loads the return state of the
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* KERNAL function and returns to the caller
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*/
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memory[0xf800] = 0xA9; /* LDA #P */
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memory[0xf801] = P;
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memory[0xf802] = 0x48; /* PHA */
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memory[0xf803] = 0xA9; /* LHA #A */
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memory[0xf804] = A;
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memory[0xf805] = 0xA2; /* LDX #X */
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memory[0xf806] = X;
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memory[0xf807] = 0xA0; /* LDY #Y */
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memory[0xf808] = Y;
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memory[0xf809] = 0x28; /* PLP */
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memory[0xf80a] = 0x60; /* RTS */
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/*
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* XXX we could do RTI instead of PLP/RTS, but RTI seems to be
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* XXX broken in the chip dump - after the KERNAL call at 0xFF90,
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* XXX the 6502 gets heavily confused about its program counter
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* XXX and executes garbage instructions
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*/
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}
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}
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