Fix cycle count of opcode 0xD2 (CMP zpi)

CHANGES.txt

@@ -7,6 +7,9 @@
     was named "PHY" instead of "PLY", causing incorrect assembly
     and disassembly.  Thanks to Brian Cassidy for reporting it.
 
+  - Fixed the cycle count of 0xD2 (CMP zero page indirect) in
+    the 65C02 simulation.  Thanks to Brian Cassidy for reporting it.
+
 0.11 (2012-01-07)
 
   - Added a new 65Org16 MPU simulation written by Ed Spittles.

src/py65/devices/mpu65c02.py

@@ -258,7 +258,7 @@ class MPU(mpu6502.MPU):
     def inst_0xCB(self):
         self.waiting = True
 
-    @instruction(name="CMP", mode='zpi', cycles=6) # Don't know cycles
+    @instruction(name="CMP", mode='zpi', cycles=5)
     def inst_0xD2(self):
         self.opCPY(self.ZeroPageIndirectAddr)
         self.pc += 1