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synced 2025-01-22 13:31:39 +00:00
Added 65C02 instruction AND (ZP).
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@ -49,6 +49,11 @@ class MPU(NMOS6502):
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self.opORA(self.IndirectXAddr)
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self.pc += 1
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@instruction(name="AND", mode="zpi", cycles=5)
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def i32(self):
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self.opAND(self.ZeroPageIndirectAddr)
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self.pc += 1
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@instruction(name="PHY", mode="imp", cycles=3)
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def i5a(self):
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self.stPush(self.y)
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@ -12,6 +12,35 @@ class MPUTests(unittest.TestCase, Common6502Tests):
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self.assertEquals('<65C02: A=00, X=00, Y=00, Flags=20, SP=ff, PC=0000>',
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repr(mpu))
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# AND Zero Page, Indirect
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def test_and_zp_indirect_all_zeros_setting_zero_flag(self):
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mpu = self._make_mpu()
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mpu.a = 0xFF
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self._write(mpu.memory, 0x0000, (0x32, 0x10)) #=> AND ($0010)
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self._write(mpu.memory, 0x0010, (0xCD, 0xAB)) #=> Vector to $ABCD
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mpu.memory[0xABCD] = 0x00
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mpu.step()
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self.assertEquals(0x0002, mpu.pc)
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self.assertEquals(5, mpu.processorCycles)
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self.assertEquals(0x00, mpu.a)
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self.assertEquals(mpu.ZERO, mpu.flags & mpu.ZERO)
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self.assertEquals(0, mpu.flags & mpu.NEGATIVE)
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def test_and_zp_indirect_zeros_and_ones_setting_negative_flag(self):
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mpu = self._make_mpu()
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mpu.a = 0xFF
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self._write(mpu.memory, 0x0000, (0x32, 0x10)) #=> AND ($0010)
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self._write(mpu.memory, 0x0010, (0xCD, 0xAB)) #=> Vector to $ABCD
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mpu.memory[0xABCD] = 0xAA
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mpu.step()
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self.assertEquals(0x0002, mpu.pc)
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self.assertEquals(5, mpu.processorCycles)
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self.assertEquals(0xAA, mpu.a)
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self.assertEquals(mpu.NEGATIVE, mpu.flags & mpu.NEGATIVE)
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self.assertEquals(0, mpu.flags & mpu.ZERO)
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# LDA Zero Page, Indirect
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def test_lda_zp_indirect_loads_a_sets_n_flag(self):
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@ -22,6 +51,7 @@ class MPUTests(unittest.TestCase, Common6502Tests):
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mpu.memory[0xABCD] = 0x80
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mpu.step()
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self.assertEquals(0x0002, mpu.pc)
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self.assertEquals(5, mpu.processorCycles)
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self.assertEquals(0x80, mpu.a)
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self.assertEquals(mpu.NEGATIVE, mpu.flags & mpu.NEGATIVE)
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self.assertEquals(0, mpu.flags & mpu.ZERO)
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@ -34,6 +64,7 @@ class MPUTests(unittest.TestCase, Common6502Tests):
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mpu.memory[0xABCD] = 0x00
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mpu.step()
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self.assertEquals(0x0002, mpu.pc)
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self.assertEquals(5, mpu.processorCycles)
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self.assertEquals(0x00, mpu.a)
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self.assertEquals(mpu.ZERO, mpu.flags & mpu.ZERO)
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self.assertEquals(0, mpu.flags & mpu.NEGATIVE)
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@ -49,9 +80,10 @@ class MPUTests(unittest.TestCase, Common6502Tests):
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mpu.memory[0xABCD] = 0x00
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mpu.step()
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self.assertEquals(0x0002, mpu.pc)
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self.assertEquals(5, mpu.processorCycles)
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self.assertEquals(0x00, mpu.a)
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self.assertEquals(mpu.ZERO, mpu.flags & mpu.ZERO)
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def test_ora_zp_indirect_x_turns_bits_on_sets_n_flag(self):
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mpu = self._make_mpu()
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mpu.flags &= ~(mpu.NEGATIVE)
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@ -61,6 +93,7 @@ class MPUTests(unittest.TestCase, Common6502Tests):
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mpu.memory[0xABCD] = 0x82
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mpu.step()
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self.assertEquals(0x0002, mpu.pc)
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self.assertEquals(5, mpu.processorCycles)
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self.assertEquals(0x83, mpu.a)
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self.assertEquals(mpu.NEGATIVE, mpu.flags & mpu.NEGATIVE)
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self.assertEquals(0, mpu.flags & mpu.ZERO)
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