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from py65.devices import mpu6502
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from py65.devices import mpu6502
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from py65.utils.devices import make_instruction_decorator
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# The 65Org16 is a derivative of the 6502 architecture
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# - with 32-bit address space (by using 16-bit bytes)
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# - with no specific support for 8-bit bytes
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# - with BCD mode not supported
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# - and otherwise all opcodes and addressing modes are like the NMOS 6502
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# - sign bit is bit 15, overflow bit is bit 14
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#
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# One implementation can be found here: https://github.com/BigEd/verilog-6502/wiki
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class MPU(mpu6502.MPU):
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"""
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The 65Org16 is a derivative of the 6502 architecture
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- with 32-bit address space (by using 16-bit bytes)
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- with no specific support for 8-bit bytes
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- with BCD mode not supported
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- and otherwise all opcodes and addressing modes are like the NMOS 6502
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- sign bit is bit 15, overflow bit is bit 14
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One implementation can be found here: https://github.com/BigEd/verilog-6502/wiki
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"""
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def __init__(self, byteWidth=16, addrWidth=32, addrFmt="%08x", byteFmt="%04x", *args, **kwargs):
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mpu6502.MPU.__init__(self, byteWidth=byteWidth, addrWidth=addrWidth, addrFmt=addrFmt, byteFmt=byteFmt, *args, **kwargs)
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