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48 lines
1.4 KiB
Python
48 lines
1.4 KiB
Python
from py65.devices import mpu6502
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class MPU(mpu6502.MPU):
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"""
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The 65Org16 is a derivative of the 6502 architecture
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- with 32-bit address space (by using 16-bit bytes)
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- with no specific support for 8-bit bytes
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- with BCD mode not supported
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- and otherwise all opcodes and addressing modes are like the NMOS 6502
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- sign bit is bit 15, overflow bit is bit 14
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One implementation can be found here:
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https://github.com/BigEd/verilog-6502/wiki
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"""
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BYTE_WIDTH = 16
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BYTE_FORMAT = "%04x"
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ADDR_WIDTH = 32
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ADDR_FORMAT = "%08x"
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def __init__(self, *args, **kwargs):
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mpu6502.MPU.__init__(self, *args, **kwargs)
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self.name = '65Org16'
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self.waiting = False
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self.IrqTo = (1 << self.ADDR_WIDTH) - 2
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self.ResetTo = (1 << self.ADDR_WIDTH) - 4
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self.NMITo = (1 << self.ADDR_WIDTH) - 6
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self.NEGATIVE = 1 << 15
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self.OVERFLOW = 1 << 14
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def step(self):
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if self.waiting:
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self.processorCycles += 1
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else:
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mpu6502.MPU.step(self)
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return self
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# Make copies of the lists
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instruct = mpu6502.MPU.instruct[:]
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cycletime = mpu6502.MPU.cycletime[:]
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extracycles = mpu6502.MPU.extracycles[:]
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disassemble = mpu6502.MPU.disassemble[:]
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def reprformat(self):
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return ("%s PC AC XR YR SP NV---------BDIZC\n" +
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"%s: %08x %04x %04x %04x %04x %s")
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