2018-08-14 05:28:03 +00:00
|
|
|
#include "hardware.h"
|
|
|
|
|
2014-11-02 17:34:19 +00:00
|
|
|
#include <SPI.h>
|
2018-08-14 05:28:03 +00:00
|
|
|
|
2018-11-10 09:32:33 +00:00
|
|
|
#if defined(USE_SD)
|
2014-10-19 14:19:06 +00:00
|
|
|
#include <SD.h>
|
2018-08-14 05:28:03 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(USE_SPIFFS)
|
|
|
|
#include <SPIFFS.h>
|
|
|
|
#endif
|
|
|
|
|
2018-08-14 09:23:45 +00:00
|
|
|
#include "memory.h"
|
|
|
|
#include "ps2drv.h"
|
|
|
|
#include "CPU.h"
|
|
|
|
|
2018-08-14 05:28:03 +00:00
|
|
|
#if defined(SPIRAM_CS)
|
2014-11-02 17:34:19 +00:00
|
|
|
#include <SpiRAM.h>
|
2018-08-14 05:28:03 +00:00
|
|
|
#include "spiram.h"
|
|
|
|
spiram sram(SPIRAM_SIZE);
|
|
|
|
#endif
|
2014-10-19 14:19:06 +00:00
|
|
|
|
|
|
|
Memory memory;
|
|
|
|
PS2Driver ps2;
|
2018-08-10 12:47:06 +00:00
|
|
|
|
2014-10-21 18:41:44 +00:00
|
|
|
static CPU *_cpu;
|
2014-10-19 14:19:06 +00:00
|
|
|
|
2014-10-31 08:44:28 +00:00
|
|
|
bool hardware_reset() {
|
2018-08-10 12:47:06 +00:00
|
|
|
bool success = true;
|
|
|
|
|
|
|
|
#if defined(SPIRAM_CS)
|
2014-11-02 17:34:19 +00:00
|
|
|
extern SPIClass SPIRAM_DEV;
|
|
|
|
SPIRAM_DEV.begin();
|
|
|
|
SPIRAM_DEV.setModule(SPIRAM_SPI);
|
2014-11-16 21:45:48 +00:00
|
|
|
SPIRAM_DEV.setClockDivider(1);
|
2014-11-02 17:34:19 +00:00
|
|
|
SPIRAM_DEV.setDataMode(SPI_MODE0);
|
2018-08-10 12:47:06 +00:00
|
|
|
#endif
|
2014-10-19 14:19:06 +00:00
|
|
|
|
2018-11-10 09:32:33 +00:00
|
|
|
#if defined(USE_SD)
|
2018-08-10 12:47:06 +00:00
|
|
|
success = SD.begin(SD_CS, 2, SD_SPI);
|
2014-11-02 17:34:19 +00:00
|
|
|
pinMode(SPI_CS, OUTPUT); // without this, the SPI-RAM isn't seen
|
2018-08-10 12:47:06 +00:00
|
|
|
#endif
|
|
|
|
|
2018-08-14 05:28:03 +00:00
|
|
|
#if defined(USE_SPIFFS)
|
2018-09-06 12:09:19 +00:00
|
|
|
success = SPIFFS.begin(true);
|
2018-08-14 05:28:03 +00:00
|
|
|
#endif
|
|
|
|
|
2014-10-19 14:19:06 +00:00
|
|
|
#if defined(TFT_BACKLIGHT)
|
|
|
|
digitalWrite(TFT_BACKLIGHT, HIGH);
|
|
|
|
#endif
|
|
|
|
|
2014-10-31 08:44:28 +00:00
|
|
|
_cpu->reset();
|
2018-08-10 12:47:06 +00:00
|
|
|
return success;
|
2014-10-19 14:19:06 +00:00
|
|
|
}
|
2014-10-21 18:41:44 +00:00
|
|
|
|
2014-10-31 08:44:28 +00:00
|
|
|
void hardware_init(CPU &cpu) {
|
|
|
|
_cpu = &cpu;
|
|
|
|
memory.begin();
|
|
|
|
ps2.begin(KBD_DATA, KBD_IRQ);
|
2014-11-02 17:34:19 +00:00
|
|
|
|
2014-10-31 08:44:28 +00:00
|
|
|
#if defined(TFT_BACKLIGHT)
|
|
|
|
pinMode(TFT_BACKLIGHT, OUTPUT);
|
|
|
|
#endif
|
2018-08-10 12:47:06 +00:00
|
|
|
|
2018-11-10 09:32:33 +00:00
|
|
|
#if defined(USE_SD)
|
2014-11-02 17:34:19 +00:00
|
|
|
pinMode(SD_CS, OUTPUT);
|
|
|
|
digitalWrite(SD_CS, HIGH);
|
2018-08-10 12:47:06 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(SPIRAM_CS)
|
2014-11-02 17:34:19 +00:00
|
|
|
pinMode(SPIRAM_CS, OUTPUT);
|
|
|
|
digitalWrite(SPIRAM_CS, HIGH);
|
2018-08-10 12:47:06 +00:00
|
|
|
#endif
|
2014-10-31 08:44:28 +00:00
|
|
|
}
|
|
|
|
|
2014-10-21 18:41:44 +00:00
|
|
|
void hardware_checkpoint(Stream &s) {
|
2014-10-22 18:47:06 +00:00
|
|
|
unsigned ds = 0;
|
|
|
|
for (unsigned i = 0; i < 0x10000; i += ds) {
|
2014-10-21 18:41:44 +00:00
|
|
|
Memory::Device *dev = memory.get(i);
|
2014-10-31 17:44:37 +00:00
|
|
|
dev->checkpoint(s);
|
|
|
|
ds = dev->pages() * Memory::page_size;
|
2014-10-21 18:41:44 +00:00
|
|
|
}
|
2014-10-22 18:47:06 +00:00
|
|
|
_cpu->checkpoint(s);
|
2014-10-21 18:41:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void hardware_restore(Stream &s) {
|
2014-10-22 18:47:06 +00:00
|
|
|
unsigned ds = 0;
|
|
|
|
for (unsigned i = 0; i < 0x10000; i += ds) {
|
2014-10-21 18:41:44 +00:00
|
|
|
Memory::Device *dev = memory.get(i);
|
2014-10-31 17:44:37 +00:00
|
|
|
dev->restore(s);
|
|
|
|
ds = dev->pages() * Memory::page_size;
|
2014-10-21 18:41:44 +00:00
|
|
|
}
|
2014-10-22 18:47:06 +00:00
|
|
|
_cpu->restore(s);
|
2014-10-21 18:41:44 +00:00
|
|
|
}
|