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acia updates (#22)
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parent
67ff1567af
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46
acia.cpp
46
acia.cpp
@ -5,46 +5,58 @@
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#include "acia.h"
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#include "acia.h"
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void ACIA::write(Memory::address a, uint8_t b) {
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void ACIA::write(Memory::address a, uint8_t b) {
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if (a & 1) {
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if (a & 1)
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_device->write(b);
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write_data(b);
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return;
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else
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write_control(b);
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}
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}
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void ACIA::write_control(uint8_t b) {
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if ((b & cd_mask) == reset) {
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if ((b & cd_mask) == reset) {
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_device->reset();
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_serial->reset();
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return;
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return;
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}
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}
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switch (b & ws_mask) {
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switch (b & ws_mask) {
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case ws7e2:
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case ws7e2:
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_device->framing(7, 2, even);
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_serial->framing(7, 2, even);
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break;
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break;
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case ws7o2:
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case ws7o2:
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_device->framing(7, 2, odd);
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_serial->framing(7, 2, odd);
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break;
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break;
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case ws7e1:
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case ws7e1:
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_device->framing(7, 1, even);
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_serial->framing(7, 1, even);
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break;
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break;
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case ws7o1:
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case ws7o1:
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_device->framing(7, 1, odd);
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_serial->framing(7, 1, odd);
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break;
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break;
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case ws8n2:
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case ws8n2:
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_device->framing(8, 2, none);
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_serial->framing(8, 2, none);
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break;
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break;
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case ws8n1:
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case ws8n1:
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_device->framing(8, 1, none);
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_serial->framing(8, 1, none);
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break;
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break;
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case ws8e1:
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case ws8e1:
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_device->framing(8, 1, even);
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_serial->framing(8, 1, even);
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break;
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break;
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case ws8o1:
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case ws8o1:
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_device->framing(8, 1, odd);
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_serial->framing(8, 1, odd);
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break;
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break;
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};
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};
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// FIXME: more
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// FIXME: more
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}
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}
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uint8_t ACIA::read(Memory::address a) {
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void ACIA::write_data(uint8_t b) {
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if (a & 1)
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_serial->write(b);
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return _device->read();
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}
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return _device->more()? rdrf | tdre: tdre;
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uint8_t ACIA::read(Memory::address a) {
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return (a & 1)? read_data(): read_status();
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}
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uint8_t ACIA::read_data() {
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return _serial->read();
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}
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uint8_t ACIA::read_status() {
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return _serial->more()? rdrf | tdre: tdre;
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}
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}
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11
acia.h
11
acia.h
@ -8,7 +8,7 @@ public:
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void write(Memory::address, uint8_t);
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void write(Memory::address, uint8_t);
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uint8_t read(Memory::address);
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uint8_t read(Memory::address);
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ACIA(serialio &d): _device(&d) {}
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ACIA(serialio &s): _serial(&s) {}
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// status bits
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// status bits
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//
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//
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@ -47,7 +47,14 @@ public:
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static const uint8_t eri = 1 << 7; // enable receive interrupt
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static const uint8_t eri = 1 << 7; // enable receive interrupt
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protected:
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// overrideable device memory interface
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virtual uint8_t read_status();
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virtual uint8_t read_data();
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virtual void write_control(uint8_t);
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virtual void write_data(uint8_t);
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private:
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private:
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class serialio *_device;
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class serialio *_serial;
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};
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};
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#endif
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#endif
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