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minor updates
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3
cpu.h
3
cpu.h
@ -5,6 +5,8 @@
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#include <setjmp.h>
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#endif
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#undef PC
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class CPU: public Checkpointable {
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public:
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virtual void run(unsigned instructions) =0;
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@ -22,6 +24,7 @@ public:
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protected:
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CPU (Memory &mem, jmp_buf &e, statfn s): _mem(mem), _err(e), _status(s), _debug(false) {}
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Memory &_mem;
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Memory::address PC;
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jmp_buf &_err;
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statfn _status;
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bool _debug;
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@ -27,7 +27,7 @@
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//#define SPIRAM_CS PF_3
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#define SPIRAM_SPI 1
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#define SPIRAM_DEV SPI_for_SD
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#define SPIRAM_SIZE 32768
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#define SPIRAM_SIZE 65536
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// "tape" storage...
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#define SD_CS PF_3
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@ -2,6 +2,7 @@
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#include "memory.h"
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#include "cpu.h"
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#include "ports.h"
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#include "i8080.h"
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#define CPU_STATE_FMT "%04x %02x %02x %04x %04x %04x %04x %d%d%d%d%d%d%d%d\r",\
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@ -117,7 +118,7 @@ int i8080::parity_table[] = {
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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};
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i8080::i8080(Memory &m, jmp_buf &jb, CPU::statfn s, Ports &d): CPU(m, jb, s)
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i8080::i8080(Memory &m, jmp_buf &jb, CPU::statfn s, PortDevice<i8080> &d): CPU(m, jb, s)
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{
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_ports = &d;
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16
i8080.h
16
i8080.h
@ -6,14 +6,7 @@
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class i8080: public CPU {
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public:
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class Ports {
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public:
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virtual void out(byte p, byte v, i8080 *cpu) =0;
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virtual byte in(byte p, i8080 *cpu) =0;
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};
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i8080(Memory &, jmp_buf &, CPU::statfn, Ports &);
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i8080(Memory &, jmp_buf &, CPU::statfn, PortDevice<i8080> &);
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void run(unsigned);
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void reset();
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@ -51,7 +44,7 @@ private:
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struct { byte L, H; };
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word HL;
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};
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Memory::address PC, SP;
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Memory::address SP;
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union {
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struct {
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unsigned C:1;
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@ -66,7 +59,7 @@ private:
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byte SR;
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};
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int _irq_pending;
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Ports *_ports;
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PortDevice<i8080> *_ports;
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typedef void (i8080::*OP)();
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OP _ops[256];
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@ -322,7 +315,8 @@ private:
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inline void _and(byte b) {
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A = A & b;
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_szp(A);
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flags.C = flags.H = 0;
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flags.C = 0;
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flags.H = 1;
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}
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void anab() { _and(B); }
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11
ports.h
Normal file
11
ports.h
Normal file
@ -0,0 +1,11 @@
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#ifndef __PORTS_H__
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#define __PORTS_H__
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template<class P>
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class PortDevice {
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public:
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virtual void out(word p, byte v, P *cpu) =0;
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virtual byte in(word p, P *cpu) =0;
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};
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#endif
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1
r6502.h
1
r6502.h
@ -16,7 +16,6 @@ public:
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r6502 (Memory &, jmp_buf &, CPU::statfn);
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private:
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/* registers */
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Memory::address PC;
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byte S, A, X, Y;
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byte N, V, B, D, I, Z, C;
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union {
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@ -21,7 +21,7 @@ spiram::operator byte()
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void spiram::checkpoint(Stream &s)
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{
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byte buf[Memory::page_size];
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for (int i = 0; i < pages(); i++) {
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for (unsigned i = 0; i < pages(); i++) {
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spiRam.read_stream(i * 256, buf, sizeof(buf));
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s.write(buf, sizeof(buf));
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}
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@ -30,7 +30,7 @@ void spiram::checkpoint(Stream &s)
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void spiram::restore(Stream &s)
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{
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byte buf[Memory::page_size];
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for (int i = 0; i < pages(); i++) {
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for (unsigned i = 0; i < pages(); i++) {
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s.readBytes((char *)buf, sizeof(buf));
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spiRam.write_stream(i * 256, buf, sizeof(buf));
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}
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