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https://github.com/rkujawa/rk65c02.git
synced 2025-02-02 20:29:46 +00:00
Implement simpler to use assembly mode, straight to bus.
While here refactor existing assembly functions.
This commit is contained in:
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7dd511b7dd
commit
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@ -108,16 +108,44 @@ instruction_print(instruction_t *i)
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}
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}
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}
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}
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bool
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assembler_t
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assemble_single_implied(uint8_t **buf, uint8_t *bsize, const char *mnemonic)
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assemble_init(bus_t *b, uint16_t pc)
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{
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{
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/* XXX: does brk needs special handling? */
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assembler_t asmblr;
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return assemble_single(buf, bsize, mnemonic, IMPLIED, 0, 0);
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asmblr.bus = b;
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asmblr.pc = pc;
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return asmblr;
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}
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bool
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assemble_single(assembler_t *a, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
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{
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uint8_t *asmbuf;
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uint8_t bsize;
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bool rv;
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rv = assemble_single_buf(&asmbuf, &bsize, mnemonic, mode, op1, op2);
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if (rv == false)
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return rv;
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rv = bus_load_buf(a->bus, a->pc, asmbuf, bsize);
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free(asmbuf);
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a->pc += bsize;
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return rv;
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}
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bool
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assemble_single_buf_implied(uint8_t **buf, uint8_t *bsize, const char *mnemonic)
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{
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return assemble_single_buf(buf, bsize, mnemonic, IMPLIED, 0, 0);
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}
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}
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bool
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bool
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assemble_single(uint8_t **buf, uint8_t *bsize, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
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assemble_single_buf(uint8_t **buf, uint8_t *bsize, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
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{
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{
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instrdef_t id;
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instrdef_t id;
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uint8_t opcode;
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uint8_t opcode;
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@ -41,6 +41,13 @@ struct instrdef {
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typedef struct instrdef instrdef_t;
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typedef struct instrdef instrdef_t;
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struct assembler {
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bus_t *bus;
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uint16_t pc;
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};
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typedef struct assembler assembler_t;
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instruction_t instruction_fetch(bus_t *, uint16_t);
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instruction_t instruction_fetch(bus_t *, uint16_t);
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instrdef_t instruction_decode(uint8_t);
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instrdef_t instruction_decode(uint8_t);
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void instruction_print(instruction_t *);
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void instruction_print(instruction_t *);
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@ -55,7 +62,9 @@ void program_counter_increment(rk65c02emu_t *, instrdef_t *);
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bool instruction_modify_pc(instrdef_t *);
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bool instruction_modify_pc(instrdef_t *);
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void program_counter_branch(rk65c02emu_t *, int8_t);
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void program_counter_branch(rk65c02emu_t *, int8_t);
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bool assemble_single_implied(uint8_t **, uint8_t *, const char *);
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bool assemble_single_buf_implied(uint8_t **, uint8_t *, const char *);
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bool assemble_single(uint8_t **, uint8_t *, const char *, addressing_t, uint8_t, uint8_t);
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bool assemble_single_buf(uint8_t **, uint8_t *, const char *, addressing_t, uint8_t, uint8_t);
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assembler_t assemble_init(bus_t *b, uint16_t pc);
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#endif /* _INSTRUCTION_H_ */
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#endif /* _INSTRUCTION_H_ */
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@ -10,8 +10,8 @@
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#include "instruction.h"
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#include "instruction.h"
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#include "utils.h"
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#include "utils.h"
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ATF_TC_WITHOUT_HEAD(asm_single);
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ATF_TC_WITHOUT_HEAD(assemble_single_buf);
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ATF_TC_BODY(asm_single, tc)
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ATF_TC_BODY(assemble_single_buf, tc)
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{
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{
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rk65c02emu_t e;
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rk65c02emu_t e;
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bus_t b;
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bus_t b;
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@ -25,20 +25,20 @@ ATF_TC_BODY(asm_single, tc)
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caddr = ROM_LOAD_ADDR;
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caddr = ROM_LOAD_ADDR;
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e.regs.PC = ROM_LOAD_ADDR;
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e.regs.PC = ROM_LOAD_ADDR;
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ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "nop"));
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ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
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ATF_CHECK(asmbuf[0] == 0xEA); /* check if nop really */
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ATF_CHECK(asmbuf[0] == 0xEA); /* check if nop really */
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ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
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ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
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free(asmbuf);
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free(asmbuf);
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caddr += bsize;
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caddr += bsize;
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ATF_REQUIRE(assemble_single(&asmbuf, &bsize, "lda", IMMEDIATE, 0xAA, 0));
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ATF_REQUIRE(assemble_single_buf(&asmbuf, &bsize, "lda", IMMEDIATE, 0xAA, 0));
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ATF_CHECK(asmbuf[0] == 0xA9); /* check if lda really */
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ATF_CHECK(asmbuf[0] == 0xA9); /* check if lda really */
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ATF_CHECK(asmbuf[1] == 0xAA); /* check the operand */
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ATF_CHECK(asmbuf[1] == 0xAA); /* check the operand */
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ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
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ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
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free(asmbuf);
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free(asmbuf);
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caddr += bsize;
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caddr += bsize;
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ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "stp"));
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ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "stp"));
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ATF_CHECK(asmbuf[0] == 0xDB); /* check if stp really */
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ATF_CHECK(asmbuf[0] == 0xDB); /* check if stp really */
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ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
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ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
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free(asmbuf);
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free(asmbuf);
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@ -47,9 +47,32 @@ ATF_TC_BODY(asm_single, tc)
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rk65c02_start(&e);
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rk65c02_start(&e);
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}
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}
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ATF_TC_WITHOUT_HEAD(assemble_single);
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ATF_TC_BODY(assemble_single, tc)
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{
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rk65c02emu_t e;
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bus_t b;
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assembler_t a;
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b = bus_init();
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a = assemble_init(&b, ROM_LOAD_ADDR);
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e = rk65c02_init(&b);
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e.regs.PC = ROM_LOAD_ADDR;
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ATF_REQUIRE(assemble_single(&a, "nop", IMPLIED, 0, 0));
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ATF_REQUIRE(assemble_single(&a, "stp", IMPLIED, 0, 0));
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ATF_CHECK(bus_read_1(&b, ROM_LOAD_ADDR) == 0xEA);
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ATF_CHECK(bus_read_1(&b, ROM_LOAD_ADDR + 1) == 0xDB);
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rk65c02_start(&e);
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}
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ATF_TP_ADD_TCS(tp)
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ATF_TP_ADD_TCS(tp)
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{
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{
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ATF_TP_ADD_TC(tp, asm_single);
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ATF_TP_ADD_TC(tp, assemble_single_buf);
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ATF_TP_ADD_TC(tp, assemble_single);
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return (atf_no_error());
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return (atf_no_error());
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}
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}
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@ -79,17 +79,17 @@ ATF_TC_BODY(intr_rti, tc)
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israsmpc = ISR_ADDR;
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israsmpc = ISR_ADDR;
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ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "nop"));
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ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
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ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
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ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
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free(asmbuf);
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free(asmbuf);
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israsmpc += bsize;
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israsmpc += bsize;
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ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "rti"));
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ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "rti"));
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ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
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ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
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free(asmbuf);
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free(asmbuf);
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israsmpc += bsize;
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israsmpc += bsize;
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ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "nop"));
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ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
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ATF_REQUIRE(bus_load_buf(&b, ROM_LOAD_ADDR, asmbuf, bsize));
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ATF_REQUIRE(bus_load_buf(&b, ROM_LOAD_ADDR, asmbuf, bsize));
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free(asmbuf);
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free(asmbuf);
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