diff --git a/src/65c02isa.csv b/src/65c02isa.csv
index 7a68ac3..d329934 100644
--- a/src/65c02isa.csv
+++ b/src/65c02isa.csv
@@ -37,15 +37,15 @@ OP_NOPI_23,"nop",IMMEDIATE,2,NULL
 OP_NOPI_24,"nop",IMPLIED,1,NULL
 OP_BIT_ZP,"bit",ZP,2,NULL
 OP_AND_ZP,"and",ZP,2,emul_and
-OP_ROL_ZP,"rol",ZP,2,NULL
+OP_ROL_ZP,"rol",ZP,2,emul_rol
 OP_RMB2_ZP,"rmb2",ZP,2,NULL
 OP_PLP,"plp",IMPLIED,1,emul_plp
 OP_AND_IMM,"and",IMMEDIATE,2,emul_and
-OP_ROL,"rol",ACCUMULATOR,1,NULL
+OP_ROL,"rol",ACCUMULATOR,1,emul_rol
 OP_NOPI_2C,"nop",IMPLIED,1,NULL
 OP_BIT_ABS,"bit",ABSOLUTE,3,NULL
 OP_AND_ABS,"and",ABSOLUTE,3,NULL
-OP_ROL_ABS,"rol",ABSOLUTE,3,NULL
+OP_ROL_ABS,"rol",ABSOLUTE,3,emul_rol
 OP_BBR2_REL,"bbr2",ZPR,2,NULL
 OP_BMI_REL,"bmi",RELATIVE,2,NULL
 OP_AND_IZPY,"and",IZPY,2,NULL
@@ -53,7 +53,7 @@ OP_AND_IZP,"and",IZP,2,NULL
 OP_NOPI_34,"nop",IMPLIED,1,NULL
 OP_BIT_ZPX,"bit",ZPX,2,NULL
 OP_AND_ZPX,"and",ZPX,2,NULL
-OP_ROL_ZPX,"rol",ZPX,2,NULL
+OP_ROL_ZPX,"rol",ZPX,2,emul_rol
 OP_RMB3_ZP,"rmb3",ZP,2,NULL
 OP_SEC,"sec",IMPLIED,1,emul_sec
 OP_AND_ABSY,"and",ABSOLUTEY,3,NULL
@@ -61,7 +61,7 @@ OP_DEC,"dec",ACCUMULATOR,1,NULL
 OP_NOPI_3C,"nop",IMPLIED,1,NULL
 OP_BIT_ABSX,"bit",ABSOLUTEX,3,NULL
 OP_AND_ABSX,"and",ABSOLUTEX,3,NULL
-OP_ROL_ABSX,"rol",ABSOLUTEX,3,NULL
+OP_ROL_ABSX,"rol",ABSOLUTEX,3,emul_rol
 OP_BBR3_REL,"bbr3",ZPR,2,NULL
 OP_RTI,"rti",IMPLIED,1,NULL
 OP_EOR_IZPX,"eor",IZPX,2,emul_eor
@@ -101,15 +101,15 @@ OP_NOPI_63,"nop",IMMEDIATE,2,NULL
 OP_NOPI_64,"nop",IMPLIED,1,NULL
 OP_STZ_ZP,"stz",ZP,2,emul_stz
 OP_ADC_ZP,"adc",ZP,2,NULL
-OP_ROR_ZP,"ror",ZP,2,NULL
+OP_ROR_ZP,"ror",ZP,2,emul_ror
 OP_RMB6_ZP,"rmb6",ZP,2,NULL
 OP_PLA,"pla",IMPLIED,1,emul_pla
 OP_ADC_IMM,"adc",IMMEDIATE,2,NULL
-OP_ROR,"ror",ACCUMULATOR,1,NULL
+OP_ROR,"ror",ACCUMULATOR,1,emul_ror
 OP_NOPI_6C,"nop",IMPLIED,1,NULL
 OP_JMP_IABS,"jmp",IABSOLUTE,3,NULL
 OP_ADC_ABS,"adc",ABSOLUTE,3,NULL
-OP_ROR_ABS,"ror",ABSOLUTE,3,NULL
+OP_ROR_ABS,"ror",ABSOLUTE,3,emul_ror
 OP_BBR6_REL,"bbr6",ZPR,2,NULL
 OP_BVS_REL,"bvs",RELATIVE,2,NULL
 OP_ADC_IZPY,"adc",IZPY,2,NULL
@@ -117,7 +117,7 @@ OP_ADC_IZP,"adc",IZP,2,NULL
 OP_NOPI_74,"nop",IMPLIED,1,NULL
 OP_STZ_ZPX,"stz",ZPX,2,emul_stz
 OP_ADC_ZPX,"adc",ZPX,2,NULL
-OP_ROR_ZPX,"ror",ZPX,2,NULL
+OP_ROR_ZPX,"ror",ZPX,2,emul_ror
 OP_RMB7_ZP,"rmb7",ZP,2,NULL
 OP_SEI,"sei",IMPLIED,1,NULL
 OP_ADC_ABSY,"adc",ABSOLUTEY,3,NULL
@@ -125,7 +125,7 @@ OP_PLY,"ply",IMPLIED,1,NULL
 OP_NOPI_7C,"nop",IMPLIED,1,NULL
 OP_JMP_IABSX,"jmp",IABSOLUTEX,3,NULL
 OP_ADC_ABSX,"adc",ABSOLUTEX,3,NULL
-OP_ROR_ABSX,"ror",ABSOLUTEX,3,NULL
+OP_ROR_ABSX,"ror",ABSOLUTEX,3,emul_ror
 OP_BBR7_REL,"bbr7",ZPR,2,NULL
 OP_BRA_REL,"bra",RELATIVE,2,NULL
 OP_STA_IZPX,"sta",IZPX,2,emul_sta
diff --git a/src/emulation.c b/src/emulation.c
index ea622fb..3f2fb37 100644
--- a/src/emulation.c
+++ b/src/emulation.c
@@ -146,6 +146,76 @@ emul_plp(rk65c02emu_t *e, void *id, instruction_t *i)
 	e->regs.P = stack_pop(e) | P_UNDEFINED;
 }
 
+/* ROL - rotate left */
+void
+emul_rol(rk65c02emu_t *e, void *id, instruction_t *i)
+{
+	bool ncarry;
+	uint8_t val;
+
+	ncarry = false;
+
+	val = instruction_data_read_1(e, (instrdef_t *) id, i);
+
+	/* new carry flag value equals contents of bit 7 */
+	if (val & 0x80)
+		ncarry = true;
+
+	/* shift left by one bit */
+	val <<= 1;
+
+	/* bit 0 is set from current value of carry flag */
+	if (e->regs.P & P_CARRY)
+		val |= 0x1;
+	else
+		val &= ~0x1;
+
+	if (ncarry)
+		e->regs.P |= P_CARRY;
+	else
+		e->regs.P &= ~P_CARRY;
+
+	instruction_status_adjust_zero(e, val);
+	instruction_status_adjust_negative(e, val);
+
+	instruction_data_write_1(e, (instrdef_t *) id, i, val);
+}
+
+/* ROR - rotate right */
+void
+emul_ror(rk65c02emu_t *e, void *id, instruction_t *i)
+{
+	bool ncarry;
+	uint8_t val;
+
+	ncarry = false;
+
+	val = instruction_data_read_1(e, (instrdef_t *) id, i);
+
+	/* new carry flag value equals contents of bit 0 */
+	if (val & 0x1)
+		ncarry = true;
+
+	/* shift right by one bit */
+	val >>= 1;
+
+	/* bit 7 is set from current value of carry flag */
+	if (e->regs.P & P_CARRY)
+		val |= 0x80;
+	else
+		val &= ~0x80;
+
+	if (ncarry)
+		e->regs.P |= P_CARRY;
+	else
+		e->regs.P &= ~P_CARRY;
+
+	instruction_status_adjust_zero(e, val);
+	instruction_status_adjust_negative(e, val);
+
+	instruction_data_write_1(e, (instrdef_t *) id, i, val);
+}
+
 /* SEC - set the carry flag */
 void
 emul_sec(rk65c02emu_t *e, void *id, instruction_t *i)