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Implement test cases for DEC instruction.

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This commit is contained in:
Radosław Kujawa 2017-01-27 11:43:15 +01:00
parent db75a9becc
commit 1f3b61bec8
6 changed files with 72 additions and 0 deletions
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57
test/test_emulation.c
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@ -85,6 +85,62 @@ ATF_TC_BODY(emul_dex_dey, tc)
bus_finish(&b); bus_finish(&b);
} }
ATF_TC_WITHOUT_HEAD(emul_dec);
ATF_TC_BODY(emul_dec, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init();
e = rk65c02_init(&b);
/* DEC A */
e.regs.A = 0x1;
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_a.rom"));
ATF_CHECK(e.regs.A == 0x0);
/* DEC A underflow */
e.regs.A = 0x0;
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_a.rom"));
ATF_CHECK(e.regs.A == 0xFF);
/* DEC zero page */
bus_write_1(&b, 0x10, 0x01);
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_zp.rom"));
ATF_CHECK(bus_read_1(&b, 0x10) == 0x0);
/* DEC zero page underflow */
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_zp.rom"));
ATF_CHECK(bus_read_1(&b, 0x10) == 0xFF);
/* DEC zero page X */
e.regs.X = 1;
bus_write_1(&b, 0x11, 0x01);
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_zpx.rom"));
ATF_CHECK(bus_read_1(&b, 0x11) == 0x0);
/* DEC zero page X overflow */
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_zpx.rom"));
ATF_CHECK(bus_read_1(&b, 0x11) == 0xFF);
/* DEC absolute */
bus_write_1(&b, 0x2010, 0xA1);
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_abs.rom"));
ATF_CHECK(bus_read_1(&b, 0x2010) == 0xA0);
/* DEC absolute overflow */
bus_write_1(&b, 0x2010, 0x0);
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_abs.rom"));
ATF_CHECK(bus_read_1(&b, 0x2010) == 0xFF);
/* DEC absolute X */
e.regs.X = 0x10;
bus_write_1(&b, 0x2020, 0x1);
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_absx.rom"));
ATF_CHECK(bus_read_1(&b, 0x2020) == 0x0);
/* DEC absolute X underflow */
ATF_REQUIRE(rom_start(&e, "test_emulation_dec_absx.rom"));
ATF_CHECK(bus_read_1(&b, 0x2020) == 0xFF);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_inc); ATF_TC_WITHOUT_HEAD(emul_inc);
ATF_TC_BODY(emul_inc, tc) ATF_TC_BODY(emul_inc, tc)
{ {
@ -565,6 +621,7 @@ ATF_TP_ADD_TCS(tp)
{ {
ATF_TP_ADD_TC(tp, emul_and); ATF_TP_ADD_TC(tp, emul_and);
ATF_TP_ADD_TC(tp, emul_bit); ATF_TP_ADD_TC(tp, emul_bit);
ATF_TP_ADD_TC(tp, emul_dec);
ATF_TP_ADD_TC(tp, emul_dex_dey); ATF_TP_ADD_TC(tp, emul_dex_dey);
ATF_TP_ADD_TC(tp, emul_clc_sec); ATF_TP_ADD_TC(tp, emul_clc_sec);
ATF_TP_ADD_TC(tp, emul_inc); ATF_TP_ADD_TC(tp, emul_inc);

3
test/test_emulation_dec_a.s Normal file
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@ -0,0 +1,3 @@
start: dec A
stp

3
test/test_emulation_dec_abs.s Normal file
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@ -0,0 +1,3 @@
start: dec 0x2010
stp

3
test/test_emulation_dec_absx.s Normal file
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@ -0,0 +1,3 @@
start: dec 0x2010,X
stp

3
test/test_emulation_dec_zp.s Normal file
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@ -0,0 +1,3 @@
start: dec 0x10
stp

3
test/test_emulation_dec_zpx.s Normal file
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@ -0,0 +1,3 @@
start: dec 0x10,X
stp