mirror of
https://github.com/rkujawa/rk65c02.git
synced 2025-01-19 03:30:46 +00:00
Branch and jump instrucitons need special PC treatment.
This commit is contained in:
parent
9294891a23
commit
2430cfd722
514
src/65c02isa.csv
514
src/65c02isa.csv
@ -1,257 +1,257 @@
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opcode_id,mnemonic,addressing,size,emulation
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OP_BRK,"brk",IMPLIED,1,NULL
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OP_ORA_IZPX,"ora",IZPX,2,emul_ora
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OP_NOPI_3,"nop",IMMEDIATE,2,NULL
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OP_NOPI_4,"nop",IMPLIED,1,NULL
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OP_TSB_ZP,"tsb",ZP,2,NULL
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OP_ORA_ZP,"ora",ZP,2,emul_ora
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OP_ASL_ZP,"asl",ZP,2,emul_asl
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OP_RMB0_ZP,"rmb0",ZP,2,emul_rmb0
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OP_PHP,"php",IMPLIED,1,emul_php
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OP_ORA_IMM,"ora",IMMEDIATE,2,emul_ora
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OP_ASL,"asl",ACCUMULATOR,1,emul_asl
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OP_NOPI_C,"nop",IMPLIED,1,NULL
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OP_TSB_ABS,"tsb",ABSOLUTE,3,NULL
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OP_ORA_ABS,"ora",ABSOLUTE,3,emul_ora
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OP_ASL_ABS,"asl",ABSOLUTE,3,emul_asl
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OP_BBR0_REL,"bbr0",ZPR,2,NULL
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OP_BPL_REL,"bpl",RELATIVE,2,NULL
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OP_ORA_IZPY,"ora",IZPY,2,emul_ora
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OP_ORA_IZP,"ora",IZP,2,emul_ora
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OP_NOPI_14,"nop",IMPLIED,1,NULL
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OP_TRB_ZP,"trb",ZP,2,NULL
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OP_ORA_ZPX,"ora",ZPX,2,emul_ora
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OP_ASL_ZPX,"asl",ZPX,2,emul_asl
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OP_RMB1_ZP,"rmb1",ZP,1,emul_rmb1
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OP_CLC,"clc",IMPLIED,1,emul_clc
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OP_ORA_ABSY,"ora",ABSOLUTEY,3,emul_ora
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OP_INC,"inc",ACCUMULATOR,1,emul_inc
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OP_NOPI_1C,"nop",IMPLIED,1,NULL
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OP_TRB_ABS,"trb",ABSOLUTE,3,NULL
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OP_ORA_ABSX,"ora",ABSOLUTEX,3,emul_ora
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OP_ASL_ABSX,"asl",ABSOLUTEX,3,emul_asl
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OP_BBR1_REL,"bbr1",ZPR,2,NULL
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OP_JSR,"jsr",ABSOLUTE,3,NULL
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OP_AND_IZPX,"and",IZPX,2,emul_and
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OP_NOPI_23,"nop",IMMEDIATE,2,NULL
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OP_NOPI_24,"nop",IMPLIED,1,NULL
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OP_BIT_ZP,"bit",ZP,2,emul_bit
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OP_AND_ZP,"and",ZP,2,emul_and
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OP_ROL_ZP,"rol",ZP,2,emul_rol
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OP_RMB2_ZP,"rmb2",ZP,2,emul_rmb2
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OP_PLP,"plp",IMPLIED,1,emul_plp
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OP_AND_IMM,"and",IMMEDIATE,2,emul_and
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OP_ROL,"rol",ACCUMULATOR,1,emul_rol
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OP_NOPI_2C,"nop",IMPLIED,1,NULL
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OP_BIT_ABS,"bit",ABSOLUTE,3,emul_bit
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OP_AND_ABS,"and",ABSOLUTE,3,emul_and
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OP_ROL_ABS,"rol",ABSOLUTE,3,emul_rol
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OP_BBR2_REL,"bbr2",ZPR,2,NULL
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OP_BMI_REL,"bmi",RELATIVE,2,NULL
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OP_AND_IZPY,"and",IZPY,2,emul_and
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OP_AND_IZP,"and",IZP,2,emul_and
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OP_NOPI_34,"nop",IMPLIED,1,NULL
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OP_BIT_ZPX,"bit",ZPX,2,emul_bit
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OP_AND_ZPX,"and",ZPX,2,emul_and
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OP_ROL_ZPX,"rol",ZPX,2,emul_rol
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OP_RMB3_ZP,"rmb3",ZP,2,emul_rmb3
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OP_SEC,"sec",IMPLIED,1,emul_sec
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OP_AND_ABSY,"and",ABSOLUTEY,3,emul_and
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OP_DEC,"dec",ACCUMULATOR,1,emul_dec
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OP_NOPI_3C,"nop",IMPLIED,1,NULL
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OP_BIT_ABSX,"bit",ABSOLUTEX,3,emul_bit
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OP_AND_ABSX,"and",ABSOLUTEX,3,emul_and
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OP_ROL_ABSX,"rol",ABSOLUTEX,3,emul_rol
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OP_BBR3_REL,"bbr3",ZPR,2,NULL
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OP_RTI,"rti",IMPLIED,1,NULL
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OP_EOR_IZPX,"eor",IZPX,2,emul_eor
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OP_NOPI_43,"nop",IMMEDIATE,2,NULL
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OP_NOPI_44,"nop",IMPLIED,1,NULL
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OP_NOPI_45,"nop",ZP,2,NULL
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OP_EOR_ZP,"eor",ZP,2,emul_eor
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OP_LSR_ZP,"lsr",ZP,2,emul_lsr
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OP_RMB4_ZP,"rmb4",ZP,2,emul_rmb4
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OP_PHA,"pha",IMPLIED,1,emul_pha
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OP_EOR_IMM,"eor",IMMEDIATE,2,emul_eor
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OP_LSR,"lsr",ACCUMULATOR,1,emul_lsr
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OP_NOPI_4C,"nop",IMPLIED,1,NULL
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OP_JMP_ABS,"jmp",ABSOLUTE,3,NULL
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OP_EOR_ABS,"eor",ABSOLUTE,3,emul_eor
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OP_LSR_ABS,"lsr",ABSOLUTE,3,emul_lsr
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OP_BBR4_REL,"bbr4",ZPR,2,NULL
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OP_BVC_REL,"bvc",RELATIVE,2,NULL
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OP_EOR_IZPY,"eor",IZPY,2,emul_eor
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OP_EOR_IZP,"eor",IZP,2,emul_eor
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OP_NOPI_54,"nop",IMPLIED,1,NULL
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OP_NOPI_55,"nop",ZPX,2,NULL
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OP_EOR_ZPX,"eor",ZPX,2,emul_eor
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OP_LSR_ZPX,"lsr",ZPX,2,emul_lsr
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OP_RMB5_ZP,"rmb5",ZP,2,emul_rmb5
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OP_CLI,"cli",IMPLIED,1,NULL
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OP_EOR_ABSY,"eor",ABSOLUTEY,3,emul_eor
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OP_PHY,"phy",IMPLIED,1,emul_phy
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OP_NOPI_5C,"nop",IMPLIED,1,NULL
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OP_NOPI_5D,"nop",ABSOLUTE,3,NULL
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OP_EOR_ABSX,"eor",ABSOLUTEX,3,emul_eor
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OP_LSR_ABSX,"lsr",ABSOLUTEX,3,emul_lsr
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OP_BBR5_REL,"bbr5",ZPR,2,NULL
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OP_RTS,"rts",IMPLIED,1,NULL
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OP_ADC_IZPX,"adc",IZPX,2,NULL
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OP_NOPI_63,"nop",IMMEDIATE,2,NULL
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OP_NOPI_64,"nop",IMPLIED,1,NULL
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OP_STZ_ZP,"stz",ZP,2,emul_stz
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OP_ADC_ZP,"adc",ZP,2,NULL
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OP_ROR_ZP,"ror",ZP,2,emul_ror
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OP_RMB6_ZP,"rmb6",ZP,2,emul_rmb6
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OP_PLA,"pla",IMPLIED,1,emul_pla
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OP_ADC_IMM,"adc",IMMEDIATE,2,NULL
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OP_ROR,"ror",ACCUMULATOR,1,emul_ror
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OP_NOPI_6C,"nop",IMPLIED,1,NULL
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OP_JMP_IABS,"jmp",IABSOLUTE,3,NULL
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OP_ADC_ABS,"adc",ABSOLUTE,3,NULL
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OP_ROR_ABS,"ror",ABSOLUTE,3,emul_ror
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OP_BBR6_REL,"bbr6",ZPR,2,NULL
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OP_BVS_REL,"bvs",RELATIVE,2,NULL
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OP_ADC_IZPY,"adc",IZPY,2,NULL
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OP_ADC_IZP,"adc",IZP,2,NULL
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OP_NOPI_74,"nop",IMPLIED,1,NULL
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OP_STZ_ZPX,"stz",ZPX,2,emul_stz
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OP_ADC_ZPX,"adc",ZPX,2,NULL
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OP_ROR_ZPX,"ror",ZPX,2,emul_ror
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OP_RMB7_ZP,"rmb7",ZP,2,emul_rmb7
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OP_SEI,"sei",IMPLIED,1,NULL
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OP_ADC_ABSY,"adc",ABSOLUTEY,3,NULL
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OP_PLY,"ply",IMPLIED,1,emul_ply
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OP_NOPI_7C,"nop",IMPLIED,1,NULL
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OP_JMP_IABSX,"jmp",IABSOLUTEX,3,NULL
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OP_ADC_ABSX,"adc",ABSOLUTEX,3,NULL
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OP_ROR_ABSX,"ror",ABSOLUTEX,3,emul_ror
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OP_BBR7_REL,"bbr7",ZPR,2,NULL
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OP_BRA_REL,"bra",RELATIVE,2,NULL
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OP_STA_IZPX,"sta",IZPX,2,emul_sta
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OP_NOPI_83,"nop",IMMEDIATE,2,NULL
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OP_NOPI_84,"nop",IMPLIED,1,NULL
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OP_STY_ZP,"sty",ZP,2,emul_sty
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OP_STA_ZP,"sta",ZP,2,emul_sta
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OP_STX_ZP,"stx",ZP,2,emul_stx
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OP_SMB0_ZP,"smb0",ZP,2,NULL
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OP_DEY,"dey",IMPLIED,1,emul_dey
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OP_BIT_IMM,"bit",IMMEDIATE,2,emul_bit
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OP_TXA,"txa",IMPLIED,1,emul_txa
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OP_NOPI_8C,"nop",IMPLIED,1,NULL
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OP_STY_ABS,"sty",ABSOLUTE,3,emul_sty
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OP_STA_ABS,"sta",ABSOLUTE,3,emul_sta
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OP_STX_ABS,"stx",ABSOLUTE,3,emul_stx
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OP_BBS0_REL,"bbs0",ZPR,2,NULL
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OP_BCC_REL,"bcc",RELATIVE,2,NULL
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OP_STA_IZPY,"sta",IZPY,2,emul_sta
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OP_STA_IZP,"sta",IZP,2,emul_sta
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OP_NOPI_94,"nop",IMPLIED,1,NULL
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OP_STY_ZPX,"sty",ZPX,2,emul_sty
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OP_STA_ZPX,"sta",ZPX,2,emul_sta
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OP_STX_ZPY,"stx",ZPY,2,emul_stx
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OP_SMB1_ZP,"smb1",ZP,2,NULL
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OP_TYA,"tya",IMPLIED,1,emul_tya
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OP_STA_ABSY,"sta",ABSOLUTEY,3,emul_sta
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OP_TXS,"txs",IMPLIED,1,emul_txs
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OP_NOPI_9C,"nop",IMPLIED,1,NULL
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OP_STZ_ABS,"stz",ABSOLUTE,3,emul_stz
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OP_STA_ABSX,"sta",ABSOLUTEX,3,emul_sta
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OP_STZ_ABSX,"stz",ABSOLUTEX,3,emul_stz
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OP_BBS1_REL,"bbs1",ZPR,2,NULL
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OP_LDY_IMM,"ldy",IMMEDIATE,2,emul_ldy
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OP_LDA_IZPX,"lda",IZPX,2,emul_lda
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OP_LDX_IMM,"ldx",IMMEDIATE,2,emul_ldx
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OP_NOPI_A4,"nop",IMPLIED,1,NULL
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OP_LDY_ZP,"ldy",ZP,2,emul_ldy
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OP_LDA_ZP,"lda",ZP,2,emul_lda
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OP_LDX_ZP,"ldx",ZP,2,emul_ldx
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OP_SMB2_ZP,"smb2",ZP,2,NULL
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OP_TAY,"tay",IMPLIED,1,emul_tay
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OP_LDA_IMM,"lda",IMMEDIATE,2,emul_lda
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OP_TAX,"tax",IMPLIED,1,emul_tax
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OP_NOPI_AC,"nop",IMPLIED,1,NULL
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OP_LDY_ABS,"ldy",ABSOLUTE,3,emul_ldy
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OP_LDA_ABS,"lda",ABSOLUTE,3,emul_lda
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OP_LDX_ABS,"ldx",ABSOLUTE,3,emul_ldx
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OP_BBS2_REL,"bbs2",ZPR,2,NULL
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OP_BCS_REL,"bcs",RELATIVE,2,NULL
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OP_LDA_IZPY,"lda",IZPY,2,emul_lda
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OP_LDA_IZP,"lda",IZP,2,emul_lda
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OP_NOPI_B4,"nop",IMPLIED,1,NULL
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OP_LDY_ZPX,"ldy",ZPX,2,emul_ldy
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OP_LDA_ZPX,"lda",ZPX,2,emul_lda
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OP_LDX_ZPY,"ldx",ZPY,1,emul_ldx
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OP_SMB3_ZP,"smb3",ZP,2,NULL
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OP_CLV,"clv",IMPLIED,1,NULL
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OP_LDA_ABSY,"lda",ABSOLUTEY,3,emul_lda
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OP_TSX,"tsx",IMPLIED,1,emul_tsx
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OP_NOPI_BC,"nop",IMPLIED,1,NULL
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OP_LDY_ABSX,"ldy",ABSOLUTEX,3,emul_ldy
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OP_LDA_ABSX,"lda",ABSOLUTEX,3,emul_lda
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OP_LDX_ABSY,"ldx",ABSOLUTEY,3,emul_ldx
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OP_BBS3_REL,"bbs3",ZPR,2,NULL
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OP_CPY_IMM,"cpy",IMMEDIATE,2,NULL
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OP_CMP_IZPX,"cmp",IZPX,2,NULL
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OP_NOPI_C3,"nop",IMMEDIATE,2,NULL
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OP_NOPI_C4,"nop",IMPLIED,1,NULL
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OP_CPY_ZP,"cpy",ZP,2,NULL
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OP_CMP_ZP,"cmp",ZP,2,NULL
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OP_DEC_ZP,"dec",ZP,2,emul_dec
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OP_SMB4_ZP,"smb4",ZP,2,NULL
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OP_INY,"iny",IMPLIED,1,emul_iny
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OP_CMP_IMM,"cmp",IMMEDIATE,2,NULL
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OP_DEX,"dex",IMPLIED,1,emul_dex
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OP_WAI,"wai",IMPLIED,1,NULL
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OP_CPY_ABS,"cpy",ABSOLUTE,3,NULL
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OP_CMP_ABS,"cmp",ABSOLUTE,3,NULL
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OP_DEC_ABS,"dec",ABSOLUTE,3,emul_dec
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OP_BBS4_REL,"bbs4",ZPR,2,NULL
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OP_BNE_REL,"bne",RELATIVE,2,NULL
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OP_CMP_IZPY,"cmp",IZPY,2,NULL
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OP_CMP_IZP,"cmp",IZP,2,NULL
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OP_NOPI_D4,"nop",IMPLIED,1,NULL
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OP_NOPI_D5,"nop",ZPX,2,NULL
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OP_CMP_ZPX,"cmp",ZPX,2,NULL
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OP_DEC_ZPX,"dec",ZPX,2,emul_dec
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OP_SMB5_ZP,"smb5",ZP,2,NULL
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OP_CLD,"cld",IMPLIED,1,NULL
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OP_CMP_ABSY,"cmp",ABSOLUTEY,3,NULL
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OP_PHX,"phx",IMPLIED,1,emul_phx
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OP_STP,"stp",IMPLIED,1,emul_stp
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OP_NOPI_DD,"nop",ABSOLUTE,3,NULL
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OP_CMP_ABSX,"cmp",ABSOLUTEX,3,NULL
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OP_DEC_ABSX,"dec",ABSOLUTEX,3,emul_dec
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OP_BBS5_REL,"bbs5",ZPR,2,NULL
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OP_CPX_IMM,"cpx",IMMEDIATE,2,NULL
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OP_SBC_IZPX,"sbc",IZPX,2,NULL
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OP_NOPI_E3,"nop",IMMEDIATE,2,NULL
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OP_NOPI_E4,"nop",IMPLIED,1,NULL
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OP_CPX_ZP,"cpx",ZP,2,NULL
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OP_SBC_ZP,"sbc",ZP,2,NULL
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OP_INC_ZP,"inc",ZP,2,emul_inc
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OP_SMB6_ZP,"smb6",ZP,2,NULL
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OP_INX,"inx",IMPLIED,1,emul_inx
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OP_SBC_IMM,"sbc",IMMEDIATE,2,NULL
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OP_NOP,"nop",IMPLIED,1,emul_nop
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OP_NOPI_EC,"nop",IMPLIED,1,NULL
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OP_CPX_ABS,"cpx",ABSOLUTE,3,NULL
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OP_SBC_ABS,"sbc",ABSOLUTE,3,NULL
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OP_INC_ABS,"inc",ABSOLUTE,3,emul_inc
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OP_BBS6_REL,"bbs6",ZPR,2,NULL
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OP_BEQ_REL,"beq",RELATIVE,2,NULL
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OP_SBC_IZPY,"sbc",IZPY,2,NULL
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OP_SBC_IZP,"sbc",IZP,2,NULL
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OP_NOPI_F4,"nop",IMPLIED,1,NULL
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OP_NOPI_F5,"nop",ZPX,2,NULL
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OP_SBC_ZPX,"sbc",ZPX,2,NULL
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OP_INC_ZPX,"inc",ZPX,2,emul_inc
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OP_SMB7_ZP,"smb7",ZP,2,NULL
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OP_SED,"sed",IMPLIED,1,NULL
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OP_SBC_ABSY,"sbc",ABSOLUTEY,3,NULL
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OP_PLX,"plx",IMPLIED,1,emul_plx
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OP_NOPI_FC,"nop",IMPLIED,1,NULL
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OP_NOPI_FD,"nop",ABSOLUTE,3,NULL
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OP_SBC_ABSX,"sbc",ABSOLUTEX,3,NULL
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OP_INC_ABSX,"inc",ABSOLUTEX,3,emul_inc
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OP_BBS7_REL,"bbs7",ZPR,2,NULL
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opcode_id,mnemonic,addressing,size,emulation,modify_pc
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OP_BRK,"brk",IMPLIED,1,NULL,false
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OP_ORA_IZPX,"ora",IZPX,2,emul_ora,false
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OP_NOPI_3,"nop",IMMEDIATE,2,NULL,false
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OP_NOPI_4,"nop",IMPLIED,1,NULL,false
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OP_TSB_ZP,"tsb",ZP,2,NULL,false
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OP_ORA_ZP,"ora",ZP,2,emul_ora,false
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OP_ASL_ZP,"asl",ZP,2,emul_asl,false
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OP_RMB0_ZP,"rmb0",ZP,2,emul_rmb0,false
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OP_PHP,"php",IMPLIED,1,emul_php,false
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OP_ORA_IMM,"ora",IMMEDIATE,2,emul_ora,false
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OP_ASL,"asl",ACCUMULATOR,1,emul_asl,false
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OP_NOPI_C,"nop",IMPLIED,1,NULL,false
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OP_TSB_ABS,"tsb",ABSOLUTE,3,NULL,false
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OP_ORA_ABS,"ora",ABSOLUTE,3,emul_ora,false
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OP_ASL_ABS,"asl",ABSOLUTE,3,emul_asl,false
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OP_BBR0_REL,"bbr0",ZPR,2,NULL,true
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OP_BPL_REL,"bpl",RELATIVE,2,NULL,true
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OP_ORA_IZPY,"ora",IZPY,2,emul_ora,false
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OP_ORA_IZP,"ora",IZP,2,emul_ora,false
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OP_NOPI_14,"nop",IMPLIED,1,NULL,false
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OP_TRB_ZP,"trb",ZP,2,NULL,false
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OP_ORA_ZPX,"ora",ZPX,2,emul_ora,false
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OP_ASL_ZPX,"asl",ZPX,2,emul_asl,false
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OP_RMB1_ZP,"rmb1",ZP,1,emul_rmb1,false
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OP_CLC,"clc",IMPLIED,1,emul_clc,false
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OP_ORA_ABSY,"ora",ABSOLUTEY,3,emul_ora,false
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OP_INC,"inc",ACCUMULATOR,1,emul_inc,false
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OP_NOPI_1C,"nop",IMPLIED,1,NULL,false
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OP_TRB_ABS,"trb",ABSOLUTE,3,NULL,false
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OP_ORA_ABSX,"ora",ABSOLUTEX,3,emul_ora,false
|
||||
OP_ASL_ABSX,"asl",ABSOLUTEX,3,emul_asl,false
|
||||
OP_BBR1_REL,"bbr1",ZPR,2,NULL,true
|
||||
OP_JSR,"jsr",ABSOLUTE,3,NULL,true
|
||||
OP_AND_IZPX,"and",IZPX,2,emul_and,false
|
||||
OP_NOPI_23,"nop",IMMEDIATE,2,NULL,false
|
||||
OP_NOPI_24,"nop",IMPLIED,1,NULL,false
|
||||
OP_BIT_ZP,"bit",ZP,2,emul_bit,false
|
||||
OP_AND_ZP,"and",ZP,2,emul_and,false
|
||||
OP_ROL_ZP,"rol",ZP,2,emul_rol,false
|
||||
OP_RMB2_ZP,"rmb2",ZP,2,emul_rmb2,false
|
||||
OP_PLP,"plp",IMPLIED,1,emul_plp,false
|
||||
OP_AND_IMM,"and",IMMEDIATE,2,emul_and,false
|
||||
OP_ROL,"rol",ACCUMULATOR,1,emul_rol,false
|
||||
OP_NOPI_2C,"nop",IMPLIED,1,NULL,false
|
||||
OP_BIT_ABS,"bit",ABSOLUTE,3,emul_bit,false
|
||||
OP_AND_ABS,"and",ABSOLUTE,3,emul_and,false
|
||||
OP_ROL_ABS,"rol",ABSOLUTE,3,emul_rol,false
|
||||
OP_BBR2_REL,"bbr2",ZPR,2,NULL,true
|
||||
OP_BMI_REL,"bmi",RELATIVE,2,NULL,true
|
||||
OP_AND_IZPY,"and",IZPY,2,emul_and,false
|
||||
OP_AND_IZP,"and",IZP,2,emul_and,false
|
||||
OP_NOPI_34,"nop",IMPLIED,1,NULL,false
|
||||
OP_BIT_ZPX,"bit",ZPX,2,emul_bit,false
|
||||
OP_AND_ZPX,"and",ZPX,2,emul_and,false
|
||||
OP_ROL_ZPX,"rol",ZPX,2,emul_rol,false
|
||||
OP_RMB3_ZP,"rmb3",ZP,2,emul_rmb3,false
|
||||
OP_SEC,"sec",IMPLIED,1,emul_sec,false
|
||||
OP_AND_ABSY,"and",ABSOLUTEY,3,emul_and,false
|
||||
OP_DEC,"dec",ACCUMULATOR,1,emul_dec,false
|
||||
OP_NOPI_3C,"nop",IMPLIED,1,NULL,false
|
||||
OP_BIT_ABSX,"bit",ABSOLUTEX,3,emul_bit,false
|
||||
OP_AND_ABSX,"and",ABSOLUTEX,3,emul_and,false
|
||||
OP_ROL_ABSX,"rol",ABSOLUTEX,3,emul_rol,false
|
||||
OP_BBR3_REL,"bbr3",ZPR,2,NULL,true
|
||||
OP_RTI,"rti",IMPLIED,1,NULL,false
|
||||
OP_EOR_IZPX,"eor",IZPX,2,emul_eor,false
|
||||
OP_NOPI_43,"nop",IMMEDIATE,2,NULL,false
|
||||
OP_NOPI_44,"nop",IMPLIED,1,NULL,false
|
||||
OP_NOPI_45,"nop",ZP,2,NULL,false
|
||||
OP_EOR_ZP,"eor",ZP,2,emul_eor,false
|
||||
OP_LSR_ZP,"lsr",ZP,2,emul_lsr,false
|
||||
OP_RMB4_ZP,"rmb4",ZP,2,emul_rmb4,false
|
||||
OP_PHA,"pha",IMPLIED,1,emul_pha,false
|
||||
OP_EOR_IMM,"eor",IMMEDIATE,2,emul_eor,false
|
||||
OP_LSR,"lsr",ACCUMULATOR,1,emul_lsr,false
|
||||
OP_NOPI_4C,"nop",IMPLIED,1,NULL,false
|
||||
OP_JMP_ABS,"jmp",ABSOLUTE,3,NULL,true
|
||||
OP_EOR_ABS,"eor",ABSOLUTE,3,emul_eor,false
|
||||
OP_LSR_ABS,"lsr",ABSOLUTE,3,emul_lsr,false
|
||||
OP_BBR4_REL,"bbr4",ZPR,2,NULL,true
|
||||
OP_BVC_REL,"bvc",RELATIVE,2,NULL,true
|
||||
OP_EOR_IZPY,"eor",IZPY,2,emul_eor,false
|
||||
OP_EOR_IZP,"eor",IZP,2,emul_eor,false
|
||||
OP_NOPI_54,"nop",IMPLIED,1,NULL,false
|
||||
OP_NOPI_55,"nop",ZPX,2,NULL,false
|
||||
OP_EOR_ZPX,"eor",ZPX,2,emul_eor,false
|
||||
OP_LSR_ZPX,"lsr",ZPX,2,emul_lsr,false
|
||||
OP_RMB5_ZP,"rmb5",ZP,2,emul_rmb5,false
|
||||
OP_CLI,"cli",IMPLIED,1,NULL,false
|
||||
OP_EOR_ABSY,"eor",ABSOLUTEY,3,emul_eor,false
|
||||
OP_PHY,"phy",IMPLIED,1,emul_phy,false
|
||||
OP_NOPI_5C,"nop",IMPLIED,1,NULL,false
|
||||
OP_NOPI_5D,"nop",ABSOLUTE,3,NULL,false
|
||||
OP_EOR_ABSX,"eor",ABSOLUTEX,3,emul_eor,false
|
||||
OP_LSR_ABSX,"lsr",ABSOLUTEX,3,emul_lsr,false
|
||||
OP_BBR5_REL,"bbr5",ZPR,2,NULL,true
|
||||
OP_RTS,"rts",IMPLIED,1,NULL,false
|
||||
OP_ADC_IZPX,"adc",IZPX,2,NULL,false
|
||||
OP_NOPI_63,"nop",IMMEDIATE,2,NULL,false
|
||||
OP_NOPI_64,"nop",IMPLIED,1,NULL,false
|
||||
OP_STZ_ZP,"stz",ZP,2,emul_stz,false
|
||||
OP_ADC_ZP,"adc",ZP,2,NULL,false
|
||||
OP_ROR_ZP,"ror",ZP,2,emul_ror,false
|
||||
OP_RMB6_ZP,"rmb6",ZP,2,emul_rmb6,false
|
||||
OP_PLA,"pla",IMPLIED,1,emul_pla,false
|
||||
OP_ADC_IMM,"adc",IMMEDIATE,2,NULL,false
|
||||
OP_ROR,"ror",ACCUMULATOR,1,emul_ror,false
|
||||
OP_NOPI_6C,"nop",IMPLIED,1,NULL,false
|
||||
OP_JMP_IABS,"jmp",IABSOLUTE,3,NULL,true
|
||||
OP_ADC_ABS,"adc",ABSOLUTE,3,NULL,false
|
||||
OP_ROR_ABS,"ror",ABSOLUTE,3,emul_ror,false
|
||||
OP_BBR6_REL,"bbr6",ZPR,2,NULL,true
|
||||
OP_BVS_REL,"bvs",RELATIVE,2,NULL,true
|
||||
OP_ADC_IZPY,"adc",IZPY,2,NULL,false
|
||||
OP_ADC_IZP,"adc",IZP,2,NULL,false
|
||||
OP_NOPI_74,"nop",IMPLIED,1,NULL,false
|
||||
OP_STZ_ZPX,"stz",ZPX,2,emul_stz,false
|
||||
OP_ADC_ZPX,"adc",ZPX,2,NULL,false
|
||||
OP_ROR_ZPX,"ror",ZPX,2,emul_ror,false
|
||||
OP_RMB7_ZP,"rmb7",ZP,2,emul_rmb7,false
|
||||
OP_SEI,"sei",IMPLIED,1,NULL,false
|
||||
OP_ADC_ABSY,"adc",ABSOLUTEY,3,NULL,false
|
||||
OP_PLY,"ply",IMPLIED,1,emul_ply,false
|
||||
OP_NOPI_7C,"nop",IMPLIED,1,NULL,false
|
||||
OP_JMP_IABSX,"jmp",IABSOLUTEX,3,NULL,true
|
||||
OP_ADC_ABSX,"adc",ABSOLUTEX,3,NULL,false
|
||||
OP_ROR_ABSX,"ror",ABSOLUTEX,3,emul_ror,false
|
||||
OP_BBR7_REL,"bbr7",ZPR,2,NULL,true
|
||||
OP_BRA_REL,"bra",RELATIVE,2,NULL,true
|
||||
OP_STA_IZPX,"sta",IZPX,2,emul_sta,false
|
||||
OP_NOPI_83,"nop",IMMEDIATE,2,NULL,false
|
||||
OP_NOPI_84,"nop",IMPLIED,1,NULL,false
|
||||
OP_STY_ZP,"sty",ZP,2,emul_sty,false
|
||||
OP_STA_ZP,"sta",ZP,2,emul_sta,false
|
||||
OP_STX_ZP,"stx",ZP,2,emul_stx,false
|
||||
OP_SMB0_ZP,"smb0",ZP,2,NULL,false
|
||||
OP_DEY,"dey",IMPLIED,1,emul_dey,false
|
||||
OP_BIT_IMM,"bit",IMMEDIATE,2,emul_bit,false
|
||||
OP_TXA,"txa",IMPLIED,1,emul_txa,false
|
||||
OP_NOPI_8C,"nop",IMPLIED,1,NULL,false
|
||||
OP_STY_ABS,"sty",ABSOLUTE,3,emul_sty,false
|
||||
OP_STA_ABS,"sta",ABSOLUTE,3,emul_sta,false
|
||||
OP_STX_ABS,"stx",ABSOLUTE,3,emul_stx,false
|
||||
OP_BBS0_REL,"bbs0",ZPR,2,NULL,true
|
||||
OP_BCC_REL,"bcc",RELATIVE,2,NULL,true
|
||||
OP_STA_IZPY,"sta",IZPY,2,emul_sta,false
|
||||
OP_STA_IZP,"sta",IZP,2,emul_sta,false
|
||||
OP_NOPI_94,"nop",IMPLIED,1,NULL,false
|
||||
OP_STY_ZPX,"sty",ZPX,2,emul_sty,false
|
||||
OP_STA_ZPX,"sta",ZPX,2,emul_sta,false
|
||||
OP_STX_ZPY,"stx",ZPY,2,emul_stx,false
|
||||
OP_SMB1_ZP,"smb1",ZP,2,NULL,false
|
||||
OP_TYA,"tya",IMPLIED,1,emul_tya,false
|
||||
OP_STA_ABSY,"sta",ABSOLUTEY,3,emul_sta,false
|
||||
OP_TXS,"txs",IMPLIED,1,emul_txs,false
|
||||
OP_NOPI_9C,"nop",IMPLIED,1,NULL,false
|
||||
OP_STZ_ABS,"stz",ABSOLUTE,3,emul_stz,false
|
||||
OP_STA_ABSX,"sta",ABSOLUTEX,3,emul_sta,false
|
||||
OP_STZ_ABSX,"stz",ABSOLUTEX,3,emul_stz,false
|
||||
OP_BBS1_REL,"bbs1",ZPR,2,NULL,true
|
||||
OP_LDY_IMM,"ldy",IMMEDIATE,2,emul_ldy,false
|
||||
OP_LDA_IZPX,"lda",IZPX,2,emul_lda,false
|
||||
OP_LDX_IMM,"ldx",IMMEDIATE,2,emul_ldx,false
|
||||
OP_NOPI_A4,"nop",IMPLIED,1,NULL,false
|
||||
OP_LDY_ZP,"ldy",ZP,2,emul_ldy,false
|
||||
OP_LDA_ZP,"lda",ZP,2,emul_lda,false
|
||||
OP_LDX_ZP,"ldx",ZP,2,emul_ldx,false
|
||||
OP_SMB2_ZP,"smb2",ZP,2,NULL,false
|
||||
OP_TAY,"tay",IMPLIED,1,emul_tay,false
|
||||
OP_LDA_IMM,"lda",IMMEDIATE,2,emul_lda,false
|
||||
OP_TAX,"tax",IMPLIED,1,emul_tax,false
|
||||
OP_NOPI_AC,"nop",IMPLIED,1,NULL,false
|
||||
OP_LDY_ABS,"ldy",ABSOLUTE,3,emul_ldy,false
|
||||
OP_LDA_ABS,"lda",ABSOLUTE,3,emul_lda,false
|
||||
OP_LDX_ABS,"ldx",ABSOLUTE,3,emul_ldx,false
|
||||
OP_BBS2_REL,"bbs2",ZPR,2,NULL,true
|
||||
OP_BCS_REL,"bcs",RELATIVE,2,NULL,true
|
||||
OP_LDA_IZPY,"lda",IZPY,2,emul_lda,false
|
||||
OP_LDA_IZP,"lda",IZP,2,emul_lda,false
|
||||
OP_NOPI_B4,"nop",IMPLIED,1,NULL,false
|
||||
OP_LDY_ZPX,"ldy",ZPX,2,emul_ldy,false
|
||||
OP_LDA_ZPX,"lda",ZPX,2,emul_lda,false
|
||||
OP_LDX_ZPY,"ldx",ZPY,1,emul_ldx,false
|
||||
OP_SMB3_ZP,"smb3",ZP,2,NULL,false
|
||||
OP_CLV,"clv",IMPLIED,1,NULL,false
|
||||
OP_LDA_ABSY,"lda",ABSOLUTEY,3,emul_lda,false
|
||||
OP_TSX,"tsx",IMPLIED,1,emul_tsx,false
|
||||
OP_NOPI_BC,"nop",IMPLIED,1,NULL,false
|
||||
OP_LDY_ABSX,"ldy",ABSOLUTEX,3,emul_ldy,false
|
||||
OP_LDA_ABSX,"lda",ABSOLUTEX,3,emul_lda,false
|
||||
OP_LDX_ABSY,"ldx",ABSOLUTEY,3,emul_ldx,false
|
||||
OP_BBS3_REL,"bbs3",ZPR,2,NULL,true
|
||||
OP_CPY_IMM,"cpy",IMMEDIATE,2,NULL,false
|
||||
OP_CMP_IZPX,"cmp",IZPX,2,NULL,false
|
||||
OP_NOPI_C3,"nop",IMMEDIATE,2,NULL,false
|
||||
OP_NOPI_C4,"nop",IMPLIED,1,NULL,false
|
||||
OP_CPY_ZP,"cpy",ZP,2,NULL,false
|
||||
OP_CMP_ZP,"cmp",ZP,2,NULL,false
|
||||
OP_DEC_ZP,"dec",ZP,2,emul_dec,false
|
||||
OP_SMB4_ZP,"smb4",ZP,2,NULL,false
|
||||
OP_INY,"iny",IMPLIED,1,emul_iny,false
|
||||
OP_CMP_IMM,"cmp",IMMEDIATE,2,NULL,false
|
||||
OP_DEX,"dex",IMPLIED,1,emul_dex,false
|
||||
OP_WAI,"wai",IMPLIED,1,NULL,false
|
||||
OP_CPY_ABS,"cpy",ABSOLUTE,3,NULL,false
|
||||
OP_CMP_ABS,"cmp",ABSOLUTE,3,NULL,false
|
||||
OP_DEC_ABS,"dec",ABSOLUTE,3,emul_dec,false
|
||||
OP_BBS4_REL,"bbs4",ZPR,2,NULL,true
|
||||
OP_BNE_REL,"bne",RELATIVE,2,NULL,true
|
||||
OP_CMP_IZPY,"cmp",IZPY,2,NULL,false
|
||||
OP_CMP_IZP,"cmp",IZP,2,NULL,false
|
||||
OP_NOPI_D4,"nop",IMPLIED,1,NULL,false
|
||||
OP_NOPI_D5,"nop",ZPX,2,NULL,false
|
||||
OP_CMP_ZPX,"cmp",ZPX,2,NULL,false
|
||||
OP_DEC_ZPX,"dec",ZPX,2,emul_dec,false
|
||||
OP_SMB5_ZP,"smb5",ZP,2,NULL,false
|
||||
OP_CLD,"cld",IMPLIED,1,NULL,false
|
||||
OP_CMP_ABSY,"cmp",ABSOLUTEY,3,NULL,false
|
||||
OP_PHX,"phx",IMPLIED,1,emul_phx,false
|
||||
OP_STP,"stp",IMPLIED,1,emul_stp,false
|
||||
OP_NOPI_DD,"nop",ABSOLUTE,3,NULL,false
|
||||
OP_CMP_ABSX,"cmp",ABSOLUTEX,3,NULL,false
|
||||
OP_DEC_ABSX,"dec",ABSOLUTEX,3,emul_dec,false
|
||||
OP_BBS5_REL,"bbs5",ZPR,2,NULL,true
|
||||
OP_CPX_IMM,"cpx",IMMEDIATE,2,NULL,false
|
||||
OP_SBC_IZPX,"sbc",IZPX,2,NULL,false
|
||||
OP_NOPI_E3,"nop",IMMEDIATE,2,NULL,false
|
||||
OP_NOPI_E4,"nop",IMPLIED,1,NULL,false
|
||||
OP_CPX_ZP,"cpx",ZP,2,NULL,false
|
||||
OP_SBC_ZP,"sbc",ZP,2,NULL,false
|
||||
OP_INC_ZP,"inc",ZP,2,emul_inc,false
|
||||
OP_SMB6_ZP,"smb6",ZP,2,NULL,false
|
||||
OP_INX,"inx",IMPLIED,1,emul_inx,false
|
||||
OP_SBC_IMM,"sbc",IMMEDIATE,2,NULL,false
|
||||
OP_NOP,"nop",IMPLIED,1,emul_nop,false
|
||||
OP_NOPI_EC,"nop",IMPLIED,1,NULL,false
|
||||
OP_CPX_ABS,"cpx",ABSOLUTE,3,NULL,false
|
||||
OP_SBC_ABS,"sbc",ABSOLUTE,3,NULL,false
|
||||
OP_INC_ABS,"inc",ABSOLUTE,3,emul_inc,false
|
||||
OP_BBS6_REL,"bbs6",ZPR,2,NULL,true
|
||||
OP_BEQ_REL,"beq",RELATIVE,2,NULL,true
|
||||
OP_SBC_IZPY,"sbc",IZPY,2,NULL,false
|
||||
OP_SBC_IZP,"sbc",IZP,2,NULL,false
|
||||
OP_NOPI_F4,"nop",IMPLIED,1,NULL,false
|
||||
OP_NOPI_F5,"nop",ZPX,2,NULL,false
|
||||
OP_SBC_ZPX,"sbc",ZPX,2,NULL,false
|
||||
OP_INC_ZPX,"inc",ZPX,2,emul_inc,false
|
||||
OP_SMB7_ZP,"smb7",ZP,2,NULL,false
|
||||
OP_SED,"sed",IMPLIED,1,NULL,false
|
||||
OP_SBC_ABSY,"sbc",ABSOLUTEY,3,NULL,false
|
||||
OP_PLX,"plx",IMPLIED,1,emul_plx,false
|
||||
OP_NOPI_FC,"nop",IMPLIED,1,NULL,false
|
||||
OP_NOPI_FD,"nop",ABSOLUTE,3,NULL,false
|
||||
OP_SBC_ABSX,"sbc",ABSOLUTEX,3,NULL,false
|
||||
OP_INC_ABSX,"inc",ABSOLUTEX,3,emul_inc,false
|
||||
OP_BBS7_REL,"bbs7",ZPR,2,NULL,true
|
||||
|
|
@ -327,3 +327,10 @@ program_counter_increment(rk65c02emu_t *e, instrdef_t *id)
|
||||
e->regs.PC += id->size;
|
||||
}
|
||||
|
||||
/* check whether given instruction modify program counter */
|
||||
bool
|
||||
instruction_modify_pc(instrdef_t *id)
|
||||
{
|
||||
return id->modify_pc;
|
||||
}
|
||||
|
||||
|
@ -31,11 +31,12 @@ struct instruction {
|
||||
typedef struct instruction instruction_t;
|
||||
|
||||
struct instrdef {
|
||||
uint8_t opcode;
|
||||
uint8_t opcode; /* opcode, normally same as in instruction */
|
||||
const char *mnemonic;
|
||||
addressing_t mode;
|
||||
uint8_t size;
|
||||
void (*emul)(rk65c02emu_t *e, void *id, instruction_t *i);
|
||||
bool modify_pc;
|
||||
};
|
||||
|
||||
typedef struct instrdef instrdef_t;
|
||||
@ -51,5 +52,6 @@ void instruction_status_adjust_negative(rk65c02emu_t *, uint8_t);
|
||||
void stack_push(rk65c02emu_t *, uint8_t);
|
||||
uint8_t stack_pop(rk65c02emu_t *);
|
||||
void program_counter_increment(rk65c02emu_t *, instrdef_t *);
|
||||
bool instruction_modify_pc(instrdef_t *);
|
||||
|
||||
#endif /* _INSTRUCTION_H_ */
|
||||
|
@ -46,8 +46,8 @@ rk65c02_exec(rk65c02emu_t *e)
|
||||
|
||||
if (id.emul != NULL) {
|
||||
id.emul(e, &id, &i);
|
||||
/* if (!instruction_modify_pc) */
|
||||
program_counter_increment(e, &id);
|
||||
if (!instruction_modify_pc(&id))
|
||||
program_counter_increment(e, &id);
|
||||
} else {
|
||||
printf("unimplemented opcode %X @ %X\n", i.opcode,
|
||||
e->regs.PC);
|
||||
|
Loading…
x
Reference in New Issue
Block a user