From 28a5d54510f9d2fbb12d10f89bf90bdf99f16cf6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rados=C5=82aw=20Kujawa?= Date: Fri, 27 Jan 2017 17:14:56 +0100 Subject: [PATCH] Add ASL and LSR emulation. --- src/65c02isa.csv | 20 ++++++++++---------- src/emulation.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 10 deletions(-) diff --git a/src/65c02isa.csv b/src/65c02isa.csv index 84c1d6f..70c4b08 100644 --- a/src/65c02isa.csv +++ b/src/65c02isa.csv @@ -5,15 +5,15 @@ OP_NOPI_3,"nop",IMMEDIATE,2,NULL OP_NOPI_4,"nop",IMPLIED,1,NULL OP_TSB_ZP,"tsb",ZP,2,NULL OP_ORA_ZP,"ora",ZP,2,emul_ora -OP_ASL_ZP,"asl",ZP,2,NULL +OP_ASL_ZP,"asl",ZP,2,emul_asl OP_RMB0_ZP,"rmb0",ZP,2,emul_rmb0 OP_PHP,"php",IMPLIED,1,emul_php OP_ORA_IMM,"ora",IMMEDIATE,2,emul_ora -OP_ASL,"asl",ACCUMULATOR,1,NULL +OP_ASL,"asl",ACCUMULATOR,1,emul_asl OP_NOPI_C,"nop",IMPLIED,1,NULL OP_TSB_ABS,"tsb",ABSOLUTE,3,NULL OP_ORA_ABS,"ora",ABSOLUTE,3,emul_ora -OP_ASL_ABS,"asl",ABSOLUTE,3,NULL +OP_ASL_ABS,"asl",ABSOLUTE,3,emul_asl OP_BBR0_REL,"bbr0",ZPR,2,NULL OP_BPL_REL,"bpl",RELATIVE,2,NULL OP_ORA_IZPY,"ora",IZPY,2,emul_ora @@ -21,7 +21,7 @@ OP_ORA_IZP,"ora",IZP,2,emul_ora OP_NOPI_14,"nop",IMPLIED,1,NULL OP_TRB_ZP,"trb",ZP,2,NULL OP_ORA_ZPX,"ora",ZPX,2,emul_ora -OP_ASL_ZPX,"asl",ZPX,2,NULL +OP_ASL_ZPX,"asl",ZPX,2,emul_asl OP_RMB1_ZP,"rmb1",ZP,1,emul_rmb1 OP_CLC,"clc",IMPLIED,1,emul_clc OP_ORA_ABSY,"ora",ABSOLUTEY,3,emul_ora @@ -29,7 +29,7 @@ OP_INC,"inc",ACCUMULATOR,1,emul_inc OP_NOPI_1C,"nop",IMPLIED,1,NULL OP_TRB_ABS,"trb",ABSOLUTE,3,NULL OP_ORA_ABSX,"ora",ABSOLUTEX,3,emul_ora -OP_ASL_ABSX,"asl",ABSOLUTEX,3,NULL +OP_ASL_ABSX,"asl",ABSOLUTEX,3,emul_asl OP_BBR1_REL,"bbr1",ZPR,2,NULL OP_JSR,"jsr",ABSOLUTE,3,NULL OP_AND_IZPX,"and",IZPX,2,emul_and @@ -69,15 +69,15 @@ OP_NOPI_43,"nop",IMMEDIATE,2,NULL OP_NOPI_44,"nop",IMPLIED,1,NULL OP_NOPI_45,"nop",ZP,2,NULL OP_EOR_ZP,"eor",ZP,2,emul_eor -OP_LSR_ZP,"lsr",ZP,2,NULL +OP_LSR_ZP,"lsr",ZP,2,emul_lsr OP_RMB4_ZP,"rmb4",ZP,2,emul_rmb4 OP_PHA,"pha",IMPLIED,1,emul_pha OP_EOR_IMM,"eor",IMMEDIATE,2,emul_eor -OP_LSR,"lsr",ACCUMULATOR,1,NULL +OP_LSR,"lsr",ACCUMULATOR,1,emul_lsr OP_NOPI_4C,"nop",IMPLIED,1,NULL OP_JMP_ABS,"jmp",ABSOLUTE,3,NULL OP_EOR_ABS,"eor",ABSOLUTE,3,emul_eor -OP_LSR_ABS,"lsr",ABSOLUTE,3,NULL +OP_LSR_ABS,"lsr",ABSOLUTE,3,emul_lsr OP_BBR4_REL,"bbr4",ZPR,2,NULL OP_BVC_REL,"bvc",RELATIVE,2,NULL OP_EOR_IZPY,"eor",IZPY,2,emul_eor @@ -85,7 +85,7 @@ OP_EOR_IZP,"eor",IZP,2,emul_eor OP_NOPI_54,"nop",IMPLIED,1,NULL OP_NOPI_55,"nop",ZPX,2,NULL OP_EOR_ZPX,"eor",ZPX,2,emul_eor -OP_LSR_ZPX,"lsr",ZPX,2,NULL +OP_LSR_ZPX,"lsr",ZPX,2,emul_lsr OP_RMB5_ZP,"rmb5",ZP,2,emul_rmb5 OP_CLI,"cli",IMPLIED,1,NULL OP_EOR_ABSY,"eor",ABSOLUTEY,3,emul_eor @@ -93,7 +93,7 @@ OP_PHY,"phy",IMPLIED,1,emul_phy OP_NOPI_5C,"nop",IMPLIED,1,NULL OP_NOPI_5D,"nop",ABSOLUTE,3,NULL OP_EOR_ABSX,"eor",ABSOLUTEX,3,emul_eor -OP_LSR_ABSX,"lsr",ABSOLUTEX,3,NULL +OP_LSR_ABSX,"lsr",ABSOLUTEX,3,emul_lsr OP_BBR5_REL,"bbr5",ZPR,2,NULL OP_RTS,"rts",IMPLIED,1,NULL OP_ADC_IZPX,"adc",IZPX,2,NULL diff --git a/src/emulation.c b/src/emulation.c index 0dce2f8..77c8221 100644 --- a/src/emulation.c +++ b/src/emulation.c @@ -17,6 +17,32 @@ emul_and(rk65c02emu_t *e, void *id, instruction_t *i) instruction_status_adjust_negative(e, e->regs.A); } +/* ASL - shift left one bit */ +void +emul_asl(rk65c02emu_t *e, void *id, instruction_t *i) +{ + bool ncarry; + uint8_t val; + + ncarry = false; + + val = instruction_data_read_1(e, (instrdef_t *) id, i); + + /* carry flag value equals contents of bit 7 */ + if (val & 0x80) + e->regs.P |= P_CARRY; + else + e->regs.P &= ~P_CARRY; + + /* shift left by one bit */ + val <<= 1; + + instruction_status_adjust_zero(e, val); + instruction_status_adjust_negative(e, val); + + instruction_data_write_1(e, (instrdef_t *) id, i, val); +} + /* BIT - check if one or more bits are set */ void emul_bit(rk65c02emu_t *e, void *id, instruction_t *i) @@ -158,6 +184,29 @@ emul_ldy(rk65c02emu_t *e, void *id, instruction_t *i) instruction_status_adjust_negative(e, e->regs.Y); } +/* LSR - shift right one bit */ +void +emul_lsr(rk65c02emu_t *e, void *id, instruction_t *i) +{ + uint8_t val; + + val = instruction_data_read_1(e, (instrdef_t *) id, i); + + /* carry flag value equals contents of bit 0 */ + if (val & 0x1) + e->regs.P |= P_CARRY; + else + e->regs.P &= ~P_CARRY; + + /* shift right by one bit */ + val >>= 1; + + instruction_status_adjust_zero(e, val); + /* XXX: cannot ever be negative */ + instruction_status_adjust_negative(e, val); + + instruction_data_write_1(e, (instrdef_t *) id, i, val); +} /* NOP - do nothing */ void emul_nop(rk65c02emu_t *e, void *id, instruction_t *i)