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mirror of https://github.com/rkujawa/rk65c02.git synced 2024-12-13 01:29:57 +00:00

Add emulation of branch instructions.

This commit is contained in:
Radosław Kujawa 2017-01-29 13:57:51 +01:00
parent 79b5a01d10
commit 3c5162b0b9
2 changed files with 97 additions and 9 deletions

View File

@ -15,7 +15,7 @@ OP_TSB_ABS,"tsb",ABSOLUTE,3,NULL,false
OP_ORA_ABS,"ora",ABSOLUTE,3,emul_ora,false
OP_ASL_ABS,"asl",ABSOLUTE,3,emul_asl,false
OP_BBR0_REL,"bbr0",ZPR,2,NULL,true
OP_BPL_REL,"bpl",RELATIVE,2,NULL,true
OP_BPL_REL,"bpl",RELATIVE,2,emul_bpl,true
OP_ORA_IZPY,"ora",IZPY,2,emul_ora,false
OP_ORA_IZP,"ora",IZP,2,emul_ora,false
OP_NOPI_14,"nop",IMPLIED,1,NULL,false
@ -47,7 +47,7 @@ OP_BIT_ABS,"bit",ABSOLUTE,3,emul_bit,false
OP_AND_ABS,"and",ABSOLUTE,3,emul_and,false
OP_ROL_ABS,"rol",ABSOLUTE,3,emul_rol,false
OP_BBR2_REL,"bbr2",ZPR,2,NULL,true
OP_BMI_REL,"bmi",RELATIVE,2,NULL,true
OP_BMI_REL,"bmi",RELATIVE,2,emul_bmi,true
OP_AND_IZPY,"and",IZPY,2,emul_and,false
OP_AND_IZP,"and",IZP,2,emul_and,false
OP_NOPI_34,"nop",IMPLIED,1,NULL,false
@ -79,7 +79,7 @@ OP_JMP_ABS,"jmp",ABSOLUTE,3,emul_jmp,true
OP_EOR_ABS,"eor",ABSOLUTE,3,emul_eor,false
OP_LSR_ABS,"lsr",ABSOLUTE,3,emul_lsr,false
OP_BBR4_REL,"bbr4",ZPR,2,NULL,true
OP_BVC_REL,"bvc",RELATIVE,2,NULL,true
OP_BVC_REL,"bvc",RELATIVE,2,emul_bvc,true
OP_EOR_IZPY,"eor",IZPY,2,emul_eor,false
OP_EOR_IZP,"eor",IZP,2,emul_eor,false
OP_NOPI_54,"nop",IMPLIED,1,NULL,false
@ -111,7 +111,7 @@ OP_JMP_IABS,"jmp",IABSOLUTE,3,emul_jmp,true
OP_ADC_ABS,"adc",ABSOLUTE,3,NULL,false
OP_ROR_ABS,"ror",ABSOLUTE,3,emul_ror,false
OP_BBR6_REL,"bbr6",ZPR,2,NULL,true
OP_BVS_REL,"bvs",RELATIVE,2,NULL,true
OP_BVS_REL,"bvs",RELATIVE,2,emul_bvs,true
OP_ADC_IZPY,"adc",IZPY,2,NULL,false
OP_ADC_IZP,"adc",IZP,2,NULL,false
OP_NOPI_74,"nop",IMPLIED,1,NULL,false
@ -127,7 +127,7 @@ OP_JMP_IABSX,"jmp",IABSOLUTEX,3,emul_jmp,true
OP_ADC_ABSX,"adc",ABSOLUTEX,3,NULL,false
OP_ROR_ABSX,"ror",ABSOLUTEX,3,emul_ror,false
OP_BBR7_REL,"bbr7",ZPR,2,NULL,true
OP_BRA_REL,"bra",RELATIVE,2,NULL,true
OP_BRA_REL,"bra",RELATIVE,2,emul_bra,true
OP_STA_IZPX,"sta",IZPX,2,emul_sta,false
OP_NOPI_83,"nop",IMMEDIATE,2,NULL,false
OP_NOPI_84,"nop",IMPLIED,1,NULL,false
@ -143,7 +143,7 @@ OP_STY_ABS,"sty",ABSOLUTE,3,emul_sty,false
OP_STA_ABS,"sta",ABSOLUTE,3,emul_sta,false
OP_STX_ABS,"stx",ABSOLUTE,3,emul_stx,false
OP_BBS0_REL,"bbs0",ZPR,2,NULL,true
OP_BCC_REL,"bcc",RELATIVE,2,NULL,true
OP_BCC_REL,"bcc",RELATIVE,2,emul_bcc,true
OP_STA_IZPY,"sta",IZPY,2,emul_sta,false
OP_STA_IZP,"sta",IZP,2,emul_sta,false
OP_NOPI_94,"nop",IMPLIED,1,NULL,false
@ -175,7 +175,7 @@ OP_LDY_ABS,"ldy",ABSOLUTE,3,emul_ldy,false
OP_LDA_ABS,"lda",ABSOLUTE,3,emul_lda,false
OP_LDX_ABS,"ldx",ABSOLUTE,3,emul_ldx,false
OP_BBS2_REL,"bbs2",ZPR,2,NULL,true
OP_BCS_REL,"bcs",RELATIVE,2,NULL,true
OP_BCS_REL,"bcs",RELATIVE,2,emul_bcs,true
OP_LDA_IZPY,"lda",IZPY,2,emul_lda,false
OP_LDA_IZP,"lda",IZP,2,emul_lda,false
OP_NOPI_B4,"nop",IMPLIED,1,NULL,false
@ -207,7 +207,7 @@ OP_CPY_ABS,"cpy",ABSOLUTE,3,emul_cpy,false
OP_CMP_ABS,"cmp",ABSOLUTE,3,emul_cmp,false
OP_DEC_ABS,"dec",ABSOLUTE,3,emul_dec,false
OP_BBS4_REL,"bbs4",ZPR,2,NULL,true
OP_BNE_REL,"bne",RELATIVE,2,NULL,true
OP_BNE_REL,"bne",RELATIVE,2,emul_bne,true
OP_CMP_IZPY,"cmp",IZPY,2,emul_cmp,false
OP_CMP_IZP,"cmp",IZP,2,emul_cmp,false
OP_NOPI_D4,"nop",IMPLIED,1,NULL,false
@ -239,7 +239,7 @@ OP_CPX_ABS,"cpx",ABSOLUTE,3,emul_cpx,false
OP_SBC_ABS,"sbc",ABSOLUTE,3,NULL,false
OP_INC_ABS,"inc",ABSOLUTE,3,emul_inc,false
OP_BBS6_REL,"bbs6",ZPR,2,NULL,true
OP_BEQ_REL,"beq",RELATIVE,2,NULL,true
OP_BEQ_REL,"beq",RELATIVE,2,emul_beq,true
OP_SBC_IZPY,"sbc",IZPY,2,NULL,false
OP_SBC_IZP,"sbc",IZP,2,NULL,false
OP_NOPI_F4,"nop",IMPLIED,1,NULL,false

1 opcode_id mnemonic addressing size emulation modify_pc
15 OP_ORA_ABS ora ABSOLUTE 3 emul_ora false
16 OP_ASL_ABS asl ABSOLUTE 3 emul_asl false
17 OP_BBR0_REL bbr0 ZPR 2 NULL true
18 OP_BPL_REL bpl RELATIVE 2 NULL emul_bpl true
19 OP_ORA_IZPY ora IZPY 2 emul_ora false
20 OP_ORA_IZP ora IZP 2 emul_ora false
21 OP_NOPI_14 nop IMPLIED 1 NULL false
47 OP_AND_ABS and ABSOLUTE 3 emul_and false
48 OP_ROL_ABS rol ABSOLUTE 3 emul_rol false
49 OP_BBR2_REL bbr2 ZPR 2 NULL true
50 OP_BMI_REL bmi RELATIVE 2 NULL emul_bmi true
51 OP_AND_IZPY and IZPY 2 emul_and false
52 OP_AND_IZP and IZP 2 emul_and false
53 OP_NOPI_34 nop IMPLIED 1 NULL false
79 OP_EOR_ABS eor ABSOLUTE 3 emul_eor false
80 OP_LSR_ABS lsr ABSOLUTE 3 emul_lsr false
81 OP_BBR4_REL bbr4 ZPR 2 NULL true
82 OP_BVC_REL bvc RELATIVE 2 NULL emul_bvc true
83 OP_EOR_IZPY eor IZPY 2 emul_eor false
84 OP_EOR_IZP eor IZP 2 emul_eor false
85 OP_NOPI_54 nop IMPLIED 1 NULL false
111 OP_ADC_ABS adc ABSOLUTE 3 NULL false
112 OP_ROR_ABS ror ABSOLUTE 3 emul_ror false
113 OP_BBR6_REL bbr6 ZPR 2 NULL true
114 OP_BVS_REL bvs RELATIVE 2 NULL emul_bvs true
115 OP_ADC_IZPY adc IZPY 2 NULL false
116 OP_ADC_IZP adc IZP 2 NULL false
117 OP_NOPI_74 nop IMPLIED 1 NULL false
127 OP_ADC_ABSX adc ABSOLUTEX 3 NULL false
128 OP_ROR_ABSX ror ABSOLUTEX 3 emul_ror false
129 OP_BBR7_REL bbr7 ZPR 2 NULL true
130 OP_BRA_REL bra RELATIVE 2 NULL emul_bra true
131 OP_STA_IZPX sta IZPX 2 emul_sta false
132 OP_NOPI_83 nop IMMEDIATE 2 NULL false
133 OP_NOPI_84 nop IMPLIED 1 NULL false
143 OP_STA_ABS sta ABSOLUTE 3 emul_sta false
144 OP_STX_ABS stx ABSOLUTE 3 emul_stx false
145 OP_BBS0_REL bbs0 ZPR 2 NULL true
146 OP_BCC_REL bcc RELATIVE 2 NULL emul_bcc true
147 OP_STA_IZPY sta IZPY 2 emul_sta false
148 OP_STA_IZP sta IZP 2 emul_sta false
149 OP_NOPI_94 nop IMPLIED 1 NULL false
175 OP_LDA_ABS lda ABSOLUTE 3 emul_lda false
176 OP_LDX_ABS ldx ABSOLUTE 3 emul_ldx false
177 OP_BBS2_REL bbs2 ZPR 2 NULL true
178 OP_BCS_REL bcs RELATIVE 2 NULL emul_bcs true
179 OP_LDA_IZPY lda IZPY 2 emul_lda false
180 OP_LDA_IZP lda IZP 2 emul_lda false
181 OP_NOPI_B4 nop IMPLIED 1 NULL false
207 OP_CMP_ABS cmp ABSOLUTE 3 emul_cmp false
208 OP_DEC_ABS dec ABSOLUTE 3 emul_dec false
209 OP_BBS4_REL bbs4 ZPR 2 NULL true
210 OP_BNE_REL bne RELATIVE 2 NULL emul_bne true
211 OP_CMP_IZPY cmp IZPY 2 emul_cmp false
212 OP_CMP_IZP cmp IZP 2 emul_cmp false
213 OP_NOPI_D4 nop IMPLIED 1 NULL false
239 OP_SBC_ABS sbc ABSOLUTE 3 NULL false
240 OP_INC_ABS inc ABSOLUTE 3 emul_inc false
241 OP_BBS6_REL bbs6 ZPR 2 NULL true
242 OP_BEQ_REL beq RELATIVE 2 NULL emul_beq true
243 OP_SBC_IZPY sbc IZPY 2 NULL false
244 OP_SBC_IZP sbc IZP 2 NULL false
245 OP_NOPI_F4 nop IMPLIED 1 NULL false

View File

@ -65,6 +65,94 @@ emul_bit(rk65c02emu_t *e, void *id, instruction_t *i)
e->regs.P &= ~P_NEGATIVE;
}
/* BCC - branch on carry clear */
void
emul_bcc(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (!(e->regs.P & P_CARRY))
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BCS - branch on carry set */
void
emul_bcs(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (e->regs.P & P_CARRY)
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BEQ - branch on equal */
void
emul_beq(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (e->regs.P & P_ZERO)
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BMI - branch on result minus */
void
emul_bmi(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (e->regs.P & P_NEGATIVE)
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BNE - branch on not equal */
void
emul_bne(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (!(e->regs.P & P_ZERO))
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BPL - branch on result plus */
void
emul_bpl(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (!(e->regs.P & P_NEGATIVE))
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BRA - branch always */
void
emul_bra(rk65c02emu_t *e, void *id, instruction_t *i)
{
program_counter_branch(e, (int8_t) i->op1);
}
/* BVC - branch on overflow clear */
void
emul_bvc(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (!(e->regs.P & P_SIGN_OVERFLOW))
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* BVS - branch on overflow set */
void
emul_bvs(rk65c02emu_t *e, void *id, instruction_t *i)
{
if (e->regs.P & P_SIGN_OVERFLOW)
program_counter_branch(e, (int8_t) i->op1);
else
program_counter_increment(e, id);
}
/* CLC - clear carry flag */
void
emul_clc(rk65c02emu_t *e, void *id, instruction_t *i)