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Handle accessing bus in zero page relative mode just as in zero page.

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It should make things less awkward and still work fine, as the only
instructions using this mode are BBS and BBR. These only use first
operand as the address in zero page to read data from.
This commit is contained in:
Radosław Kujawa 2017-02-13 18:37:14 +01:00
parent 0cbbce4eeb
commit 8de5574aab
1 changed files with 2 additions and 14 deletions
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16
src/instruction.c
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@ -252,6 +252,7 @@ instruction_data_write_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i, uint
switch (id->mode) {
case ZP:
case ZPR:
bus_write_1(e->bus, i->op1, val);
break;
case ZPX:
@ -290,13 +291,6 @@ instruction_data_write_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i, uint
case ACCUMULATOR:
e->regs.A = val;
break;
case ZPR:
/*
* This mode is special as both operands have separate meaning.
* Handled withing emulation, as it is used only by BBS and BBR.
*/
assert(false);
break;
case IMMEDIATE:
case RELATIVE:
case IABSOLUTE:
@ -329,6 +323,7 @@ instruction_data_read_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
rv = i->op1;
break;
case ZP:
case ZPR:
rv = bus_read_1(e->bus, i->op1);
break;
case ZPX:
@ -364,13 +359,6 @@ instruction_data_read_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
case ABSOLUTEY:
rv = bus_read_1(e->bus, (i->op1 + (i->op2 << 8)) + e->regs.Y);
break;
case ZPR:
/*
* This mode is special as both operands have separate meaning.
* Handled withing emulation, as it is used only by BBS and BBR.
*/
assert(false);
break;
case IABSOLUTE:
case IABSOLUTEX:
case RELATIVE: