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MIT License
GNU GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
Copyright (c) 2017 Radosław Kujawa
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<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<https://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<https://www.gnu.org/licenses/why-not-lgpl.html>.

26
README.md
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@ -1,5 +1,27 @@
# rk65c02
65C02 code interpreter/emulator/disassembler (work in progress)
65C02 code interpreter/emulator/disassembler.
![rk65c02 logo](http://c0ff33.net/drop/rk65c02_small.png)
![rk65c02 logo](https://raw.githubusercontent.com/rkujawa/rk65c02/master/res/rk65c02_small.png)
This project provides a library implementing a farily complete
emulator of WDC 65C02S CPU. It does not aim to be cycle-exact emulator, but
otherwise it tries to mimic behaviour of 65C02S as close as possible.
Currently, the following features are implemented:
- Emulation of all opcodes, including WDC extensions and BCD mode.
- 16-bit address space.
- Minimal support for interrupts.
The following notable features are missing:
- Ability to execute callbacks in software utilizing this library.
- Just-in-Time translation.
The only external dependencies (besides standard C library) are Boehm GC and
uthash.
On Fedora these can be installed with `gc-devel` and `uthash-devel` packages.
If you want to build tests, `kyua` quality assurance toolkit, `atf` testing
framework and a recent snapshot (1.8f or newer) of `vasm` assembler (6502
with std syntax) are also necessary.
[![Built by neckbeards](https://forthebadge.com/images/badges/built-by-neckbeards.svg)](https://forthebadge.com)

37
examples/Makefile Normal file
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@ -0,0 +1,37 @@
UNAME_S := $(shell uname -s)
CFLAGS=-Wall -pedantic -I../src -g
LDFLAGS=-lgc
LDFLAGS_MACOSX=-L/opt/local/lib
CFLAGS_MACOSX=-I/opt/local/include
ifeq ($(UNAME_S),Darwin)
CFLAGS+=$(CFLAGS_MACOSX)
LDFLAGS+=$(LDFLAGS_MACOSX)
endif
RK6502LIB=../src/librk65c02.a
VASM=vasm6502_std
VASMFLAGS=-Fbin -wdc02
EXAMPLES=min3 mul_8bit_to_8bits
EXAMPLES_ROMS:=$(addsuffix .rom,$(basename $(wildcard *.s)))
all : $(EXAMPLES) $(EXAMPLES_ROMS)
min3 : min3.o $(RK6502LIB)
$(CC) -o $@ $(LDFLAGS) $< $(RK6502LIB)
mul_8bit_to_8bits : mul_8bit_to_8bits.o $(RK6502LIB)
$(CC) -o $@ $(LDFLAGS) $< $(RK6502LIB)
%.rom : %.s
$(VASM) $(VASMFLAGS) -o $@ $<
%.o : %.c
$(CC) $(CFLAGS) -c $<
clean :
rm -f *.o
rm -f $(EXAMPLES) $(EXAMPLES_ROMS)

33
examples/min3.c Normal file
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@ -0,0 +1,33 @@
#include <stdio.h>
#include <stdint.h>
#include "rk65c02.h"
#include "bus.h"
#include "log.h"
#include "instruction.h"
static const uint16_t load_addr = 0xC000;
int main(void)
{
uint8_t a, b, c;
uint8_t min;
rk65c02emu_t e;
e = rk65c02_load_rom("min3.rom", load_addr, NULL);
e.regs.SP = 0xFF;
e.regs.PC = load_addr;
a = 5; b = 9; c = 4;
stack_push(&e, a);
stack_push(&e, b);
stack_push(&e, c);
rk65c02_start(&e);
min = stack_pop(&e);
printf("Min is: %d\n", min);
}

32
examples/min3.s Normal file
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@ -0,0 +1,32 @@
.org 0xC000
start: jsr min3
stp
; min3
; Takes 3 numbers (A, B, C), passed on stack, finds the minimum.
; Result is also passed on stack. Assumes it is being called via jsr.
.set retl,0x10
.set reth,0x11
.set res,0x12
min3: pla ; pull low byte of return address
sta retl
pla
sta reth
pla ; pull C from stack
sta res ; save C into res
pla ; pull B from stack
cmp res ; compare B and C
bpl bltc ; branch if B > C
sta res ; if C is smaller, save it to res
bltc: pla ; pull A from stack
cmp res ; compare A and whatever is in res
bpl ret ; branch if A > res
sta res ; otherwise save A to res
ret: lda res ; load res into accumulator
pha ; save to the stack
lda reth ; restore return address
pha
lda retl
pha
rts ; return from function

32
examples/mul_8bit_to_8bits.c Normal file
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@ -0,0 +1,32 @@
#include <stdio.h>
#include <stdint.h>
#include "rk65c02.h"
#include "bus.h"
#include "log.h"
#include "instruction.h"
static const uint16_t load_addr = 0xC000;
int main(void)
{
uint8_t num1, num2;
uint8_t res;
rk65c02emu_t e;
e = rk65c02_load_rom("mul_8bit_to_8bits.rom", load_addr, NULL);
e.regs.SP = 0xFF;
e.regs.PC = load_addr;
num1 = 4; num2 = 8;
stack_push(&e, num1);
stack_push(&e, num2);
rk65c02_start(&e);
res = stack_pop(&e);
printf("Result of multiplication: %d\n", res);
}

50
examples/mul_8bit_to_8bits.s Normal file
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@ -0,0 +1,50 @@
.org 0xC000
start: jsr mul_8bit_to_8bits
stp
; mul_8bit_to_8bits
; Multiplies 2 numbers (passed on stack) and returns result on stack.
; General 8bit * 8bit = 8bit multiply
; by White Flame 20030207
; adapted as rk65c02 example by rkujawa
; Instead of using a bit counter, this routine early-exits when num2 reaches
; zero, thus saving iterations.
; .X and .Y are preserved
; num1 and num2 get clobbered
.set num1,0x10
.set num2,0x11
.set retl,0x12
.set reth,0x13
mul_8bit_to_8bits:
pla ; pull return address
sta retl
pla
sta reth
pla ; pull num1 from stack
sta num1
pla ; pull num2 from stack
sta num2
lda #0x00
beq enterl
doAdd: clc
adc num1
loop: asl num1
; For an accumulating multiply (A = A + num1 * num2),
; set up num1 and num2, then enter here.
enterl: lsr num2
bcs doAdd
bne loop
end:
pha ; save result to stack
lda reth ; restore return address
pha
lda retl
pha
rts ; return from function

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120
src/65c02isa.csv
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@ -1,8 +1,8 @@
opcode_id,mnemonic,addressing,size,emulation,modify_pc
OP_BRK,"brk",IMPLIED,2,emul_brk,true
OP_ORA_IZPX,"ora",IZPX,2,emul_ora,false
OP_NOPI_3,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_3,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_4,"invalid",IMPLIED,1,emul_invalid,false
OP_TSB_ZP,"tsb",ZP,2,emul_tsb,false
OP_ORA_ZP,"ora",ZP,2,emul_ora,false
OP_ASL_ZP,"asl",ZP,2,emul_asl,false
@ -10,15 +10,15 @@ OP_RMB0_ZP,"rmb0",ZP,2,emul_rmb0,false
OP_PHP,"php",IMPLIED,1,emul_php,false
OP_ORA_IMM,"ora",IMMEDIATE,2,emul_ora,false
OP_ASL,"asl",ACCUMULATOR,1,emul_asl,false
OP_NOPI_C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_C,"invalid",IMPLIED,1,emul_invalid,false
OP_TSB_ABS,"tsb",ABSOLUTE,3,emul_tsb,false
OP_ORA_ABS,"ora",ABSOLUTE,3,emul_ora,false
OP_ASL_ABS,"asl",ABSOLUTE,3,emul_asl,false
OP_BBR0_REL,"bbr0",ZPR,2,emul_bbr0,true
OP_BBR0_REL,"bbr0",ZPR,3,emul_bbr0,true
OP_BPL_REL,"bpl",RELATIVE,2,emul_bpl,true
OP_ORA_IZPY,"ora",IZPY,2,emul_ora,false
OP_ORA_IZP,"ora",IZP,2,emul_ora,false
OP_NOPI_14,"invalid",IMPLIED,1,NULL,false
OP_NOPI_14,"invalid",IMPLIED,1,emul_invalid,false
OP_TRB_ZP,"trb",ZP,2,emul_trb,false
OP_ORA_ZPX,"ora",ZPX,2,emul_ora,false
OP_ASL_ZPX,"asl",ZPX,2,emul_asl,false
@ -26,15 +26,15 @@ OP_RMB1_ZP,"rmb1",ZP,2,emul_rmb1,false
OP_CLC,"clc",IMPLIED,1,emul_clc,false
OP_ORA_ABSY,"ora",ABSOLUTEY,3,emul_ora,false
OP_INC,"inc",ACCUMULATOR,1,emul_inc,false
OP_NOPI_1C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_1C,"invalid",IMPLIED,1,emul_invalid,false
OP_TRB_ABS,"trb",ABSOLUTE,3,emul_trb,false
OP_ORA_ABSX,"ora",ABSOLUTEX,3,emul_ora,false
OP_ASL_ABSX,"asl",ABSOLUTEX,3,emul_asl,false
OP_BBR1_REL,"bbr1",ZPR,2,emul_bbr1,true
OP_BBR1_REL,"bbr1",ZPR,3,emul_bbr1,true
OP_JSR,"jsr",ABSOLUTE,3,emul_jsr,true
OP_AND_IZPX,"and",IZPX,2,emul_and,false
OP_NOPI_23,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_24,"invalid",IMPLIED,1,NULL,false
OP_NOPI_23,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_24,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ZP,"bit",ZP,2,emul_bit,false
OP_AND_ZP,"and",ZP,2,emul_and,false
OP_ROL_ZP,"rol",ZP,2,emul_rol,false
@ -42,15 +42,15 @@ OP_RMB2_ZP,"rmb2",ZP,2,emul_rmb2,false
OP_PLP,"plp",IMPLIED,1,emul_plp,false
OP_AND_IMM,"and",IMMEDIATE,2,emul_and,false
OP_ROL,"rol",ACCUMULATOR,1,emul_rol,false
OP_NOPI_2C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_2C,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ABS,"bit",ABSOLUTE,3,emul_bit,false
OP_AND_ABS,"and",ABSOLUTE,3,emul_and,false
OP_ROL_ABS,"rol",ABSOLUTE,3,emul_rol,false
OP_BBR2_REL,"bbr2",ZPR,2,emul_bbr2,true
OP_BBR2_REL,"bbr2",ZPR,3,emul_bbr2,true
OP_BMI_REL,"bmi",RELATIVE,2,emul_bmi,true
OP_AND_IZPY,"and",IZPY,2,emul_and,false
OP_AND_IZP,"and",IZP,2,emul_and,false
OP_NOPI_34,"invalid",IMPLIED,1,NULL,false
OP_NOPI_34,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ZPX,"bit",ZPX,2,emul_bit,false
OP_AND_ZPX,"and",ZPX,2,emul_and,false
OP_ROL_ZPX,"rol",ZPX,2,emul_rol,false
@ -58,47 +58,47 @@ OP_RMB3_ZP,"rmb3",ZP,2,emul_rmb3,false
OP_SEC,"sec",IMPLIED,1,emul_sec,false
OP_AND_ABSY,"and",ABSOLUTEY,3,emul_and,false
OP_DEC,"dec",ACCUMULATOR,1,emul_dec,false
OP_NOPI_3C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_3C,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ABSX,"bit",ABSOLUTEX,3,emul_bit,false
OP_AND_ABSX,"and",ABSOLUTEX,3,emul_and,false
OP_ROL_ABSX,"rol",ABSOLUTEX,3,emul_rol,false
OP_BBR3_REL,"bbr3",ZPR,2,emul_bbr3,true
OP_BBR3_REL,"bbr3",ZPR,3,emul_bbr3,true
OP_RTI,"rti",IMPLIED,1,emul_rti,true
OP_EOR_IZPX,"eor",IZPX,2,emul_eor,false
OP_NOPI_43,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_44,"invalid",IMPLIED,1,NULL,false
OP_NOPI_45,"invalid",ZP,2,NULL,false
OP_NOPI_43,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_44,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_45,"invalid",ZP,2,emul_invalid,false
OP_EOR_ZP,"eor",ZP,2,emul_eor,false
OP_LSR_ZP,"lsr",ZP,2,emul_lsr,false
OP_RMB4_ZP,"rmb4",ZP,2,emul_rmb4,false
OP_PHA,"pha",IMPLIED,1,emul_pha,false
OP_EOR_IMM,"eor",IMMEDIATE,2,emul_eor,false
OP_LSR,"lsr",ACCUMULATOR,1,emul_lsr,false
OP_NOPI_4C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_4C,"invalid",IMPLIED,1,emul_invalid,false
OP_JMP_ABS,"jmp",ABSOLUTE,3,emul_jmp,true
OP_EOR_ABS,"eor",ABSOLUTE,3,emul_eor,false
OP_LSR_ABS,"lsr",ABSOLUTE,3,emul_lsr,false
OP_BBR4_REL,"bbr4",ZPR,2,emul_bbr4,true
OP_BBR4_REL,"bbr4",ZPR,3,emul_bbr4,true
OP_BVC_REL,"bvc",RELATIVE,2,emul_bvc,true
OP_EOR_IZPY,"eor",IZPY,2,emul_eor,false
OP_EOR_IZP,"eor",IZP,2,emul_eor,false
OP_NOPI_54,"invalid",IMPLIED,1,NULL,false
OP_NOPI_55,"invalid",ZPX,2,NULL,false
OP_NOPI_54,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_55,"invalid",ZPX,2,emul_invalid,false
OP_EOR_ZPX,"eor",ZPX,2,emul_eor,false
OP_LSR_ZPX,"lsr",ZPX,2,emul_lsr,false
OP_RMB5_ZP,"rmb5",ZP,2,emul_rmb5,false
OP_CLI,"cli",IMPLIED,1,emul_cli,false
OP_EOR_ABSY,"eor",ABSOLUTEY,3,emul_eor,false
OP_PHY,"phy",IMPLIED,1,emul_phy,false
OP_NOPI_5C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_5D,"invalid",ABSOLUTE,3,NULL,false
OP_NOPI_5C,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_5D,"invalid",ABSOLUTE,3,emul_invalid,false
OP_EOR_ABSX,"eor",ABSOLUTEX,3,emul_eor,false
OP_LSR_ABSX,"lsr",ABSOLUTEX,3,emul_lsr,false
OP_BBR5_REL,"bbr5",ZPR,2,emul_bbr5,true
OP_BBR5_REL,"bbr5",ZPR,3,emul_bbr5,true
OP_RTS,"rts",IMPLIED,1,emul_rts,false
OP_ADC_IZPX,"adc",IZPX,2,emul_adc,false
OP_NOPI_63,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_64,"invalid",IMPLIED,1,NULL,false
OP_NOPI_63,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_64,"invalid",IMPLIED,1,emul_invalid,false
OP_STZ_ZP,"stz",ZP,2,emul_stz,false
OP_ADC_ZP,"adc",ZP,2,emul_adc,false
OP_ROR_ZP,"ror",ZP,2,emul_ror,false
@ -106,15 +106,15 @@ OP_RMB6_ZP,"rmb6",ZP,2,emul_rmb6,false
OP_PLA,"pla",IMPLIED,1,emul_pla,false
OP_ADC_IMM,"adc",IMMEDIATE,2,emul_adc,false
OP_ROR,"ror",ACCUMULATOR,1,emul_ror,false
OP_NOPI_6C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_6C,"invalid",IMPLIED,1,emul_invalid,false
OP_JMP_IABS,"jmp",IABSOLUTE,3,emul_jmp,true
OP_ADC_ABS,"adc",ABSOLUTE,3,emul_adc,false
OP_ROR_ABS,"ror",ABSOLUTE,3,emul_ror,false
OP_BBR6_REL,"bbr6",ZPR,2,emul_bbr6,true
OP_BBR6_REL,"bbr6",ZPR,3,emul_bbr6,true
OP_BVS_REL,"bvs",RELATIVE,2,emul_bvs,true
OP_ADC_IZPY,"adc",IZPY,2,emul_adc,false
OP_ADC_IZP,"adc",IZP,2,emul_adc,false
OP_NOPI_74,"invalid",IMPLIED,1,NULL,false
OP_NOPI_74,"invalid",IMPLIED,1,emul_invalid,false
OP_STZ_ZPX,"stz",ZPX,2,emul_stz,false
OP_ADC_ZPX,"adc",ZPX,2,emul_adc,false
OP_ROR_ZPX,"ror",ZPX,2,emul_ror,false
@ -122,15 +122,15 @@ OP_RMB7_ZP,"rmb7",ZP,2,emul_rmb7,false
OP_SEI,"sei",IMPLIED,1,emul_sei,false
OP_ADC_ABSY,"adc",ABSOLUTEY,3,emul_adc,false
OP_PLY,"ply",IMPLIED,1,emul_ply,false
OP_NOPI_7C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_7C,"invalid",IMPLIED,1,emul_invalid,false
OP_JMP_IABSX,"jmp",IABSOLUTEX,3,emul_jmp,true
OP_ADC_ABSX,"adc",ABSOLUTEX,3,emul_adc,false
OP_ROR_ABSX,"ror",ABSOLUTEX,3,emul_ror,false
OP_BBR7_REL,"bbr7",ZPR,2,emul_bbr7,true
OP_BBR7_REL,"bbr7",ZPR,3,emul_bbr7,true
OP_BRA_REL,"bra",RELATIVE,2,emul_bra,true
OP_STA_IZPX,"sta",IZPX,2,emul_sta,false
OP_NOPI_83,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_84,"invalid",IMPLIED,1,NULL,false
OP_NOPI_83,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_84,"invalid",IMPLIED,1,emul_invalid,false
OP_STY_ZP,"sty",ZP,2,emul_sty,false
OP_STA_ZP,"sta",ZP,2,emul_sta,false
OP_STX_ZP,"stx",ZP,2,emul_stx,false
@ -138,15 +138,15 @@ OP_SMB0_ZP,"smb0",ZP,2,emul_smb0,false
OP_DEY,"dey",IMPLIED,1,emul_dey,false
OP_BIT_IMM,"bit",IMMEDIATE,2,emul_bit,false
OP_TXA,"txa",IMPLIED,1,emul_txa,false
OP_NOPI_8C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_8C,"invalid",IMPLIED,1,emul_invalid,false
OP_STY_ABS,"sty",ABSOLUTE,3,emul_sty,false
OP_STA_ABS,"sta",ABSOLUTE,3,emul_sta,false
OP_STX_ABS,"stx",ABSOLUTE,3,emul_stx,false
OP_BBS0_REL,"bbs0",ZPR,2,emul_bbs0,true
OP_BBS0_REL,"bbs0",ZPR,3,emul_bbs0,true
OP_BCC_REL,"bcc",RELATIVE,2,emul_bcc,true
OP_STA_IZPY,"sta",IZPY,2,emul_sta,false
OP_STA_IZP,"sta",IZP,2,emul_sta,false
OP_NOPI_94,"invalid",IMPLIED,1,NULL,false
OP_NOPI_94,"invalid",IMPLIED,1,emul_invalid,false
OP_STY_ZPX,"sty",ZPX,2,emul_sty,false
OP_STA_ZPX,"sta",ZPX,2,emul_sta,false
OP_STX_ZPY,"stx",ZPY,2,emul_stx,false
@ -154,15 +154,15 @@ OP_SMB1_ZP,"smb1",ZP,2,emul_smb1,false
OP_TYA,"tya",IMPLIED,1,emul_tya,false
OP_STA_ABSY,"sta",ABSOLUTEY,3,emul_sta,false
OP_TXS,"txs",IMPLIED,1,emul_txs,false
OP_NOPI_9C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_9C,"invalid",IMPLIED,1,emul_invalid,false
OP_STZ_ABS,"stz",ABSOLUTE,3,emul_stz,false
OP_STA_ABSX,"sta",ABSOLUTEX,3,emul_sta,false
OP_STZ_ABSX,"stz",ABSOLUTEX,3,emul_stz,false
OP_BBS1_REL,"bbs1",ZPR,2,emul_bbs1,true
OP_BBS1_REL,"bbs1",ZPR,3,emul_bbs1,true
OP_LDY_IMM,"ldy",IMMEDIATE,2,emul_ldy,false
OP_LDA_IZPX,"lda",IZPX,2,emul_lda,false
OP_LDX_IMM,"ldx",IMMEDIATE,2,emul_ldx,false
OP_NOPI_A4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_A4,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ZP,"ldy",ZP,2,emul_ldy,false
OP_LDA_ZP,"lda",ZP,2,emul_lda,false
OP_LDX_ZP,"ldx",ZP,2,emul_ldx,false
@ -170,15 +170,15 @@ OP_SMB2_ZP,"smb2",ZP,2,emul_smb2,false
OP_TAY,"tay",IMPLIED,1,emul_tay,false
OP_LDA_IMM,"lda",IMMEDIATE,2,emul_lda,false
OP_TAX,"tax",IMPLIED,1,emul_tax,false
OP_NOPI_AC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_AC,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ABS,"ldy",ABSOLUTE,3,emul_ldy,false
OP_LDA_ABS,"lda",ABSOLUTE,3,emul_lda,false
OP_LDX_ABS,"ldx",ABSOLUTE,3,emul_ldx,false
OP_BBS2_REL,"bbs2",ZPR,2,emul_bbs2,true
OP_BBS2_REL,"bbs2",ZPR,3,emul_bbs2,true
OP_BCS_REL,"bcs",RELATIVE,2,emul_bcs,true
OP_LDA_IZPY,"lda",IZPY,2,emul_lda,false
OP_LDA_IZP,"lda",IZP,2,emul_lda,false
OP_NOPI_B4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_B4,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ZPX,"ldy",ZPX,2,emul_ldy,false
OP_LDA_ZPX,"lda",ZPX,2,emul_lda,false
OP_LDX_ZPY,"ldx",ZPY,1,emul_ldx,false
@ -186,15 +186,15 @@ OP_SMB3_ZP,"smb3",ZP,2,emul_smb3,false
OP_CLV,"clv",IMPLIED,1,emul_clv,false
OP_LDA_ABSY,"lda",ABSOLUTEY,3,emul_lda,false
OP_TSX,"tsx",IMPLIED,1,emul_tsx,false
OP_NOPI_BC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_BC,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ABSX,"ldy",ABSOLUTEX,3,emul_ldy,false
OP_LDA_ABSX,"lda",ABSOLUTEX,3,emul_lda,false
OP_LDX_ABSY,"ldx",ABSOLUTEY,3,emul_ldx,false
OP_BBS3_REL,"bbs3",ZPR,2,emul_bbs3,true
OP_BBS3_REL,"bbs3",ZPR,3,emul_bbs3,true
OP_CPY_IMM,"cpy",IMMEDIATE,2,emul_cpy,false
OP_CMP_IZPX,"cmp",IZPX,2,emul_cmp,false
OP_NOPI_C3,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_C4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_C3,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_C4,"invalid",IMPLIED,1,emul_invalid,false
OP_CPY_ZP,"cpy",ZP,2,emul_cpy,false
OP_CMP_ZP,"cmp",ZP,2,emul_cmp,false
OP_DEC_ZP,"dec",ZP,2,emul_dec,false
@ -206,12 +206,12 @@ OP_WAI,"wai",IMPLIED,1,emul_wai,false
OP_CPY_ABS,"cpy",ABSOLUTE,3,emul_cpy,false
OP_CMP_ABS,"cmp",ABSOLUTE,3,emul_cmp,false
OP_DEC_ABS,"dec",ABSOLUTE,3,emul_dec,false
OP_BBS4_REL,"bbs4",ZPR,2,emul_bbs4,true
OP_BBS4_REL,"bbs4",ZPR,3,emul_bbs4,true
OP_BNE_REL,"bne",RELATIVE,2,emul_bne,true
OP_CMP_IZPY,"cmp",IZPY,2,emul_cmp,false
OP_CMP_IZP,"cmp",IZP,2,emul_cmp,false
OP_NOPI_D4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_D5,"invalid",ZPX,2,NULL,false
OP_NOPI_D4,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_D5,"invalid",ZPX,2,emul_invalid,false
OP_CMP_ZPX,"cmp",ZPX,2,emul_cmp,false
OP_DEC_ZPX,"dec",ZPX,2,emul_dec,false
OP_SMB5_ZP,"smb5",ZP,2,emul_smb5,false
@ -219,14 +219,14 @@ OP_CLD,"cld",IMPLIED,1,emul_cld,false
OP_CMP_ABSY,"cmp",ABSOLUTEY,3,emul_cmp,false
OP_PHX,"phx",IMPLIED,1,emul_phx,false
OP_STP,"stp",IMPLIED,1,emul_stp,false
OP_NOPI_DD,"invalid",ABSOLUTE,3,NULL,false
OP_NOPI_DD,"invalid",ABSOLUTE,3,emul_invalid,false
OP_CMP_ABSX,"cmp",ABSOLUTEX,3,emul_cmp,false
OP_DEC_ABSX,"dec",ABSOLUTEX,3,emul_dec,false
OP_BBS5_REL,"bbs5",ZPR,2,emul_bbs5,true
OP_BBS5_REL,"bbs5",ZPR,3,emul_bbs5,true
OP_CPX_IMM,"cpx",IMMEDIATE,2,emul_cpx,false
OP_SBC_IZPX,"sbc",IZPX,2,emul_sbc,false
OP_NOPI_E3,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_E4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_E3,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_E4,"invalid",IMPLIED,1,emul_invalid,false
OP_CPX_ZP,"cpx",ZP,2,emul_cpx,false
OP_SBC_ZP,"sbc",ZP,2,emul_sbc,false
OP_INC_ZP,"inc",ZP,2,emul_inc,false
@ -234,24 +234,24 @@ OP_SMB6_ZP,"smb6",ZP,2,emul_smb6,false
OP_INX,"inx",IMPLIED,1,emul_inx,false
OP_SBC_IMM,"sbc",IMMEDIATE,2,emul_sbc,false
OP_NOP,"nop",IMPLIED,1,emul_nop,false
OP_NOPI_EC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_EC,"invalid",IMPLIED,1,emul_invalid,false
OP_CPX_ABS,"cpx",ABSOLUTE,3,emul_cpx,false
OP_SBC_ABS,"sbc",ABSOLUTE,3,emul_sbc,false
OP_INC_ABS,"inc",ABSOLUTE,3,emul_inc,false
OP_BBS6_REL,"bbs6",ZPR,2,emul_bbs6,true
OP_BBS6_REL,"bbs6",ZPR,3,emul_bbs6,true
OP_BEQ_REL,"beq",RELATIVE,2,emul_beq,true
OP_SBC_IZPY,"sbc",IZPY,2,emul_sbc,false
OP_SBC_IZP,"sbc",IZP,2,emul_sbc,false
OP_NOPI_F4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_F5,"invalid",ZPX,2,NULL,false
OP_NOPI_F4,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_F5,"invalid",ZPX,2,emul_invalid,false
OP_SBC_ZPX,"sbc",ZPX,2,emul_sbc,false
OP_INC_ZPX,"inc",ZPX,2,emul_inc,false
OP_SMB7_ZP,"smb7",ZP,2,emul_smb7,false
OP_SED,"sed",IMPLIED,1,emul_sed,false
OP_SBC_ABSY,"sbc",ABSOLUTEY,3,emul_sbc,false
OP_PLX,"plx",IMPLIED,1,emul_plx,false
OP_NOPI_FC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_FD,"invalid",ABSOLUTE,3,NULL,false
OP_NOPI_FC,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_FD,"invalid",ABSOLUTE,3,emul_invalid,false
OP_SBC_ABSX,"sbc",ABSOLUTEX,3,emul_sbc,false
OP_INC_ABSX,"inc",ABSOLUTEX,3,emul_inc,false
OP_BBS7_REL,"bbs7",ZPR,2,emul_bbs7,true
OP_BBS7_REL,"bbs7",ZPR,3,emul_bbs7,true

1 opcode_id mnemonic addressing size emulation modify_pc
2 OP_BRK brk IMPLIED 2 emul_brk true
3 OP_ORA_IZPX ora IZPX 2 emul_ora false
4 OP_NOPI_3 invalid IMMEDIATE 2 NULL emul_invalid false
5 OP_NOPI_4 invalid IMPLIED 1 NULL emul_invalid false
6 OP_TSB_ZP tsb ZP 2 emul_tsb false
7 OP_ORA_ZP ora ZP 2 emul_ora false
8 OP_ASL_ZP asl ZP 2 emul_asl false
10 OP_PHP php IMPLIED 1 emul_php false
11 OP_ORA_IMM ora IMMEDIATE 2 emul_ora false
12 OP_ASL asl ACCUMULATOR 1 emul_asl false
13 OP_NOPI_C invalid IMPLIED 1 NULL emul_invalid false
14 OP_TSB_ABS tsb ABSOLUTE 3 emul_tsb false
15 OP_ORA_ABS ora ABSOLUTE 3 emul_ora false
16 OP_ASL_ABS asl ABSOLUTE 3 emul_asl false
17 OP_BBR0_REL bbr0 ZPR 2 3 emul_bbr0 true
18 OP_BPL_REL bpl RELATIVE 2 emul_bpl true
19 OP_ORA_IZPY ora IZPY 2 emul_ora false
20 OP_ORA_IZP ora IZP 2 emul_ora false
21 OP_NOPI_14 invalid IMPLIED 1 NULL emul_invalid false
22 OP_TRB_ZP trb ZP 2 emul_trb false
23 OP_ORA_ZPX ora ZPX 2 emul_ora false
24 OP_ASL_ZPX asl ZPX 2 emul_asl false
26 OP_CLC clc IMPLIED 1 emul_clc false
27 OP_ORA_ABSY ora ABSOLUTEY 3 emul_ora false
28 OP_INC inc ACCUMULATOR 1 emul_inc false
29 OP_NOPI_1C invalid IMPLIED 1 NULL emul_invalid false
30 OP_TRB_ABS trb ABSOLUTE 3 emul_trb false
31 OP_ORA_ABSX ora ABSOLUTEX 3 emul_ora false
32 OP_ASL_ABSX asl ABSOLUTEX 3 emul_asl false
33 OP_BBR1_REL bbr1 ZPR 2 3 emul_bbr1 true
34 OP_JSR jsr ABSOLUTE 3 emul_jsr true
35 OP_AND_IZPX and IZPX 2 emul_and false
36 OP_NOPI_23 invalid IMMEDIATE 2 NULL emul_invalid false
37 OP_NOPI_24 invalid IMPLIED 1 NULL emul_invalid false
38 OP_BIT_ZP bit ZP 2 emul_bit false
39 OP_AND_ZP and ZP 2 emul_and false
40 OP_ROL_ZP rol ZP 2 emul_rol false
42 OP_PLP plp IMPLIED 1 emul_plp false
43 OP_AND_IMM and IMMEDIATE 2 emul_and false
44 OP_ROL rol ACCUMULATOR 1 emul_rol false
45 OP_NOPI_2C invalid IMPLIED 1 NULL emul_invalid false
46 OP_BIT_ABS bit ABSOLUTE 3 emul_bit false
47 OP_AND_ABS and ABSOLUTE 3 emul_and false
48 OP_ROL_ABS rol ABSOLUTE 3 emul_rol false
49 OP_BBR2_REL bbr2 ZPR 2 3 emul_bbr2 true
50 OP_BMI_REL bmi RELATIVE 2 emul_bmi true
51 OP_AND_IZPY and IZPY 2 emul_and false
52 OP_AND_IZP and IZP 2 emul_and false
53 OP_NOPI_34 invalid IMPLIED 1 NULL emul_invalid false
54 OP_BIT_ZPX bit ZPX 2 emul_bit false
55 OP_AND_ZPX and ZPX 2 emul_and false
56 OP_ROL_ZPX rol ZPX 2 emul_rol false
58 OP_SEC sec IMPLIED 1 emul_sec false
59 OP_AND_ABSY and ABSOLUTEY 3 emul_and false
60 OP_DEC dec ACCUMULATOR 1 emul_dec false
61 OP_NOPI_3C invalid IMPLIED 1 NULL emul_invalid false
62 OP_BIT_ABSX bit ABSOLUTEX 3 emul_bit false
63 OP_AND_ABSX and ABSOLUTEX 3 emul_and false
64 OP_ROL_ABSX rol ABSOLUTEX 3 emul_rol false
65 OP_BBR3_REL bbr3 ZPR 2 3 emul_bbr3 true
66 OP_RTI rti IMPLIED 1 emul_rti true
67 OP_EOR_IZPX eor IZPX 2 emul_eor false
68 OP_NOPI_43 invalid IMMEDIATE 2 NULL emul_invalid false
69 OP_NOPI_44 invalid IMPLIED 1 NULL emul_invalid false
70 OP_NOPI_45 invalid ZP 2 NULL emul_invalid false
71 OP_EOR_ZP eor ZP 2 emul_eor false
72 OP_LSR_ZP lsr ZP 2 emul_lsr false
73 OP_RMB4_ZP rmb4 ZP 2 emul_rmb4 false
74 OP_PHA pha IMPLIED 1 emul_pha false
75 OP_EOR_IMM eor IMMEDIATE 2 emul_eor false
76 OP_LSR lsr ACCUMULATOR 1 emul_lsr false
77 OP_NOPI_4C invalid IMPLIED 1 NULL emul_invalid false
78 OP_JMP_ABS jmp ABSOLUTE 3 emul_jmp true
79 OP_EOR_ABS eor ABSOLUTE 3 emul_eor false
80 OP_LSR_ABS lsr ABSOLUTE 3 emul_lsr false
81 OP_BBR4_REL bbr4 ZPR 2 3 emul_bbr4 true
82 OP_BVC_REL bvc RELATIVE 2 emul_bvc true
83 OP_EOR_IZPY eor IZPY 2 emul_eor false
84 OP_EOR_IZP eor IZP 2 emul_eor false
85 OP_NOPI_54 invalid IMPLIED 1 NULL emul_invalid false
86 OP_NOPI_55 invalid ZPX 2 NULL emul_invalid false
87 OP_EOR_ZPX eor ZPX 2 emul_eor false
88 OP_LSR_ZPX lsr ZPX 2 emul_lsr false
89 OP_RMB5_ZP rmb5 ZP 2 emul_rmb5 false
90 OP_CLI cli IMPLIED 1 emul_cli false
91 OP_EOR_ABSY eor ABSOLUTEY 3 emul_eor false
92 OP_PHY phy IMPLIED 1 emul_phy false
93 OP_NOPI_5C invalid IMPLIED 1 NULL emul_invalid false
94 OP_NOPI_5D invalid ABSOLUTE 3 NULL emul_invalid false
95 OP_EOR_ABSX eor ABSOLUTEX 3 emul_eor false
96 OP_LSR_ABSX lsr ABSOLUTEX 3 emul_lsr false
97 OP_BBR5_REL bbr5 ZPR 2 3 emul_bbr5 true
98 OP_RTS rts IMPLIED 1 emul_rts false
99 OP_ADC_IZPX adc IZPX 2 emul_adc false
100 OP_NOPI_63 invalid IMMEDIATE 2 NULL emul_invalid false
101 OP_NOPI_64 invalid IMPLIED 1 NULL emul_invalid false
102 OP_STZ_ZP stz ZP 2 emul_stz false
103 OP_ADC_ZP adc ZP 2 emul_adc false
104 OP_ROR_ZP ror ZP 2 emul_ror false
106 OP_PLA pla IMPLIED 1 emul_pla false
107 OP_ADC_IMM adc IMMEDIATE 2 emul_adc false
108 OP_ROR ror ACCUMULATOR 1 emul_ror false
109 OP_NOPI_6C invalid IMPLIED 1 NULL emul_invalid false
110 OP_JMP_IABS jmp IABSOLUTE 3 emul_jmp true
111 OP_ADC_ABS adc ABSOLUTE 3 emul_adc false
112 OP_ROR_ABS ror ABSOLUTE 3 emul_ror false
113 OP_BBR6_REL bbr6 ZPR 2 3 emul_bbr6 true
114 OP_BVS_REL bvs RELATIVE 2 emul_bvs true
115 OP_ADC_IZPY adc IZPY 2 emul_adc false
116 OP_ADC_IZP adc IZP 2 emul_adc false
117 OP_NOPI_74 invalid IMPLIED 1 NULL emul_invalid false
118 OP_STZ_ZPX stz ZPX 2 emul_stz false
119 OP_ADC_ZPX adc ZPX 2 emul_adc false
120 OP_ROR_ZPX ror ZPX 2 emul_ror false
122 OP_SEI sei IMPLIED 1 emul_sei false
123 OP_ADC_ABSY adc ABSOLUTEY 3 emul_adc false
124 OP_PLY ply IMPLIED 1 emul_ply false
125 OP_NOPI_7C invalid IMPLIED 1 NULL emul_invalid false
126 OP_JMP_IABSX jmp IABSOLUTEX 3 emul_jmp true
127 OP_ADC_ABSX adc ABSOLUTEX 3 emul_adc false
128 OP_ROR_ABSX ror ABSOLUTEX 3 emul_ror false
129 OP_BBR7_REL bbr7 ZPR 2 3 emul_bbr7 true
130 OP_BRA_REL bra RELATIVE 2 emul_bra true
131 OP_STA_IZPX sta IZPX 2 emul_sta false
132 OP_NOPI_83 invalid IMMEDIATE 2 NULL emul_invalid false
133 OP_NOPI_84 invalid IMPLIED 1 NULL emul_invalid false
134 OP_STY_ZP sty ZP 2 emul_sty false
135 OP_STA_ZP sta ZP 2 emul_sta false
136 OP_STX_ZP stx ZP 2 emul_stx false
138 OP_DEY dey IMPLIED 1 emul_dey false
139 OP_BIT_IMM bit IMMEDIATE 2 emul_bit false
140 OP_TXA txa IMPLIED 1 emul_txa false
141 OP_NOPI_8C invalid IMPLIED 1 NULL emul_invalid false
142 OP_STY_ABS sty ABSOLUTE 3 emul_sty false
143 OP_STA_ABS sta ABSOLUTE 3 emul_sta false
144 OP_STX_ABS stx ABSOLUTE 3 emul_stx false
145 OP_BBS0_REL bbs0 ZPR 2 3 emul_bbs0 true
146 OP_BCC_REL bcc RELATIVE 2 emul_bcc true
147 OP_STA_IZPY sta IZPY 2 emul_sta false
148 OP_STA_IZP sta IZP 2 emul_sta false
149 OP_NOPI_94 invalid IMPLIED 1 NULL emul_invalid false
150 OP_STY_ZPX sty ZPX 2 emul_sty false
151 OP_STA_ZPX sta ZPX 2 emul_sta false
152 OP_STX_ZPY stx ZPY 2 emul_stx false
154 OP_TYA tya IMPLIED 1 emul_tya false
155 OP_STA_ABSY sta ABSOLUTEY 3 emul_sta false
156 OP_TXS txs IMPLIED 1 emul_txs false
157 OP_NOPI_9C invalid IMPLIED 1 NULL emul_invalid false
158 OP_STZ_ABS stz ABSOLUTE 3 emul_stz false
159 OP_STA_ABSX sta ABSOLUTEX 3 emul_sta false
160 OP_STZ_ABSX stz ABSOLUTEX 3 emul_stz false
161 OP_BBS1_REL bbs1 ZPR 2 3 emul_bbs1 true
162 OP_LDY_IMM ldy IMMEDIATE 2 emul_ldy false
163 OP_LDA_IZPX lda IZPX 2 emul_lda false
164 OP_LDX_IMM ldx IMMEDIATE 2 emul_ldx false
165 OP_NOPI_A4 invalid IMPLIED 1 NULL emul_invalid false
166 OP_LDY_ZP ldy ZP 2 emul_ldy false
167 OP_LDA_ZP lda ZP 2 emul_lda false
168 OP_LDX_ZP ldx ZP 2 emul_ldx false
170 OP_TAY tay IMPLIED 1 emul_tay false
171 OP_LDA_IMM lda IMMEDIATE 2 emul_lda false
172 OP_TAX tax IMPLIED 1 emul_tax false
173 OP_NOPI_AC invalid IMPLIED 1 NULL emul_invalid false
174 OP_LDY_ABS ldy ABSOLUTE 3 emul_ldy false
175 OP_LDA_ABS lda ABSOLUTE 3 emul_lda false
176 OP_LDX_ABS ldx ABSOLUTE 3 emul_ldx false
177 OP_BBS2_REL bbs2 ZPR 2 3 emul_bbs2 true
178 OP_BCS_REL bcs RELATIVE 2 emul_bcs true
179 OP_LDA_IZPY lda IZPY 2 emul_lda false
180 OP_LDA_IZP lda IZP 2 emul_lda false
181 OP_NOPI_B4 invalid IMPLIED 1 NULL emul_invalid false
182 OP_LDY_ZPX ldy ZPX 2 emul_ldy false
183 OP_LDA_ZPX lda ZPX 2 emul_lda false
184 OP_LDX_ZPY ldx ZPY 1 emul_ldx false
186 OP_CLV clv IMPLIED 1 emul_clv false
187 OP_LDA_ABSY lda ABSOLUTEY 3 emul_lda false
188 OP_TSX tsx IMPLIED 1 emul_tsx false
189 OP_NOPI_BC invalid IMPLIED 1 NULL emul_invalid false
190 OP_LDY_ABSX ldy ABSOLUTEX 3 emul_ldy false
191 OP_LDA_ABSX lda ABSOLUTEX 3 emul_lda false
192 OP_LDX_ABSY ldx ABSOLUTEY 3 emul_ldx false
193 OP_BBS3_REL bbs3 ZPR 2 3 emul_bbs3 true
194 OP_CPY_IMM cpy IMMEDIATE 2 emul_cpy false
195 OP_CMP_IZPX cmp IZPX 2 emul_cmp false
196 OP_NOPI_C3 invalid IMMEDIATE 2 NULL emul_invalid false
197 OP_NOPI_C4 invalid IMPLIED 1 NULL emul_invalid false
198 OP_CPY_ZP cpy ZP 2 emul_cpy false
199 OP_CMP_ZP cmp ZP 2 emul_cmp false
200 OP_DEC_ZP dec ZP 2 emul_dec false
206 OP_CPY_ABS cpy ABSOLUTE 3 emul_cpy false
207 OP_CMP_ABS cmp ABSOLUTE 3 emul_cmp false
208 OP_DEC_ABS dec ABSOLUTE 3 emul_dec false
209 OP_BBS4_REL bbs4 ZPR 2 3 emul_bbs4 true
210 OP_BNE_REL bne RELATIVE 2 emul_bne true
211 OP_CMP_IZPY cmp IZPY 2 emul_cmp false
212 OP_CMP_IZP cmp IZP 2 emul_cmp false
213 OP_NOPI_D4 invalid IMPLIED 1 NULL emul_invalid false
214 OP_NOPI_D5 invalid ZPX 2 NULL emul_invalid false
215 OP_CMP_ZPX cmp ZPX 2 emul_cmp false
216 OP_DEC_ZPX dec ZPX 2 emul_dec false
217 OP_SMB5_ZP smb5 ZP 2 emul_smb5 false
219 OP_CMP_ABSY cmp ABSOLUTEY 3 emul_cmp false
220 OP_PHX phx IMPLIED 1 emul_phx false
221 OP_STP stp IMPLIED 1 emul_stp false
222 OP_NOPI_DD invalid ABSOLUTE 3 NULL emul_invalid false
223 OP_CMP_ABSX cmp ABSOLUTEX 3 emul_cmp false
224 OP_DEC_ABSX dec ABSOLUTEX 3 emul_dec false
225 OP_BBS5_REL bbs5 ZPR 2 3 emul_bbs5 true
226 OP_CPX_IMM cpx IMMEDIATE 2 emul_cpx false
227 OP_SBC_IZPX sbc IZPX 2 emul_sbc false
228 OP_NOPI_E3 invalid IMMEDIATE 2 NULL emul_invalid false
229 OP_NOPI_E4 invalid IMPLIED 1 NULL emul_invalid false
230 OP_CPX_ZP cpx ZP 2 emul_cpx false
231 OP_SBC_ZP sbc ZP 2 emul_sbc false
232 OP_INC_ZP inc ZP 2 emul_inc false
234 OP_INX inx IMPLIED 1 emul_inx false
235 OP_SBC_IMM sbc IMMEDIATE 2 emul_sbc false
236 OP_NOP nop IMPLIED 1 emul_nop false
237 OP_NOPI_EC invalid IMPLIED 1 NULL emul_invalid false
238 OP_CPX_ABS cpx ABSOLUTE 3 emul_cpx false
239 OP_SBC_ABS sbc ABSOLUTE 3 emul_sbc false
240 OP_INC_ABS inc ABSOLUTE 3 emul_inc false
241 OP_BBS6_REL bbs6 ZPR 2 3 emul_bbs6 true
242 OP_BEQ_REL beq RELATIVE 2 emul_beq true
243 OP_SBC_IZPY sbc IZPY 2 emul_sbc false
244 OP_SBC_IZP sbc IZP 2 emul_sbc false
245 OP_NOPI_F4 invalid IMPLIED 1 NULL emul_invalid false
246 OP_NOPI_F5 invalid ZPX 2 NULL emul_invalid false
247 OP_SBC_ZPX sbc ZPX 2 emul_sbc false
248 OP_INC_ZPX inc ZPX 2 emul_inc false
249 OP_SMB7_ZP smb7 ZP 2 emul_smb7 false
250 OP_SED sed IMPLIED 1 emul_sed false
251 OP_SBC_ABSY sbc ABSOLUTEY 3 emul_sbc false
252 OP_PLX plx IMPLIED 1 emul_plx false
253 OP_NOPI_FC invalid IMPLIED 1 NULL emul_invalid false
254 OP_NOPI_FD invalid ABSOLUTE 3 NULL emul_invalid false
255 OP_SBC_ABSX sbc ABSOLUTEX 3 emul_sbc false
256 OP_INC_ABSX inc ABSOLUTEX 3 emul_inc false
257 OP_BBS7_REL bbs7 ZPR 2 3 emul_bbs7 true

2482
src/Doxyfile Normal file
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File diff suppressed because it is too large Load Diff

38
src/Makefile
View File

@ -1,26 +1,38 @@
CLI=rk65c02cli
CLI_OBJS=rk65c02cli.o
# This needs fairly recent GNU Make.
#
UNAME_S := $(shell uname -s)
LIB_OBJS=rk65c02.o bus.o instruction.o emulation.o debug.o device_ram.o log.o assembler.o jit_lightning.o
ifeq ($(UNAME_S),Darwin)
LIB_SO=librk65c02.dylib
else
LIB_SO=librk65c02.so
endif
LIB_OBJS=rk65c02.o bus.o instruction.o emulation.o debug.o device_ram.o device_serial.o jit_lightning.o
LIB_SO=librk65c02.so
LIB_STATIC=librk65c02.a
LDFLAGS_SO=-shared
LDFLAGS_CLI=-lreadline
CFLAGS=-Wall -fpic -ggdb
LDFLAGS=-shared -lgc
LDFLAGS_MACOSX=-L/opt/local/lib
CFLAGS=-Wall -fpic -ggdb -Og
CFLAGS_MACOSX=-I/opt/local/include/uthash -I/opt/local/include
ifeq ($(UNAME_S),Darwin)
CFLAGS+=$(CFLAGS_MACOSX)
LDFLAGS+=$(LDFLAGS_MACOSX)
endif
65C02ISA=65c02isa
EMULATION=emulation
DEVICE=device
# TODO: better include handling
all : $(LIB_SO) $(LIB_STATIC) $(CLI)
$(CLI) : $(CLI_OBJS)
$(CC) -o $(CLI) $(LDFLAGS_CLI) $(CLI_OBJS) $(LIB_STATIC)
#$(CLI) : $(CLI_OBJS)
# $(CC) -o $(CLI) $(LDFLAGS) $(CLI_OBJS) $(LIB_STATIC)
$(LIB_SO) : $(LIB_OBJS)
$(CC) -o $(LIB_SO) $(LDFLAGS_SO) $(LIB_OBJS)
$(CC) -o $(LIB_SO) $(LDFLAGS) $(LIB_OBJS)
$(LIB_STATIC) : $(LIB_OBJS)
$(AR) rcs $(LIB_STATIC) $(LIB_OBJS)
@ -37,6 +49,6 @@ $(EMULATION).h : $(65C02ISA).csv $(EMULATION).awk
clean :
rm -f $(65C02ISA).h $(EMULATION).h
rm -f $(LIB_OBJS) $(CLI_OBJS)
rm -f $(LIB_SO) $(LIB_STATIC) $(CLI)
rm -f $(LIB_OBJS) #$(CLI_OBJS)
rm -f $(LIB_SO) $(LIB_STATIC) #$(CLI)

111
src/assembler.c Normal file
View File

@ -0,0 +1,111 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#include <errno.h>
#include <assert.h>
#include <string.h>
#include <gc/gc.h>
#include "bus.h"
#include "rk65c02.h"
#include "log.h"
#include "assembler.h"
#include "instruction.h"
assembler_t
assemble_init(bus_t *b, uint16_t pc)
{
assembler_t asmblr;
asmblr.bus = b;
asmblr.pc = pc;
return asmblr;
}
bool
assemble_single_implied(assembler_t *a, char *mnemonic)
{
return assemble_single(a, mnemonic, IMPLIED, 0, 0);
}
bool
assemble_single(assembler_t *a, char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
{
uint8_t *asmbuf;
uint8_t bsize;
bool rv;
rv = assemble_single_buf(&asmbuf, &bsize, mnemonic, mode, op1, op2);
if (rv == false)
return rv;
rv = bus_load_buf(a->bus, a->pc, asmbuf, bsize);
a->pc += bsize;
return rv;
}
bool
assemble_single_buf_implied(uint8_t **buf, uint8_t *bsize, char *mnemonic)
{
return assemble_single_buf(buf, bsize, mnemonic, IMPLIED, 0, 0);
}
bool
assemble_single_buf(uint8_t **buf, uint8_t *bsize, char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
{
instrdef_t id;
uint8_t opcode;
bool found;
opcode = 0;
found = instruction_opcode_by_mnemonic(mnemonic, mode, &opcode, &id);
if (!found) {
rk65c02_log(LOG_ERROR,
"Couldn't find opcode for mnemonic %s mode %x.",
mnemonic, mode);
return false;
}
*bsize = id.size;
*buf = GC_MALLOC(id.size);
assert(*buf != NULL);
/* fill the buffer */
memset(*buf, 0, id.size);
(*buf)[0] = opcode;
/* XXX */
if (id.size > 1)
(*buf)[1] = op1;
if (id.size > 2)
(*buf)[2] = op2;
return found;
}

22
src/assembler.h Normal file
View File

@ -0,0 +1,22 @@
#ifndef _ASSEMBLER_H_
#define _ASSEMBLER_H_
#include "instruction.h"
#include "rk65c02.h"
struct assembler {
bus_t *bus;
uint16_t pc;
};
typedef struct assembler assembler_t;
bool assemble_single_buf_implied(uint8_t **, uint8_t *, char *);
bool assemble_single_buf(uint8_t **, uint8_t *, char *, addressing_t, uint8_t, uint8_t);
assembler_t assemble_init(bus_t *, uint16_t);
bool assemble_single(assembler_t *, char *, addressing_t, uint8_t, uint8_t);
bool assemble_single_implied(assembler_t *, char *);
#endif /* _ASSEMBLER_H_ */

75
src/bus.c
View File

@ -1,16 +1,38 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#include <string.h>
#include <unistd.h>
#include <assert.h>
#include <fcntl.h>
#include <errno.h>
#include <sys/types.h>
#include <gc/gc.h>
#include <utlist.h>
#include "bus.h"
#include "log.h"
#include "device_ram.h"
@ -23,13 +45,23 @@ bus_device_add(bus_t *b, device_t *d, uint16_t addr)
{
device_mapping_t *dm;
dm = (device_mapping_t *) malloc(sizeof(device_mapping_t));
if ((addr + d->size) > RK65C02_BUS_SIZE) {
rk65c02_log(LOG_ERROR,
"Bus mapping for %s at %x, size %x exceeding bus size.",
d->name, addr, d->size);
return;
}
dm = (device_mapping_t *) GC_MALLOC(sizeof(device_mapping_t));
assert(dm != NULL);
dm->dev = d;
/* TODO: check if addr + size is not bigger than RK65C02_BUS_SIZE */
dm->addr = addr;
LL_APPEND((b->dm_head), dm);
rk65c02_log(LOG_DEBUG, "Bus mapping added: %x device %s size %x.",
addr, d->name, d->size);
}
void
@ -57,6 +89,7 @@ bus_access_device(bus_t *t, uint16_t addr, device_t **d, uint16_t *off)
device_mapping_t *dm;
device_t *dtmp;
doff = 0;
*d = NULL;
LL_FOREACH(t->dm_head, dm) {
@ -68,7 +101,7 @@ bus_access_device(bus_t *t, uint16_t addr, device_t **d, uint16_t *off)
}
if (*d == NULL) {
fprintf(stderr, "Hitting unmapped bus space @ %x!", addr);
rk65c02_log(LOG_WARN, "Hitting unmapped bus space @ %x!", addr);
return;
}
@ -85,12 +118,13 @@ bus_read_1(bus_t *t, uint16_t addr)
bus_access_device(t, addr, &d, &off);
if (d == NULL)
return 0xFF;
return 0xFF; /* simulate floting pins */
else
val = d->read_1(d, off);
if (t->access_debug)
printf("bus READ @ %x (off %x) value %x\n", addr, off, val);
rk65c02_log(LOG_DEBUG, "bus READ @ %x (off %x) value %x\n",
addr, off, val);
return val;
}
@ -101,10 +135,20 @@ bus_write_1(bus_t *t, uint16_t addr, uint8_t val)
uint16_t off;
device_t *d;
off = 0;
bus_access_device(t, addr, &d, &off);
if (d == NULL) {
if (t->access_debug)
rk65c02_log(LOG_DEBUG, "unmapped bus WRITE @ %x (off %x) value %x\n",
addr, off, val);
return;
}
if (t->access_debug)
printf("bus WRITE @ %x (off %x) value %x\n", addr, off, val);
rk65c02_log(LOG_DEBUG, "bus WRITE @ %x (off %x) value %x\n",
addr, off, val);
d->write_1(d, off, val);
}
@ -127,7 +171,7 @@ bus_init_with_default_devs()
t = bus_init();
bus_device_add(&t, device_ram_init(), 0x0);
bus_device_add(&t, device_ram_init(0xDFFF), 0x0);
return t;
}
@ -139,7 +183,8 @@ bus_load_buf(bus_t *t, uint16_t addr, uint8_t *buf, uint16_t bufsize)
i = 0;
// XXX: add sanity checks
assert(buf != NULL);
assert(bufsize != 0);
while (i < bufsize) {
bus_write_1(t, addr+i, buf[i]); // XXX: overflow addr
@ -156,9 +201,12 @@ bus_load_file(bus_t *t, uint16_t addr, const char *filename)
int fd;
uint8_t data;
rk65c02_log(LOG_DEBUG, "Loading file %s at %x.", filename, addr);
fd = open(filename, O_RDONLY);
if (fd == -1) {
perror("Problem while trying to open file");
rk65c02_log(LOG_ERROR, "Problem while trying to open file: %s",
strerror(errno));
return false;
}
@ -174,8 +222,15 @@ bus_load_file(bus_t *t, uint16_t addr, const char *filename)
void
bus_finish(bus_t *t)
{
device_mapping_t *dm;
device_t *d;
assert(t != NULL);
/* TODO: foreach devices free 'em */
LL_FOREACH(t->dm_head, dm) {
d = dm->dev;
if ((d->finish) != NULL)
d->finish(d);
}
}

4
src/bus.h
View File

@ -18,8 +18,8 @@ typedef struct bus_tag bus_t;
uint8_t bus_read_1(bus_t *, uint16_t);
void bus_write_1(bus_t *, uint16_t, uint8_t);
bus_t bus_init();
bus_t bus_init_with_default_devs();
bus_t bus_init(void);
bus_t bus_init_with_default_devs(void);
void bus_finish(bus_t *);
bool bus_load_file(bus_t *, uint16_t, const char *);
bool bus_load_buf(bus_t *, uint16_t, uint8_t *, uint16_t);

40
src/debug.c
View File

@ -1,9 +1,30 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdlib.h>
#include <gc/gc.h>
#include <utlist.h>
#include "rk65c02.h"
#include "instruction.h"
#include "log.h"
#include "debug.h"
void
@ -17,6 +38,8 @@ debug_trace_print_all(rk65c02emu_t *e)
{
trace_t *tr;
instruction_t i;
char *instrstr;
char *regsstr;
if (e->trace_head == NULL)
return;
@ -25,11 +48,11 @@ debug_trace_print_all(rk65c02emu_t *e)
i.opcode = tr->opcode;
i.op1 = tr->op1;
i.op2 = tr->op2;
instrstr = instruction_string_get(&i);
regsstr = rk65c02_regs_string_get(tr->regs);
printf("TRACE %X:\t", tr->address);
instruction_print(&i);
printf("\t");
rk65c02_dump_regs(tr->regs);
rk65c02_log(LOG_TRACE, "%X: %s\t%s", tr->address, instrstr,
regsstr);
}
}
@ -40,11 +63,8 @@ debug_trace_savestate(rk65c02emu_t *e, uint16_t address, instrdef_t *id,
{
trace_t *tr;
tr = (trace_t *) malloc(sizeof(trace_t));
if (tr == NULL) {
fprintf(stderr, "Error allocating trace structure.\n");
return;
}
tr = (trace_t *) GC_MALLOC(sizeof(trace_t));
assert(tr != NULL);
tr->address = address;
@ -80,7 +100,7 @@ debug_breakpoint_add(rk65c02emu_t *e, uint16_t address)
{
breakpoint_t *bp;
bp = (breakpoint_t *) malloc(sizeof(breakpoint_t));
bp = (breakpoint_t *) GC_MALLOC(sizeof(breakpoint_t));
if (bp == NULL)
return false;

1
src/device.h
View File

@ -8,6 +8,7 @@ typedef struct device_t {
uint8_t (*read_1)(void *, uint16_t doff);
void (*write_1)(void *, uint16_t, uint8_t val);
void (*finish)(void *);
void *config;
void *aux; /* any dev space-specific data */

41
src/device_ram.c
View File

@ -1,13 +1,31 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <string.h>
#include <gc/gc.h>
#include "bus.h"
#include "device.h"
#define RAM_SIZE 0xDFFF /* should be configurable */
uint8_t device_ram_read_1(void *, uint16_t);
void device_ram_write_1(void *, uint16_t, uint8_t);
@ -36,29 +54,26 @@ device_ram_write_1(void *vd, uint16_t offset, uint8_t val)
}
device_t *
device_ram_init()
device_ram_init(uint16_t size)
{
device_t *d;
d = (device_t *) malloc(sizeof(device_t));
d = (device_t *) GC_MALLOC(sizeof(device_t));
assert(d != NULL);
d->name = "RAM";
d->size = RAM_SIZE;
d->size = size;
d->read_1 = device_ram_read_1;
d->write_1 = device_ram_write_1;
d->finish = NULL;
d->aux = malloc(RAM_SIZE);
memset(d->aux, 0, RAM_SIZE);
d->aux = GC_MALLOC(size);
assert(d->aux != NULL);
memset(d->aux, 0, size);
return d;
}
void
device_ram_finish(device_t *d)
{
free(d->aux);
}

2
src/device_ram.h
View File

@ -3,7 +3,7 @@
#include "device.h"
device_t * device_ram_init();
device_t * device_ram_init(uint16_t);
void device_ram_finish(device_t *);
#endif /* _DEVICE_RAM_H_ */

121
src/device_serial.c
View File

@ -1,121 +0,0 @@
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include "bus.h"
#include "device.h"
const static char *txpipepath = "/tmp/rk65c02_serial_tx"; /* should really be configurable */
const static char *rxpipepath = "/tmp/rk65c02_serial_rx"; /* should really be configurable */
struct device_serial_priv {
int txpipefd;
int rxpipefd;
};
uint8_t device_serial_read_1(void *, uint16_t);
void device_serial_write_1(void *, uint16_t, uint8_t);
uint8_t
device_serial_read_1(void *vd, uint16_t offset)
{
device_t *d;
struct device_serial_priv *dp;
uint8_t val, nread;
d = (device_t *) vd;
dp = d->aux;
switch (offset) {
case 0x1:
nread = read(dp->rxpipefd, &val, 1);;
if (nread == 0)
val = 0xFE;
if (nread == -1)
val = 0xFD;
default:
break;
}
// XXX: TODO
return 0xFF;
}
void
device_serial_write_1(void *vd, uint16_t offset, uint8_t val)
{
device_t *d;
struct device_serial_priv *dp;
d = (device_t *) vd;
dp = d->aux;
switch (offset) {
case 0x0:
/*fprintf(stderr, "writing to fd %d val %x\n", dp->txpipefd, val);*/
write(dp->txpipefd, &val, 1);
fsync(dp->txpipefd);
break;
default:
/* do nothing */
break;
}
}
device_t *
device_serial_init()
{
device_t *d;
struct device_serial_priv *dp;
d = (device_t *) malloc(sizeof(device_t));
assert(d != NULL);
d->name = "Serial";
d->size = 4;
d->read_1 = device_serial_read_1;
d->write_1 = device_serial_write_1;
dp = (struct device_serial_priv *) malloc(sizeof(struct device_serial_priv));
d->aux = dp;
if (mkfifo(txpipepath, S_IRUSR | S_IWUSR) != 0) {
fprintf(stderr, "Creating FIFO for serial port failed!\n");
/* perror, handle this failure... */
}
if (mkfifo(rxpipepath, S_IRUSR | S_IWUSR) != 0) {
fprintf(stderr, "Creating FIFO for serial port failed!\n");
/* perror, handle this failure... */
}
dp->txpipefd = open(txpipepath, O_WRONLY);
dp->rxpipefd = open(rxpipepath, O_RDONLY | O_NONBLOCK);
return d;
}
void
device_serial_finish(device_t *d)
{
struct device_serial_priv *dp;
dp = d->aux;
close(dp->txpipefd);
close(dp->rxpipefd);
unlink(txpipepath);
unlink(rxpipepath);
free(d->aux);
// XXX?
}

10
src/device_serial.h
View File

@ -1,10 +0,0 @@
#ifndef _DEVICE_SERIAL_H_
#define _DEVICE_SERIAL_H_
#include "device.h"
device_t * device_serial_init();
void device_serial_finish(device_t *);
#endif /* _DEVICE_SERIAL_H_ */

37
src/emulation.c
View File

@ -1,6 +1,26 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <assert.h>
#include "log.h"
#include "emulation.h"
/* RMB, SMB, BBR, BBS are handled by these */
@ -10,7 +30,7 @@ static void emul_bbr(rk65c02emu_t *, void *, instruction_t *, uint8_t);
static void emul_bbs(rk65c02emu_t *, void *, instruction_t *, uint8_t);
/* Convert 8-bit BCD to binary value. */
static inline uint8_t from_bcd(uint8_t val)
static uint8_t from_bcd(uint8_t val)
{
uint8_t rv;
@ -21,7 +41,7 @@ static inline uint8_t from_bcd(uint8_t val)
}
/* Convert 8-bit binary to BCD value. */
static inline uint8_t to_bcd(uint8_t val)
static uint8_t to_bcd(uint8_t val)
{
uint16_t shift, digit;
uint8_t bcd;
@ -238,9 +258,6 @@ emul_bbs7(rk65c02emu_t *e, void *id, instruction_t *i)
void
emul_bit(rk65c02emu_t *e, void *id, instruction_t *i)
{
/* uint8_t v = instruction_data_read_1(e, (instrdef_t *) id, i);
printf("%x\n", v);*/
/* zero flag set if acculumator AND memory equals zero */
if (e->regs.A & instruction_data_read_1(e, (instrdef_t *) id, i))
e->regs.P &= ~P_ZERO;
@ -1099,3 +1116,13 @@ emul_wai(rk65c02emu_t *e, void *id, instruction_t *i)
e->stopreason = WAI;
}
/* emulate invalid opcode (variable-lenght NOP) */
void
emul_invalid(rk65c02emu_t *e, void *id, instruction_t *i)
{
/* Essentially do nothing, but log this. */
rk65c02_log(LOG_WARN, "Invalid opcode %x at %x", i->opcode,
e->regs.PC);
}

303
src/instruction.c
View File

@ -1,14 +1,36 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#include <errno.h>
#include <assert.h>
#include <string.h>
#include <gc/gc.h>
#include "bus.h"
#include "rk65c02.h"
#include "65c02isa.h"
#include "log.h"
#include "instruction.h"
instruction_t
@ -54,145 +76,77 @@ instruction_fetch(bus_t *b, uint16_t addr)
void
instruction_print(instruction_t *i)
{
char *str;
str = instruction_string_get(i);
printf("%s", str);
}
char *
instruction_string_get(instruction_t *i)
{
#define INSTR_STR_LEN 16
instrdef_t id;
char *str;
str = GC_MALLOC(INSTR_STR_LEN);
assert(str != NULL);
memset(str, 0, INSTR_STR_LEN);
id = instruction_decode(i->opcode);
switch (id.mode) {
case IMPLIED:
printf("%s", id.mnemonic);
snprintf(str, INSTR_STR_LEN, "%s", id.mnemonic);
break;
case ACCUMULATOR:
printf("%s A", id.mnemonic);
snprintf(str, INSTR_STR_LEN, "%s A", id.mnemonic);
break;
case IMMEDIATE:
printf("%s #%#02x", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s #%#02x", id.mnemonic, i->op1);
break;
case ZP:
printf("%s %#02x", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x", id.mnemonic, i->op1);
break;
case ZPX:
printf("%s %#02x,X", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x,X", id.mnemonic, i->op1);
break;
case ZPY:
printf("%s %#02x,Y", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x,Y", id.mnemonic, i->op1);
break;
case IZP:
printf("%s (%#02x)", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s (%#02x)", id.mnemonic, i->op1);
break;
case IZPX:
printf("%s (%#02x,X)", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s (%#02x,X)", id.mnemonic, i->op1);
break;
case IZPY:
printf("%s (%#02x),Y", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s (%#02x),Y", id.mnemonic, i->op1);
break;
case ZPR:
printf("%s %#02x,%#02x", id.mnemonic, i->op1, i->op2);
snprintf(str, INSTR_STR_LEN, "%s %#02x,%#02x", id.mnemonic, i->op1, i->op2);
break;
case ABSOLUTE:
printf("%s %#02x%02x", id.mnemonic, i->op2, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x%02x", id.mnemonic, i->op2, i->op1);
break;
case ABSOLUTEX:
printf("%s %#02x%02x,X", id.mnemonic, i->op2, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x%02x,X", id.mnemonic, i->op2, i->op1);
break;
case ABSOLUTEY:
printf("%s %#02x%02x,Y", id.mnemonic, i->op2, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x%02x,Y", id.mnemonic, i->op2, i->op1);
break;
case IABSOLUTE:
printf("%s (%#02x%02x)", id.mnemonic, i->op2, i->op1);
snprintf(str, INSTR_STR_LEN, "%s (%#02x%02x)", id.mnemonic, i->op2, i->op1);
break;
case IABSOLUTEX:
printf("%s (%#02x%02x,X)", id.mnemonic, i->op2, i->op1);
snprintf(str, INSTR_STR_LEN, "%s (%#02x%02x,X)", id.mnemonic, i->op2, i->op1);
break;
case RELATIVE:
printf("%s %#02x", id.mnemonic, i->op1);
snprintf(str, INSTR_STR_LEN, "%s %#02x", id.mnemonic, i->op1);
break;
}
}
assembler_t
assemble_init(bus_t *b, uint16_t pc)
{
assembler_t asmblr;
asmblr.bus = b;
asmblr.pc = pc;
return asmblr;
}
bool
assemble_single_implied(assembler_t *a, const char *mnemonic)
{
return assemble_single(a, mnemonic, IMPLIED, 0, 0);
}
bool
assemble_single(assembler_t *a, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
{
uint8_t *asmbuf;
uint8_t bsize;
bool rv;
rv = assemble_single_buf(&asmbuf, &bsize, mnemonic, mode, op1, op2);
if (rv == false)
return rv;
rv = bus_load_buf(a->bus, a->pc, asmbuf, bsize);
free(asmbuf);
a->pc += bsize;
return rv;
}
bool
assemble_single_buf_implied(uint8_t **buf, uint8_t *bsize, const char *mnemonic)
{
return assemble_single_buf(buf, bsize, mnemonic, IMPLIED, 0, 0);
}
bool
assemble_single_buf(uint8_t **buf, uint8_t *bsize, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
{
instrdef_t id;
uint8_t opcode;
bool found;
found = false;
opcode = 0;
/* find the opcode for given mnemonic and addressing mode */
while (opcode < 0xFF) {
id = instruction_decode(opcode);
if ((strcmp(mnemonic, id.mnemonic) == 0) && (id.mode == mode)) {
found = true;
break;
}
opcode++;
}
if (!found) {
fprintf(stderr, "Couldn't find opcode for mnemonic %s mode %x\n", mnemonic, mode);
return false;
}
*bsize = id.size;
*buf = malloc(id.size);
if(*buf == NULL) {
fprintf(stderr, "Error allocating assembly buffer\n");
return false;
}
/* fill the buffer */
memset(*buf, 0, id.size);
(*buf)[0] = opcode;
/* XXX */
if (id.size > 1)
(*buf)[1] = op1;
if (id.size > 2)
(*buf)[2] = op2;
return found;
return str;
}
void
@ -248,116 +202,71 @@ instruction_status_adjust_negative(rk65c02emu_t *e, uint8_t regval)
void
instruction_data_write_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i, uint8_t val)
{
uint16_t iaddr;
switch (id->mode) {
case ZP:
case ZPR:
bus_write_1(e->bus, i->op1, val);
break;
case ZPX:
/* XXX: wraps around zero page? */
bus_write_1(e->bus, i->op1 + e->regs.X, val);
break;
case ZPY:
bus_write_1(e->bus, i->op1 + e->regs.Y, val);
break;
case IZP:
iaddr = bus_read_1(e->bus, i->op1);
iaddr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
bus_write_1(e->bus, iaddr, val);
break;
case ABSOLUTE:
bus_write_1(e->bus, i->op1 + (i->op2 << 8), val);
break;
case IZPX:
/* XXX */
iaddr = bus_read_1(e->bus, i->op1 + e->regs.X);
iaddr |= (bus_read_1(e->bus, i->op1 + e->regs.X + 1) << 8);
bus_write_1(e->bus, iaddr, val);
break;
case IZPY:
/* XXX */
iaddr = bus_read_1(e->bus, i->op1);
iaddr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
bus_write_1(e->bus, iaddr, val + e->regs.Y);
break;
case ABSOLUTEX:
bus_write_1(e->bus, (i->op1 + (i->op2 << 8)) + e->regs.X, val);
break;
case ABSOLUTEY:
bus_write_1(e->bus, (i->op1 + (i->op2 << 8)) + e->regs.Y, val);
break;
case ACCUMULATOR:
if (id->mode == ACCUMULATOR) {
e->regs.A = val;
break;
case IMMEDIATE:
case RELATIVE:
case IABSOLUTE:
case IABSOLUTEX:
/*
* IABSOLUTE, IABSOLUTEX, RELATIVE are only for branches
* and jumps. They do not read or write anything, only modify
* PC which is handled within emulation of a given opcode.
*/
default:
printf("unhandled addressing mode for opcode %x\n",
i->opcode);
break;
return;
}
if (id->mode == IMMEDIATE) {
rk65c02_panic(e,
"invalid IMMEDIATE addressing mode for opcode %x\n",
i->opcode);
return;
}
bus_write_1(e->bus, instruction_data_address(e, id, i), val);
}
uint8_t
instruction_data_read_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
{
uint8_t rv; /* data read from the bus */
uint16_t iaddr; /* indirect address */
if (id->mode == ACCUMULATOR)
return e->regs.A;
else if (id->mode == IMMEDIATE)
return i->op1;
rv = 0;
return bus_read_1(e->bus, instruction_data_address(e, id, i));
}
uint16_t
instruction_data_address(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
{
uint16_t addr;
addr = 0;
switch (id->mode) {
case ACCUMULATOR:
rv = e->regs.A;
break;
case IMMEDIATE:
rv = i->op1;
break;
case ZP:
case ZPR:
rv = bus_read_1(e->bus, i->op1);
addr = i->op1;
break;
case ZPX:
/* XXX: wraps around zero page? */
rv = bus_read_1(e->bus, i->op1 + e->regs.X);
addr = ((uint8_t) (i->op1 + e->regs.X));
break;
case ZPY:
rv = bus_read_1(e->bus, i->op1 + e->regs.Y);
addr = i->op1 + e->regs.Y;
break;
case IZP:
iaddr = bus_read_1(e->bus, i->op1);
iaddr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
rv = bus_read_1(e->bus, iaddr);
addr = bus_read_1(e->bus, i->op1);
addr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
break;
case IZPX:
/* XXX: what about page wraps / roll over */
iaddr = bus_read_1(e->bus, i->op1 + e->regs.X);
iaddr |= (bus_read_1(e->bus, i->op1 + e->regs.X + 1) << 8);
rv = bus_read_1(e->bus, iaddr);
case IZPX: /* Zero Page Indexed Indirect with X */
addr = bus_read_1(e->bus, (uint8_t) (i->op1 + e->regs.X));
addr |= (bus_read_1(e->bus, (uint8_t) (i->op1 + e->regs.X + 1)) << 8);
break;
case IZPY:
/* XXX: what about page wraps / roll over */
iaddr = bus_read_1(e->bus, i->op1);
iaddr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
rv = bus_read_1(e->bus, iaddr) + e->regs.Y;
case IZPY: /* Zero Page Indirect Indexed with Y */
addr = bus_read_1(e->bus, i->op1);
addr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
addr += e->regs.Y;
break;
case ABSOLUTE:
rv = bus_read_1(e->bus, i->op1 + (i->op2 << 8));
addr = i->op1 + (i->op2 << 8);
break;
case ABSOLUTEX:
rv = bus_read_1(e->bus, (i->op1 + (i->op2 << 8)) + e->regs.X);
addr = i->op1 + (i->op2 << 8) + e->regs.X;
break;
case ABSOLUTEY:
rv = bus_read_1(e->bus, (i->op1 + (i->op2 << 8)) + e->regs.Y);
addr = i->op1 + (i->op2 << 8) + e->regs.Y;
break;
case IABSOLUTE:
case IABSOLUTEX:
@ -368,12 +277,12 @@ instruction_data_read_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
* PC which is handled within emulation of a given opcode.
*/
default:
printf("unhandled addressing mode for opcode %x\n",
rk65c02_panic(e, "unhandled addressing mode for opcode %x\n",
i->opcode);
break;
}
return rv;
return addr;
}
/* put value onto the stack */
@ -416,3 +325,23 @@ instruction_modify_pc(instrdef_t *id)
return id->modify_pc;
}
/* find instr definition (and opcode) searching by mnemonic and addr mode */
bool
instruction_opcode_by_mnemonic(char *mnemonic, addressing_t mode, uint8_t *opcode, instrdef_t *id)
{
bool found;
found = false;
while ((*opcode) <= 0xFF) { /* this is stupid */
*id = instruction_decode(*opcode);
if ((strcmp(mnemonic, id->mnemonic) == 0) && (id->mode == mode)) {
found = true;
break;
}
(*opcode)++;
}
return found;
}

17
src/instruction.h
View File

@ -41,19 +41,14 @@ struct instrdef {
typedef struct instrdef instrdef_t;
struct assembler {
bus_t *bus;
uint16_t pc;
};
typedef struct assembler assembler_t;
instruction_t instruction_fetch(bus_t *, uint16_t);
instrdef_t instruction_decode(uint8_t);
void instruction_print(instruction_t *);
char * instruction_string_get(instruction_t *);
void disassemble(bus_t *, uint16_t);
uint8_t instruction_data_read_1(rk65c02emu_t *, instrdef_t *, instruction_t *);
void instruction_data_write_1(rk65c02emu_t *, instrdef_t *, instruction_t *, uint8_t);
uint16_t instruction_data_address(rk65c02emu_t *e, instrdef_t *id, instruction_t *i);
void instruction_status_adjust_zero(rk65c02emu_t *, uint8_t);
void instruction_status_adjust_negative(rk65c02emu_t *, uint8_t);
void stack_push(rk65c02emu_t *, uint8_t);
@ -61,12 +56,6 @@ uint8_t stack_pop(rk65c02emu_t *);
void program_counter_increment(rk65c02emu_t *, instrdef_t *);
bool instruction_modify_pc(instrdef_t *);
void program_counter_branch(rk65c02emu_t *, int8_t);
bool assemble_single_buf_implied(uint8_t **, uint8_t *, const char *);
bool assemble_single_buf(uint8_t **, uint8_t *, const char *, addressing_t, uint8_t, uint8_t);
assembler_t assemble_init(bus_t *, uint16_t);
bool assemble_single(assembler_t *, const char *, addressing_t, uint8_t, uint8_t);
bool assemble_single_implied(assembler_t *, const char *);
bool instruction_opcode_by_mnemonic(char *, addressing_t, uint8_t *, instrdef_t *);
#endif /* _INSTRUCTION_H_ */

60
src/log.c Normal file
View File

@ -0,0 +1,60 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdarg.h>
#include <time.h>
#include "log.h"
static const char *level_str[] = {
"NONE", /* should never appear in log */
"CRITICAL",
"ERROR",
"INFO",
"DEBUG",
"TRACE"
};
static uint8_t level = LOG_INFO;
void rk65c02_loglevel_set(uint8_t l)
{
level = l;
}
void rk65c02_log(uint8_t l, const char* fmt, ...)
{
va_list args;
struct timespec t;
if (l > level)
return;
clock_gettime(CLOCK_REALTIME, &t);
fprintf(stderr, "%lld.%lld %s:\t", (long long int) t.tv_sec,
(long long int) t.tv_nsec, level_str[l]);
va_start(args, fmt);
vfprintf(stderr, fmt, args);
va_end(args);
fprintf(stderr, "\n");
}

29
src/log.h Normal file
View File

@ -0,0 +1,29 @@
/**
* @file log.h
* @brief Logging-related functions.
*/
#include <stdint.h>
#define LOG_TRACE 5 /**< Most verbose log level. Used for tracing. */
#define LOG_DEBUG 4 /**< Debug-level messages. */
#define LOG_INFO 3 /**< Informational messages. */
#define LOG_WARN 4 /**< Warning messages. */
#define LOG_ERROR 2 /**< Errors. */
#define LOG_CRIT 1 /**< Critical errors. */
#define LOG_NOTHING 0 /**< At 0 nothing will get logged, can be set as
current level, but not when creating new log
messages. */
/**
* @brief Set the logging verbosity level.
* @param level Desired log verbosity level.
*/
void rk65c02_loglevel_set(uint8_t level);
/**
* @brief Send a message to log.
* @param level Log level at which message should be logged.
* @param fmt Message in a printf-like format.
*/
void rk65c02_log(uint8_t level, const char *fmt, ...);

182
src/rk65c02.c
View File

@ -1,21 +1,60 @@
/*
* SPDX-License-Identifier: GPL-3.0-only
*
* rk65c02
* Copyright (C) 2017-2021 Radoslaw Kujawa
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#include <stdarg.h>
#include <errno.h>
#include <assert.h>
#include <string.h>
#include <gc/gc.h>
#include "bus.h"
#include "instruction.h"
#include "rk65c02.h"
#include "log.h"
#include "debug.h"
void rk65c02_exec(rk65c02emu_t *);
/*
* Prepare the emulator for use, set initial CPU state.
*/
rk65c02emu_t
rk65c02_load_rom(const char *path, uint16_t load_addr, bus_t *b)
{
rk65c02emu_t e;
if (b == NULL) {
b = GC_MALLOC(sizeof(bus_t));
assert(b != NULL);
*b = bus_init_with_default_devs();
}
/* XXX: normal error handling instead of assert would be preferred */
assert(bus_load_file(b, load_addr, path));
e = rk65c02_init(b);
return e;
}
rk65c02emu_t
rk65c02_init(bus_t *b)
{
@ -31,15 +70,15 @@ rk65c02_init(bus_t *b)
e.irq = false;
e.bps_head = NULL;
e.trace = false;
e.trace_head = NULL;
e.runtime_disassembly = false;
rk65c02_log(LOG_DEBUG, "Initialized new emulator.");
return e;
}
/*
* Assert the IRQ line.
*/
void
rk65c02_assert_irq(rk65c02emu_t *e)
{
@ -51,13 +90,18 @@ rk65c02_assert_irq(rk65c02emu_t *e)
*/
e->irq = true;
/*
* If the CPU was put to sleep by executing WAI instruction, resume
* operation.
*
* Whether interrupt will immediately be serviced, or not, depends
* on normal "interrupt disable" flag behaviour, so here we just
* need to start the CPU.
*/
if ((e->state == STOPPED) && (e->stopreason == WAI))
rk65c02_start(e);
}
/*
* Respond to interrupt and start the interrupt service routine.
*/
void
rk65c02_irq(rk65c02emu_t *e)
{
@ -110,26 +154,18 @@ rk65c02_exec(rk65c02emu_t *e)
i = instruction_fetch(e->bus, e->regs.PC);
id = instruction_decode(i.opcode);
if (id.emul != NULL) {
id.emul(e, &id, &i);
assert(id.emul);
if (!instruction_modify_pc(&id))
program_counter_increment(e, &id);
} else {
printf("unimplemented opcode %X @ %X\n", i.opcode,
e->regs.PC);
e->state = STOPPED;
e->stopreason = EMUERROR;
}
id.emul(e, &id, &i);
if (!instruction_modify_pc(&id))
program_counter_increment(e, &id);
if (e->trace)
debug_trace_savestate(e, tpc, &id, &i);
}
/*
* Start the emulator.
*/
void
rk65c02_start(rk65c02emu_t *e) {
@ -141,9 +177,6 @@ rk65c02_start(rk65c02emu_t *e) {
}
}
/*
* Execute as many instructions as specified in steps argument.
*/
void
rk65c02_step(rk65c02emu_t *e, uint16_t steps) {
@ -185,72 +218,51 @@ rk65c02_dump_stack(rk65c02emu_t *e, uint8_t n)
void
rk65c02_dump_regs(reg_state_t regs)
{
printf("A: %X X: %X Y: %X PC: %X SP: %X P: ",
regs.A, regs.X, regs.Y, regs.PC, regs.SP);
char *str;
if (regs.P & P_NEGATIVE)
printf("N");
else
printf("-");
str = rk65c02_regs_string_get(regs);
if (regs.P & P_SIGN_OVERFLOW)
printf("V");
else
printf("-");
printf ("%s\n", str);
if (regs.P & P_UNDEFINED)
printf("1");
else
printf("-");
if (regs.P & P_BREAK)
printf("B");
else
printf("-");
if (regs.P & P_DECIMAL)
printf("D");
else
printf("-");
if (regs.P & P_IRQ_DISABLE)
printf("I");
else
printf("-");
if (regs.P & P_ZERO)
printf("Z");
else
printf("-");
if (regs.P & P_CARRY)
printf("C");
else
printf("-");
printf("\n");
}
/*
int
main(void)
char *
rk65c02_regs_string_get(reg_state_t regs)
{
bus_t b;
#define REGS_STR_LEN 50
char *str;
b = bus_init();
/* XXX: string allocation to a separate utility function? */
str = GC_MALLOC(REGS_STR_LEN);
assert(str != NULL);
memset(str, 0, REGS_STR_LEN);
bus_write_1(&b, 0, OP_INX);
bus_write_1(&b, 1, OP_NOP);
bus_write_1(&b, 2, OP_LDY_IMM);
bus_write_1(&b, 3, 0x1);
bus_write_1(&b, 4, OP_TSB_ZP);
bus_write_1(&b, 5, 0x3);
bus_write_1(&b, 6, OP_JSR);
bus_write_1(&b, 7, 0x09);
bus_write_1(&b, 8, 0x0);
bus_write_1(&b, 9, OP_STP);
snprintf(str, REGS_STR_LEN, "A: %X X: %X Y: %X PC: %X SP: %X P: %c%c%c%c%c%c%c%c",
regs.A, regs.X, regs.Y, regs.PC, regs.SP,
(regs.P & P_NEGATIVE) ? 'N' : '-',
(regs.P & P_SIGN_OVERFLOW) ? 'V' : '-',
(regs.P & P_UNDEFINED) ? '1' : '-',
(regs.P & P_BREAK) ? 'B' : '-',
(regs.P & P_DECIMAL) ? 'D' : '-',
(regs.P & P_IRQ_DISABLE) ? 'I' : '-',
(regs.P & P_ZERO) ? 'Z' : '-',
(regs.P & P_CARRY) ? 'C' : '-');
rk6502_start(&b, 0);
bus_finish(&b);
return str;
}
*/
void
rk65c02_panic(rk65c02emu_t *e, const char* fmt, ...)
{
va_list args;
va_start(args, fmt);
rk65c02_log(LOG_CRIT, fmt, args);
va_end(args);
e->state = STOPPED;
e->stopreason = EMUERROR;
/* TODO: run some UI callback. */
}

127
src/rk65c02.h
View File

@ -1,42 +1,54 @@
/** @file rk65c02.h
* @brief Public functions for managing rk65c02 emulator.
*/
#ifndef _RK6502_H_
#define _RK6502_H_
#include "bus.h"
/**
* @brief State of the emulator.
*/
typedef enum {
STOPPED,
RUNNING,
STEPPING /* XXX: how to implement? */
STOPPED, /**< Stopped. */
RUNNING, /**< Running. */
STEPPING /**< Stepping. */
} emu_state_t;
/**
* @brief Enum describing why emulation stopped.
*/
typedef enum {
STP, /* due to 65C02 STP instruction */
WAI, /* waiting for interrupt */
BREAKPOINT, /* due to breakpoint set */
WATCHPOINT, /* due to watchpoint set */
STEPPED, /* stepped appropriate number of instructions */
HOST, /* due to host stop function called */
EMUERROR /* due to emulator error */
STP, /**< Due to 65C02 STP instruction. */
WAI, /**< Waiting for interrupt (WAI instruction). */
BREAKPOINT, /**< Due to breakpoint set. */
WATCHPOINT, /**< Due to watchpoint set (not implemented). */
STEPPED, /**< Stepped appropriate number of instructions. */
HOST, /**< Due to host stop function called. */
EMUERROR /**< Due to emulator error. */
} emu_stop_reason_t;
/**
* @brief State of the emulated CPU registers.
*/
struct reg_state {
uint8_t A; /* accumulator */
uint8_t X; /* index X */
uint8_t Y; /* index Y */
uint8_t A; /**< Accumulator. */
uint8_t X; /**< Index X. */
uint8_t Y; /**< Index Y. */
uint16_t PC; /* program counter */
uint8_t SP; /* stack pointer */
uint8_t P; /* status */
uint16_t PC; /**< Program counter. */
uint8_t SP; /**< Stack pointer. */
uint8_t P; /**< Status. */
};
typedef struct reg_state reg_state_t;
#define P_CARRY 0x1
#define P_ZERO 0x2
#define P_IRQ_DISABLE 0x4
#define P_DECIMAL 0x8
#define P_BREAK 0x10
#define P_UNDEFINED 0x20
#define P_IRQ_DISABLE 0x4 /**< Status register flag: IRQ disabled */
#define P_DECIMAL 0x8 /**< Status register flag: BCD mode */
#define P_BREAK 0x10 /**< Status register flag: BRK was the cause of interrupt */
#define P_UNDEFINED 0x20 /**< Status register flag: Undefined (always 1) */
#define P_SIGN_OVERFLOW 0x40
#define P_NEGATIVE 0x80
@ -61,27 +73,76 @@ typedef struct trace_t {
struct trace_t *prev,*next;
} trace_t;
/**
* @brief Instance of the emulator.
*/
struct rk65c02emu {
emu_state_t state;
bus_t *bus;
reg_state_t regs;
emu_stop_reason_t stopreason;
bool irq; /* interrupt request line state, true is asserted */
emu_state_t state; /**< Current emulator status. */
bus_t *bus; /**< Bus to which CPU is attached. */
reg_state_t regs; /**< CPU registers. */
emu_stop_reason_t stopreason; /**< Reason for stopping emulation. */
bool irq; /**< Interrupt request line state, true is asserted. */
breakpoint_t *bps_head; /* pointer to linked list with breakpoints */
bool runtime_disassembly; /* disassemble code when emulator is running */
bool trace; /* tracing mode enable/disable */
trace_t *trace_head; /* pointer to linked list with trace log */
breakpoint_t *bps_head; /**< Pointer to linked list with breakpoints. */
bool runtime_disassembly; /**< Disassemble code when emulator is running. */
bool trace; /**< Tracing mode enable/disable. */
trace_t *trace_head; /**< Pointer to linked list with trace log. */
};
typedef struct rk65c02emu rk65c02emu_t;
rk65c02emu_t rk65c02_init(bus_t *);
void rk65c02_start(rk65c02emu_t *);
void rk65c02_step(rk65c02emu_t *, uint16_t);
void rk65c02_dump_regs(reg_state_t regs);
/**
* @brief Initialize the new emulator instance. Set initial CPU state.
* @param b Bus description.
* @return New emulator instance.
*/
rk65c02emu_t rk65c02_init(bus_t *b);
/**
* @brief Start the emulator.
* @param e Emulator instance.
*/
void rk65c02_start(rk65c02emu_t *e);
/**
* @brief Execute as many instructions as specified in steps argument.
* @param e Emulator instance.
* @param steps Number of instructions to execute.
*/
void rk65c02_step(rk65c02emu_t *e, uint16_t steps);
char *rk65c02_regs_string_get(reg_state_t);
void rk65c02_dump_regs(reg_state_t);
void rk65c02_dump_stack(rk65c02emu_t *, uint8_t);
/**
* @brief Assert the IRQ line.
* @param e Emulator instance.
*/
void rk65c02_assert_irq(rk65c02emu_t *e);
/**
* @brief Respond to interrupt and start the interrupt service routine.
* @param e Emulator instance.
*/
void rk65c02_irq(rk65c02emu_t *e);
/**
* @brief Handle critical error - send message to log and stop emulation.
* @param e Emulator instance.
* @param fmt Message in printf-like format.
*/
void rk65c02_panic(rk65c02emu_t *e, const char *fmt, ...);
/**
* @brief Prep the emulator, load code from file, pass bus config optionally.
* @param path Path to ROM file to be loaded.
* @param load_addr Address on the bus where ROM should be loaded.
* @param b Pre-existing bus configuration, pass NULL if default requested.
* @return New instance of the emulator prepared to run the ROM.
*/
rk65c02emu_t rk65c02_load_rom(const char *path, uint16_t load_addr,
bus_t *b);
#endif

63
src/rk65c02cli.c
View File

@ -1,63 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#include <unistd.h>
#include <string.h>
#include <assert.h>
#include <readline/readline.h>
#include <readline/history.h>
#include "bus.h"
#include "instruction.h"
#include "rk65c02.h"
/*
int
main(void)
{
bus_t b;
b = bus_init();
bus_write_1(&b, 0, OP_INX);
bus_write_1(&b, 1, OP_NOP);
bus_write_1(&b, 2, OP_LDY_IMM);
bus_write_1(&b, 3, 0x1);
bus_write_1(&b, 4, OP_TSB_ZP);
bus_write_1(&b, 5, 0x3);
bus_write_1(&b, 6, OP_JSR);
bus_write_1(&b, 7, 0x09);
bus_write_1(&b, 8, 0x0);
bus_write_1(&b, 9, OP_STP);
rk6502_start(&b, 0);
bus_finish(&b);
}
*/
int main()
{
char* input, shell_prompt[100];
rl_bind_key('\t', rl_complete);
while(true) {
snprintf(shell_prompt, sizeof(shell_prompt), "> ");
input = readline(shell_prompt);
if (!input)
break;
add_history(input);
free(input);
}
return EXIT_SUCCESS;
}

17
test/Makefile
View File

@ -1,8 +1,19 @@
CFLAGS=-Wall -I../src -g
LDFLAGS=-latf-c
UNAME_S := $(shell uname -s)
CFLAGS=-Wall -I../src -ggdb -Og
LDFLAGS=-latf-c -lgc
LDFLAGS_MACOSX=-L/opt/local/lib
CFLAGS_MACOSX=-I/opt/local/include -I/opt/local/include/uthash
ifeq ($(UNAME_S),Darwin)
CFLAGS+=$(CFLAGS_MACOSX)
LDFLAGS+=$(LDFLAGS_MACOSX)
endif
RK6502LIB=../src/librk65c02.a
VASM=vasm6502_std
VASMFLAGS=-Fbin -c02
VASMFLAGS=-Fbin -wdc02
UTILS=utils.o
TESTS=test_bus test_emulation test_stepping test_assemble test_interrupt test_debug test_device_serial test_jit

4
test/test_assemble.c
View File

@ -7,6 +7,7 @@
#include "bus.h"
#include "rk65c02.h"
#include "assembler.h"
#include "instruction.h"
#include "utils.h"
@ -28,20 +29,17 @@ ATF_TC_BODY(assemble_single_buf, tc)
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
ATF_CHECK(asmbuf[0] == 0xEA); /* check if nop really */
ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
free(asmbuf);
caddr += bsize;
ATF_REQUIRE(assemble_single_buf(&asmbuf, &bsize, "lda", IMMEDIATE, 0xAA, 0));
ATF_CHECK(asmbuf[0] == 0xA9); /* check if lda really */
ATF_CHECK(asmbuf[1] == 0xAA); /* check the operand */
ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
free(asmbuf);
caddr += bsize;
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "stp"));
ATF_CHECK(asmbuf[0] == 0xDB); /* check if stp really */
ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
free(asmbuf);
caddr += bsize;
rk65c02_start(&e);

5
test/test_debug.c
View File

@ -9,9 +9,11 @@
#include "bus.h"
#include "rk65c02.h"
#include "assembler.h"
#include "instruction.h"
#include "debug.h"
#include "utils.h"
#include "log.h"
ATF_TC_WITHOUT_HEAD(breakpoint);
ATF_TC_BODY(breakpoint, tc)
@ -54,10 +56,13 @@ ATF_TC_BODY(trace, tc)
trace_t *tr;
int i;
rk65c02_loglevel_set(LOG_TRACE);
b = bus_init_with_default_devs();
a = assemble_init(&b, ROM_LOAD_ADDR);
e = rk65c02_init(&b);
e.regs.PC = ROM_LOAD_ADDR;
debug_trace_set(&e, true);

562
test/test_emulation.c
View File

@ -6,8 +6,10 @@
#include "bus.h"
#include "rk65c02.h"
#include "assembler.h"
#include "instruction.h"
#include "debug.h"
#include "log.h"
#include "utils.h"
ATF_TC_WITHOUT_HEAD(emul_bit);
@ -122,7 +124,7 @@ ATF_TC_BODY(emul_cmp, tc)
e.regs.Y = 0x01;
bus_write_1(&b, 0x22, 0x0);
bus_write_1(&b, 0x23, 0x20);
bus_write_1(&b, 0x2000, 0xF);
bus_write_1(&b, 0x2001, 0x10);
rk65c02_dump_regs(e.regs);
ATF_REQUIRE(rom_start(&e, "test_emulation_cmp_izpy.rom", tc));
rk65c02_dump_regs(e.regs);
@ -427,6 +429,33 @@ ATF_TC_BODY(emul_lda, tc)
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_zp.rom", tc));
ATF_CHECK(e.regs.A == 0xAE);
/* LDA zero page X */
bus_write_1(&b, 0x12, 0xAF);
e.regs.X = 0x1;
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_zpx.rom", tc));
ATF_CHECK(e.regs.A == 0xAF);
/* LDA indirect zero page */
bus_write_1(&b, 0x1A, 0x10);
bus_write_1(&b, 0x1B, 0x2E);
bus_write_1(&b, 0x2E10, 0xAA);
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_izp.rom", tc));
ATF_CHECK(e.regs.A == 0xAA);
/* LDA indirect zero page X */
bus_write_1(&b, 0x20, 0);
bus_write_1(&b, 0x21, 0x2E);
bus_write_1(&b, 0x2E00, 0x55);
e.regs.X = 0x01;
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_izpx.rom", tc));
ATF_CHECK(e.regs.A == 0x55);
/* LDA indirect zero page Y */
bus_write_1(&b, 0x2E10, 0xAA);
e.regs.Y = 0x10;
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_izpy.rom", tc));
ATF_CHECK(e.regs.A == 0xAA);
/* LDA absolute */
bus_write_1(&b, 0x2F5A, 0xEA);
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_abs.rom", tc));
@ -438,7 +467,7 @@ ATF_TC_BODY(emul_lda, tc)
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_absx.rom", tc));
ATF_CHECK(e.regs.A == 0xEB);
/* LDA absolute X */
/* LDA absolute Y */
bus_write_1(&b, 0x2F5E, 0xEC);
e.regs.Y = 0x5E;
ATF_REQUIRE(rom_start(&e, "test_emulation_lda_absy.rom", tc));
@ -456,11 +485,28 @@ ATF_TC_BODY(emul_stz, tc)
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
/* STZ zp */
/* STZ zero page */
bus_write_1(&b, 0x10, 0xAA);
ATF_REQUIRE(rom_start(&e, "test_emulation_stz_zp.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x10) == 0x00);
/* STZ zero page X */
bus_write_1(&b, 0x15, 0x55);
e.regs.X = 0x4;
ATF_REQUIRE(rom_start(&e, "test_emulation_stz_zpx.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x15) == 0x00);
/* STZ absolute */
bus_write_1(&b, 0x2000, 0xAA);
ATF_REQUIRE(rom_start(&e, "test_emulation_stz_abs.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x2000) == 0x00);
/* STZ absolute X */
bus_write_1(&b, 0x2005, 0x55);
e.regs.X = 0x1;
ATF_REQUIRE(rom_start(&e, "test_emulation_stz_absx.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x2005) == 0x00);
bus_finish(&b);
}
@ -542,6 +588,124 @@ ATF_TC_BODY(emul_and, tc)
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_asl);
ATF_TC_BODY(emul_asl, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.A = 0xAA;
e.regs.X = 0x1;
bus_write_1(&b, 0x10, 0xAA);
bus_write_1(&b, 0x11, 0xAA);
bus_write_1(&b, 0x300, 0xFF);
bus_write_1(&b, 0x301, 0xFF);
ATF_REQUIRE(rom_start(&e, "test_emulation_asl.rom", tc));
ATF_CHECK(e.regs.A == 0x54);
ATF_CHECK(bus_read_1(&b, 0x10) == 0x54);
ATF_CHECK(bus_read_1(&b, 0x11) == 0x54);
ATF_CHECK(bus_read_1(&b, 0x300) == 0xFE);
ATF_CHECK(bus_read_1(&b, 0x301) == 0xFE);
ATF_CHECK(e.regs.P & P_CARRY);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_lsr);
ATF_TC_BODY(emul_lsr, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.A = 0x55;
e.regs.X = 0x1;
bus_write_1(&b, 0x10, 0x55);
bus_write_1(&b, 0x11, 0x55);
bus_write_1(&b, 0x300, 0xFF);
bus_write_1(&b, 0x301, 0xFF);
ATF_REQUIRE(rom_start(&e, "test_emulation_lsr.rom", tc));
ATF_CHECK(e.regs.A == 0x2A);
ATF_CHECK(bus_read_1(&b, 0x10) == 0x2A);
ATF_CHECK(bus_read_1(&b, 0x11) == 0x2A);
ATF_CHECK(bus_read_1(&b, 0x300) == 0x7F);
ATF_CHECK(bus_read_1(&b, 0x301) == 0x7F);
ATF_CHECK(e.regs.P & P_CARRY);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_rol);
ATF_TC_BODY(emul_rol, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.A = 0x55;
e.regs.P |= P_CARRY;
e.regs.X = 0x1;
bus_write_1(&b, 0x10, 0x55);
bus_write_1(&b, 0x11, 0xFF);
bus_write_1(&b, 0x200, 0xAA);
bus_write_1(&b, 0x201, 0x01);
ATF_REQUIRE(rom_start(&e, "test_emulation_rol.rom", tc));
ATF_CHECK(e.regs.A == 0xAB);
ATF_CHECK(bus_read_1(&b, 0x10) == 0xAA);
ATF_CHECK(bus_read_1(&b, 0x11) == 0xFE);
ATF_CHECK(bus_read_1(&b, 0x200) == 0x55);
ATF_CHECK(bus_read_1(&b, 0x201) == 0x3);
ATF_CHECK(e.regs.P ^ P_CARRY);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_ror);
ATF_TC_BODY(emul_ror, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.A = 0x55;
e.regs.P |= P_CARRY;
e.regs.X = 0x1;
bus_write_1(&b, 0x10, 0x55);
bus_write_1(&b, 0x11, 0xFF);
bus_write_1(&b, 0x200, 0xAA);
bus_write_1(&b, 0x201, 0x01);
ATF_REQUIRE(rom_start(&e, "test_emulation_ror.rom", tc));
ATF_CHECK(e.regs.A == 0xAA);
ATF_CHECK(bus_read_1(&b, 0x10) == 0xAA);
ATF_CHECK(bus_read_1(&b, 0x11) == 0xFF);
ATF_CHECK(bus_read_1(&b, 0x200) == 0xD5);
ATF_CHECK(bus_read_1(&b, 0x201) == 0x0);
ATF_CHECK(e.regs.P & P_CARRY);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_nop);
ATF_TC_BODY(emul_nop, tc)
{
@ -606,15 +770,65 @@ ATF_TC_BODY(emul_sta, tc)
ATF_REQUIRE(rom_start(&e, "test_emulation_sta_izpx.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x2010) == 0xAA);
/* STA indirect zero page Y */
e.regs.A = 0x54;
e.regs.A = 0x55;
e.regs.X = 0;
e.regs.Y = 0x1;
ATF_REQUIRE(rom_start(&e, "test_emulation_sta_izpy.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x2010) == 0x55);
ATF_CHECK(bus_read_1(&b, 0x2011) == 0x55);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_stx);
ATF_TC_BODY(emul_stx, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
/* STX zero page */
e.regs.X = 0xAA;
ATF_REQUIRE(rom_start(&e, "test_emulation_stx_zp.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x20) == 0xAA);
/* STX zero page Y */
e.regs.X = 0x55;
e.regs.Y = 0x1;
ATF_REQUIRE(rom_start(&e, "test_emulation_stx_zpy.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x20) == 0x55);
/* STX absolute */
e.regs.X = 0xAA;
ATF_REQUIRE(rom_start(&e, "test_emulation_stx_abs.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x2010) == 0xAA);
}
ATF_TC_WITHOUT_HEAD(emul_sty);
ATF_TC_BODY(emul_sty, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
/* STY zero page */
e.regs.Y = 0xAA;
ATF_REQUIRE(rom_start(&e, "test_emulation_sty_zp.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x20) == 0xAA);
/* STY zero page X */
e.regs.Y = 0x55;
e.regs.X = 0x1;
ATF_REQUIRE(rom_start(&e, "test_emulation_sty_zpx.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x20) == 0x55);
/* STY absolute */
e.regs.Y = 0xAA;
ATF_REQUIRE(rom_start(&e, "test_emulation_sty_abs.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x2010) == 0xAA);
}
ATF_TC_WITHOUT_HEAD(emul_ora);
ATF_TC_BODY(emul_ora, tc)
{
@ -673,7 +887,7 @@ ATF_TC_BODY(emul_ora, tc)
e.regs.A = 0xAA;
e.regs.X = 0;
e.regs.Y = 0x1;
bus_write_1(&b, 0x2A04, 0x54);
bus_write_1(&b, 0x2A05, 0x55);
bus_write_1(&b, 0x14, 0x04);
bus_write_1(&b, 0x15, 0x2A);
ATF_REQUIRE(rom_start(&e, "test_emulation_ora_izpy.rom", tc));
@ -682,6 +896,31 @@ ATF_TC_BODY(emul_ora, tc)
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_tsx_txs);
ATF_TC_BODY(emul_tsx_txs, tc)
{
rk65c02emu_t e;
bus_t b;
uint8_t prevflags;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.SP = 0xFF;
e.regs.X = 0x10;
prevflags = e.regs.P;
ATF_REQUIRE(rom_start(&e, "test_emulation_txs.rom", tc));
ATF_CHECK(e.regs.P == prevflags);
ATF_CHECK(e.regs.SP == 0x10);
e.regs.X = 0;
ATF_REQUIRE(rom_start(&e, "test_emulation_tsx.rom", tc));
ATF_CHECK(e.regs.X == 0x10);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_txa_tya_tax_tay);
ATF_TC_BODY(emul_txa_tya_tax_tay, tc)
{
@ -892,6 +1131,88 @@ ATF_TC_BODY(emul_jsr_rts, tc)
}
ATF_TC_WITHOUT_HEAD(emul_bbr);
ATF_TC_BODY(emul_bbr, tc)
{
rk65c02emu_t e;
bus_t b;
assembler_t a;
uint8_t i, val;
uint16_t opc;
char instr[] = "bbr ";
b = bus_init_with_default_devs();
a = assemble_init(&b, ROM_LOAD_ADDR);
e = rk65c02_init(&b);
e.regs.PC = ROM_LOAD_ADDR;
for (i = 0; i < 8; i++) {
val = 0xFF & ~(1 << i);
bus_write_1(&b, 0x10+i, val);
}
for (i = 0; i < 8; i++) {
instr[3] = '0'+i;
ATF_REQUIRE(assemble_single(&a, instr, ZPR, 0x10+i, 0x70));
}
e.runtime_disassembly = true;
for (i = 0; i < 8; i++) {
opc = e.regs.PC;
rk65c02_step(&e, 1);
ATF_CHECK(e.regs.PC == opc + 2 + 0x70);
rk65c02_dump_regs(e.regs);
e.regs.PC = ROM_LOAD_ADDR + (3 * (i + 1));
}
}
ATF_TC_WITHOUT_HEAD(emul_bbs);
ATF_TC_BODY(emul_bbs, tc)
{
rk65c02emu_t e;
bus_t b;
assembler_t a;
uint8_t i;
uint16_t opc;
char instr[] = "bbs ";
b = bus_init_with_default_devs();
a = assemble_init(&b, ROM_LOAD_ADDR);
e = rk65c02_init(&b);
e.regs.PC = ROM_LOAD_ADDR;
for (i = 0; i < 8; i++) {
bus_write_1(&b, 0x10+i, 1 << i);
}
for (i = 0; i < 8; i++) {
instr[3] = '0'+i;
ATF_REQUIRE(assemble_single(&a, instr, ZPR, 0x10+i, 0x70));
}
e.runtime_disassembly = true;
for (i = 0; i < 8; i++) {
opc = e.regs.PC;
rk65c02_step(&e, 1);
ATF_CHECK(e.regs.PC == opc + 2 + 0x70);
rk65c02_dump_regs(e.regs);
e.regs.PC = ROM_LOAD_ADDR + (3 * (i + 1));
}
}
ATF_TC_WITHOUT_HEAD(emul_branch);
ATF_TC_BODY(emul_branch, tc)
{
@ -1165,6 +1486,20 @@ ATF_TC_BODY(emul_sign_overflow_thorough, tc)
}
ATF_TC_WITHOUT_HEAD(emul_signed_comparison);
ATF_TC_BODY(emul_signed_comparison, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
ATF_REQUIRE(rom_start(&e, "test_emulation_signed_comparison.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x13) == 0x0);
}
ATF_TC_WITHOUT_HEAD(emul_sbc);
ATF_TC_BODY(emul_sbc, tc)
{
@ -1181,6 +1516,70 @@ ATF_TC_BODY(emul_sbc, tc)
}
ATF_TC_WITHOUT_HEAD(emul_adc);
ATF_TC_BODY(emul_adc, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.P &= ~P_CARRY;
e.regs.A = 0x2;
/* ADC immediate */
ATF_REQUIRE(rom_start(&e, "test_emulation_adc_imm.rom", tc));
ATF_CHECK(e.regs.A == 0x05);
ATF_CHECK(!(e.regs.P & P_ZERO));
ATF_CHECK(!(e.regs.P & P_CARRY));
ATF_CHECK(!(e.regs.P & P_SIGN_OVERFLOW));
ATF_CHECK(!(e.regs.P & P_NEGATIVE));
/* ADC zero page */
bus_write_1(&b, 0x10, 0xFB);
ATF_REQUIRE(rom_start(&e, "test_emulation_adc_zp.rom", tc));
ATF_CHECK(e.regs.A == 0x00);
ATF_CHECK(e.regs.P & P_ZERO);
ATF_CHECK(e.regs.P & P_CARRY);
ATF_CHECK(!(e.regs.P & P_SIGN_OVERFLOW));
ATF_CHECK(!(e.regs.P & P_NEGATIVE));
/* ADC zero page X */
e.regs.X = 0x01;
bus_write_1(&b, 0x12, 0x3);
ATF_REQUIRE(rom_start(&e, "test_emulation_adc_zpx.rom", tc));
ATF_CHECK(e.regs.A == 0x04);
ATF_CHECK(!(e.regs.P & P_ZERO));
ATF_CHECK(!(e.regs.P & P_CARRY));
ATF_CHECK(!(e.regs.P & P_SIGN_OVERFLOW));
ATF_CHECK(!(e.regs.P & P_NEGATIVE));
/* ADC absolute */
e.regs.A = 0x55;
bus_write_1(&b, 0x2A00, 0xAB);
ATF_REQUIRE(rom_start(&e, "test_emulation_adc_abs.rom", tc));
ATF_CHECK(e.regs.A == 0x0);
ATF_CHECK(e.regs.P & P_ZERO);
ATF_CHECK(e.regs.P & P_CARRY);
ATF_CHECK(!(e.regs.P & P_SIGN_OVERFLOW));
ATF_CHECK(!(e.regs.P & P_NEGATIVE));
/* ADC absolute X */
e.regs.A = 0x50;
e.regs.X = 0x10;
bus_write_1(&b, 0x2A10, 0x50);
ATF_REQUIRE(rom_start(&e, "test_emulation_adc_absx.rom", tc));
ATF_CHECK(e.regs.A == 0xA1);
ATF_CHECK(!(e.regs.P & P_ZERO));
ATF_CHECK(!(e.regs.P & P_CARRY));
ATF_CHECK(e.regs.P & P_SIGN_OVERFLOW);
ATF_CHECK(e.regs.P & P_NEGATIVE);
rk65c02_dump_regs(e.regs);
}
ATF_TC_WITHOUT_HEAD(emul_adc_bcd);
ATF_TC_BODY(emul_adc_bcd, tc)
{
@ -1202,7 +1601,6 @@ ATF_TC_BODY(emul_adc_bcd, tc)
ATF_CHECK(bus_read_1(&b, 0x41) & P_CARRY);
rk65c02_dump_regs(e.regs);
}
ATF_TC_WITHOUT_HEAD(emul_sbc_bcd);
@ -1245,6 +1643,19 @@ ATF_TC_BODY(emul_adc_16bit, tc)
ATF_CHECK(bus_read_1(&b, 0x66) == 0xFF);
ATF_CHECK(bus_read_1(&b, 0x67) == 0xFF);
e = rk65c02_init(&b);
bus_write_1(&b, 0x62, 0xFF);
bus_write_1(&b, 0x63, 0xFF);
bus_write_1(&b, 0x64, 0xFF);
bus_write_1(&b, 0x65, 0xFF);
ATF_REQUIRE(rom_start(&e, "test_emulation_adc_16bit.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x66) == 0xFE);
ATF_CHECK(bus_read_1(&b, 0x67) == 0xFF);
rk65c02_dump_regs(e.regs);
}
@ -1348,13 +1759,135 @@ ATF_TC_BODY(emul_smb, tc)
}
}
ATF_TC_WITHOUT_HEAD(emul_trb);
ATF_TC_BODY(emul_trb, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
ATF_REQUIRE(rom_start(&e, "test_emulation_trb.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x10) == 0x84);
ATF_CHECK(bus_read_1(&b, 0x11) == 0xA6);
}
ATF_TC_WITHOUT_HEAD(emul_tsb);
ATF_TC_BODY(emul_tsb, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
ATF_REQUIRE(rom_start(&e, "test_emulation_tsb.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x10) == 0xB7);
ATF_CHECK(bus_read_1(&b, 0x11) == 0xE7);
}
ATF_TC_WITHOUT_HEAD(emul_wrap_izpx);
ATF_TC_BODY(emul_wrap_izpx, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.A = 0xAA;
e.regs.X = 0xA0;
bus_write_1(&b, 0xB0, 0x10);
bus_write_1(&b, 0xB1, 0x20);
bus_write_1(&b, 0x90, 0x11);
bus_write_1(&b, 0x91, 0x20);
bus_write_1(&b, 0x2011, 0x55);
rk65c02_dump_regs(e.regs);
ATF_REQUIRE(rom_start(&e, "test_emulation_wrap_izpx.rom", tc));
rk65c02_dump_regs(e.regs);
ATF_CHECK(bus_read_1(&b, 0x2010) == 0xAA);
ATF_CHECK(e.regs.A == 0x55);
}
ATF_TC_WITHOUT_HEAD(emul_wrap_zpx);
ATF_TC_BODY(emul_wrap_zpx, tc)
{
rk65c02emu_t e;
bus_t b;
uint16_t i;
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.regs.A = 0xAA;
e.regs.X = 0x7F;
ATF_REQUIRE(rom_start(&e, "test_emulation_wrap_zpx.rom", tc));
ATF_CHECK(bus_read_1(&b, 0x8F) == 0xAA);
ATF_CHECK(bus_read_1(&b, 0xFF) == 0xAA);
ATF_CHECK(bus_read_1(&b, 0x00) == 0xAA);
ATF_CHECK(bus_read_1(&b, 0x01) == 0xAA);
ATF_CHECK(bus_read_1(&b, 0x7E) == 0xAA);
i = 0x200;
while (i < 0x205) {
ATF_CHECK(bus_read_1(&b, i) == 0xAA);
i++;
}
}
ATF_TC_WITHOUT_HEAD(emul_invalid_opcode);
ATF_TC_BODY(emul_invalid_opcode, tc)
{
rk65c02emu_t e;
bus_t b;
struct reg_state rorig;
rk65c02_loglevel_set(LOG_DEBUG);
b = bus_init_with_default_devs();
e = rk65c02_init(&b);
e.runtime_disassembly = true;
rorig = e.regs;
ATF_REQUIRE(rom_start(&e, "test_emulation_invalid_opcode.rom", tc));
ATF_CHECK(e.regs.A == rorig.A);
ATF_CHECK(e.regs.X == rorig.X);
ATF_CHECK(e.regs.Y == rorig.Y);
ATF_CHECK(e.regs.SP == rorig.SP);
ATF_CHECK(e.regs.P == rorig.P);
ATF_CHECK(e.regs.PC == 0xC00A);
rk65c02_log(LOG_INFO, "PC: %x", e.regs.PC);
}
ATF_TP_ADD_TCS(tp)
{
ATF_TP_ADD_TC(tp, emul_and);
ATF_TP_ADD_TC(tp, emul_asl);
ATF_TP_ADD_TC(tp, emul_adc);
ATF_TP_ADD_TC(tp, emul_adc_16bit);
ATF_TP_ADD_TC(tp, emul_adc_bcd);
ATF_TP_ADD_TC(tp, emul_bit);
ATF_TP_ADD_TC(tp, emul_branch);
ATF_TP_ADD_TC(tp, emul_bbr);
ATF_TP_ADD_TC(tp, emul_bbs);
ATF_TP_ADD_TC(tp, emul_cmp);
ATF_TP_ADD_TC(tp, emul_cpx);
ATF_TP_ADD_TC(tp, emul_cpy);
@ -1368,23 +1901,38 @@ ATF_TP_ADD_TCS(tp)
ATF_TP_ADD_TC(tp, emul_jmp);
ATF_TP_ADD_TC(tp, emul_jsr_rts);
ATF_TP_ADD_TC(tp, emul_lda);
ATF_TP_ADD_TC(tp, emul_lsr);
ATF_TP_ADD_TC(tp, emul_nop);
ATF_TP_ADD_TC(tp, emul_ora);
ATF_TP_ADD_TC(tp, emul_stz);
ATF_TP_ADD_TC(tp, emul_php_plp);
ATF_TP_ADD_TC(tp, emul_phx_phy_plx_ply);
ATF_TP_ADD_TC(tp, emul_rol);
ATF_TP_ADD_TC(tp, emul_ror);
ATF_TP_ADD_TC(tp, emul_stack);
ATF_TP_ADD_TC(tp, emul_txa_tya_tax_tay);
ATF_TP_ADD_TC(tp, emul_tsx_txs);
ATF_TP_ADD_TC(tp, emul_sta);
ATF_TP_ADD_TC(tp, emul_stx);
ATF_TP_ADD_TC(tp, emul_sty);
ATF_TP_ADD_TC(tp, emul_sbc);
ATF_TP_ADD_TC(tp, emul_sbc_16bit);
ATF_TP_ADD_TC(tp, emul_sbc_bcd);
ATF_TP_ADD_TC(tp, emul_rmb);
ATF_TP_ADD_TC(tp, emul_smb);
ATF_TP_ADD_TC(tp, emul_trb);
ATF_TP_ADD_TC(tp, emul_tsb);
ATF_TP_ADD_TC(tp, emul_sign_overflow_basic);
ATF_TP_ADD_TC(tp, emul_sign_overflow_thorough);
ATF_TP_ADD_TC(tp, emul_signed_comparison);
ATF_TP_ADD_TC(tp, emul_wrap_zpx);
ATF_TP_ADD_TC(tp, emul_wrap_izpx);
ATF_TP_ADD_TC(tp, emul_invalid_opcode);
return (atf_no_error());
}

3
test/test_emulation_adc_abs.s Normal file
View File

@ -0,0 +1,3 @@
start: adc 0x2A00
stp

3
test/test_emulation_adc_absx.s Normal file
View File

@ -0,0 +1,3 @@
start: adc 0x2A00,X
stp

3
test/test_emulation_adc_imm.s Normal file
View File

@ -0,0 +1,3 @@
start: adc #0x3
stp

3
test/test_emulation_adc_zp.s Normal file
View File

@ -0,0 +1,3 @@
start: adc 0x10
stp

3
test/test_emulation_adc_zpx.s Normal file
View File

@ -0,0 +1,3 @@
start: adc 0x11,X
stp

7
test/test_emulation_asl.s Normal file
View File

@ -0,0 +1,7 @@
start: asl A
asl 0x10
asl 0x10,X
asl 0x300
asl 0x300,X
stp

11
test/test_emulation_invalid_opcode.s Normal file
View File

@ -0,0 +1,11 @@
.byte 0x42
.byte 0xFF
.byte 0x43
.byte 0x44
.byte 0xFF
.byte 0x4B
.byte 0xFC
.byte 0xFF
.byte 0xFF
stp

3
test/test_emulation_lda_izp.s Normal file
View File

@ -0,0 +1,3 @@
start: lda (0x1A)
stp

3
test/test_emulation_lda_izpx.s Normal file
View File

@ -0,0 +1,3 @@
start: lda (0x1F,X)
stp

3
test/test_emulation_lda_izpy.s Normal file
View File

@ -0,0 +1,3 @@
start: lda (0x20),Y
stp

3
test/test_emulation_lda_zpx.s Normal file
View File

@ -0,0 +1,3 @@
start: lda 0x11,X
stp

7
test/test_emulation_lsr.s Normal file
View File

@ -0,0 +1,7 @@
start: lsr A
lsr 0x10
lsr 0x10,X
lsr 0x300
lsr 0x300,X
stp

7
test/test_emulation_rol.s Normal file
View File

@ -0,0 +1,7 @@
start: rol A
rol 0x10
rol 0x10,X
rol 0x200
rol 0x200,X
stp

7
test/test_emulation_ror.s Normal file
View File

@ -0,0 +1,7 @@
start: ror A
ror 0x10
ror 0x10,X
ror 0x200
ror 0x200,X
stp

100
test/test_emulation_signed_comparison.s Normal file
View File

@ -0,0 +1,100 @@
; stolen from: http://www.6502.org/tutorials/compare_beyond.html
; adapted to vasm and std syntax by rkujawa
;
; Test the signed compare routine
;
; Returns with ERROR = 0 if the test passes, ERROR = 1 if the test fails
;
; Three (additional) memory locations are used: ERROR, N1, and N2
; These may be located anywhere convenient in RAM
;
.org 0xC000
.set N1, 0x10
.set N2, 0x11
.set ERROR, 0x12
TEST: cld ; Clear decimal mode for test
lda #1
sta ERROR ; Store 1 in ERROR until test passes
tsx ; Save stack pointer so subroutines can exit with ERROR = 1
;
; Test N1 positive, N2 positive
;
lda #0 ; 0
sta N1
PP1: lda #0 ; 0
sta N2
PP2: jsr SUCMP ; Verify that the signed and unsigned comparison agree
inc N2
bpl PP2
inc N1
bpl PP1
;
; Test N1 positive, N2 negative
;
lda #0 ; 0
sta N1
PN1: lda #0x80 ; -128
sta N2
PN2: jsr SCMP ; Signed comparison
bmi TEST1 ; if N1 (positive) < N2 (negative) exit with ERROR = 1
inc N2
bmi PN2
inc N1
bpl PN1
;
; Test N1 negative, N2 positive
;
lda #0x80 ; -128
sta N1
NP1: lda #0 ; 0
sta N2
NP2: jsr SCMP ; Signed comparison
bpl TEST1 ; if N1 (negative) >= N2 (positive) exit with ERROR = 1
inc N2
bpl NP2
inc N1
bmi NP1
;
; Test N1 negative, N2 negative
;
lda #0x80 ; -128
sta N1
NN1: lda #0x80 ; -128
sta N2
NN2: jsr SUCMP ; Verify that the signed and unsigned comparisons agree
inc N2
bmi NN2
inc N1
bmi NN1
lda #0
sta ERROR ; All tests pass, so store 0 in ERROR
TEST1: stp
; Signed comparison
;
; Returns with:
; N=0 (BPL branches) if N1 >= N2 (signed)
; N=1 (BMI branches) if N1 < N2 (signed)
;
; The unsigned comparison result is returned in the C flag (for free)
;
SCMP: sec
lda N1 ; Compare N1 and N2
sbc N2
bvc SCMP1 ; Branch if V = 0
eor #0x80 ; Invert Accumulator bit 7 (which also inverts the N flag)
SCMP1: rts
; Test the signed and unsigned comparisons to confirm that they agree
;
SUCMP: jsr SCMP ; Signed (and unsigned) comparison
bcc SUCMP2 ; Branch if N1 < N2 (unsigned)
bpl SUCMP1 ; N1 >= N2 (unsigned), branch if N1 >= N2 (signed)
tsx ; reset stack and exit with ERROR = 1
SUCMP1: rts
SUCMP2: bmi SUCMP3 ; N1 < N2 (unsigned), branch if N1 < N2 (signed)
tsx ; reset stack and exit with ERROR = 1
SUCMP3: rts

3
test/test_emulation_stx_abs.s Normal file
View File

@ -0,0 +1,3 @@
start: stx 0x2010
stp

3
test/test_emulation_stx_zp.s Normal file
View File

@ -0,0 +1,3 @@
start: stx 0x20
stp

3
test/test_emulation_stx_zpy.s Normal file
View File

@ -0,0 +1,3 @@
start: stx 0x1F,Y
stp

3
test/test_emulation_sty_abs.s Normal file
View File

@ -0,0 +1,3 @@
start: sty 0x2010
stp

3
test/test_emulation_sty_zp.s Normal file
View File

@ -0,0 +1,3 @@
start: sty 0x20
stp

3
test/test_emulation_sty_zpx.s Normal file
View File

@ -0,0 +1,3 @@
start: sty 0x1F,X
stp

3
test/test_emulation_stz_abs.s Normal file
View File

@ -0,0 +1,3 @@
start: stz 0x2000
stp

3
test/test_emulation_stz_absx.s Normal file
View File

@ -0,0 +1,3 @@
start: stz 0x2004,X
stp

3
test/test_emulation_stz_zpx.s Normal file
View File

@ -0,0 +1,3 @@
start: stz 0x11,X
stp

12
test/test_emulation_trb.s Normal file
View File

@ -0,0 +1,12 @@
start: lda #0xa6
sta 0x10
lda #0x33
trb 0x10
lda #0xa6
sta 0x11
lda #0x41
trb 0x11
stp

12
test/test_emulation_tsb.s Normal file
View File

@ -0,0 +1,12 @@
start: lda #0xa6
sta 0x10
lda #0x33
tsb 0x10
lda #0xa6
sta 0x11
lda #0x41
tsb 0x11
stp

3
test/test_emulation_tsx.s Normal file
View File

@ -0,0 +1,3 @@
start: tsx
stp

3
test/test_emulation_txs.s Normal file
View File

@ -0,0 +1,3 @@
start: txs
stp

4
test/test_emulation_wrap_izpx.s Normal file
View File

@ -0,0 +1,4 @@
start: sta (0x10,X)
lda (0xF0,X)
stp

18
test/test_emulation_wrap_zpx.s Normal file
View File

@ -0,0 +1,18 @@
start: sta 0x10,X
sta 0x80,X
sta 0x81,X
sta 0x82,X
sta 0xFF,X
ldy 0x10,X
sty 0x200
ldy 0x80,X
sty 0x201
ldy 0x81,X
sty 0x202
ldy 0x82,X
sty 0x203
ldy 0xFF,X
sty 0x204
stp

10
test/test_interrupt.c
View File

@ -5,9 +5,13 @@
#include <stdbool.h>
#include <string.h>
#include "assembler.h"
#include "bus.h"
#include "rk65c02.h"
#include "instruction.h"
#include "log.h"
#include "device_ram.h"
#include "utils.h"
#define ISR_ADDR 0xC100
@ -23,7 +27,10 @@ ATF_TC_BODY(intr_brk, tc)
rk65c02emu_t e;
bus_t b;
rk65c02_loglevel_set(LOG_TRACE);
b = bus_init_with_default_devs();
bus_device_add(&b, device_ram_init(0x100), 0xFF00);
e = rk65c02_init(&b);
e.regs.PC = ROM_LOAD_ADDR;
@ -81,17 +88,14 @@ ATF_TC_BODY(intr_rti, tc)
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
free(asmbuf);
israsmpc += bsize;
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "rti"));
ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
free(asmbuf);
israsmpc += bsize;
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(bus_load_buf(&b, ROM_LOAD_ADDR, asmbuf, bsize));
free(asmbuf);
/* There's a return address and saved processor flags on stack. */
e.regs.SP = 0xFF;

4
test/test_stepping.c
View File

@ -4,6 +4,8 @@
#include "bus.h"
#include "rk65c02.h"
#include "log.h"
#include "utils.h"
ATF_TC_WITHOUT_HEAD(step1);
@ -12,6 +14,8 @@ ATF_TC_BODY(step1, tc)
rk65c02emu_t e;
bus_t b;
rk65c02_loglevel_set(LOG_TRACE);
b = bus_init_with_default_devs();
e = rk65c02_init(&b);

8
test/utils.c
View File

@ -1,10 +1,14 @@
#include <stdio.h>
#include <stdlib.h>
#include <limits.h>
#include <string.h>
#include <atf-c.h>
#include <gc/gc.h>
#include "bus.h"
#include "rk65c02.h"
#include "log.h"
#include "utils.h"
@ -14,7 +18,7 @@ rom_path(const char *name, const atf_tc_t *tc)
char *rompath;
const char *srcdir;
rompath = malloc(PATH_MAX);
rompath = GC_MALLOC(PATH_MAX);
srcdir = atf_tc_get_config_var(tc, "srcdir");
strcpy(rompath, srcdir);
@ -30,7 +34,7 @@ rom_start(rk65c02emu_t *e, const char *name, const atf_tc_t *tc)
const char *path;
path = rom_path(name, tc);
printf("%s\n", path);
rk65c02_log(LOG_INFO, "Loading ROM: %s", path);
e->regs.PC = ROM_LOAD_ADDR;
if(!bus_load_file(e->bus, ROM_LOAD_ADDR, path))
return false;