8 Commits

Author	SHA1	Message	Date
Radosław Kujawa	9f916885b8	Add missing include.	2018-06-25 14:06:38 +02:00
Radosław Kujawa	ae3e782b74	Use boehm gc to manage memory. ... I'm less likely to fuck this up now.	2018-03-26 12:36:47 +02:00
Radosław Kujawa	13a4c73807	Unbreak BRK test case - add RAM for ISR vector.	2018-03-24 23:06:29 +01:00
Radosław Kujawa	1dcaa4c53f	Adjust test to chnages in bus code (due to device subsystem intro).	2017-02-20 21:30:23 +01:00
Radosław Kujawa	23492e6533	Refactor due to change in rk65c02_dump_regs.	2017-02-15 21:35:27 +01:00
Radosław Kujawa	0bd7b85dea	Implement simpler to use assembly mode, straight to bus. ... While here refactor existing assembly functions.	2017-02-12 16:47:06 +01:00
Radosław Kujawa	5cca703020	Add RTI emulation and test case.	2017-02-08 15:55:39 +01:00
Radosław Kujawa	d29be055f9	Add BRK interrupt test.	2017-02-07 21:23:31 +01:00