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61 Commits 4 Branches 0 Tags 462 KiB
52247f0ce4
Commit Graph

11 Commits

Author SHA1 Message Date
Radosław Kujawa
52247f0ce4 Implement CLC, SEC and test for them. 2017-01-22 13:50:04 +01:00
Radosław Kujawa
473e0e2636 Add INX, INY emulation and test cases. 
Some comments while here.
 2017-01-22 13:07:21 +01:00
Radosław Kujawa
c7633feb87 Add STZ emulation. 2017-01-21 21:46:35 +01:00
Radosław Kujawa
07e1a008d9 Add preliminary stack tests, test ROMs for PLA, PHA. 2017-01-20 23:18:25 +01:00
Radosław Kujawa
a50da41388 Implement AND emulation and test. 2017-01-20 10:41:56 +01:00
Radosław Kujawa
6b7ddbf865 LDA zero page emulation and test for it. 2017-01-19 11:49:05 +01:00
Radosław Kujawa
73e4be2acc Add support for building test case ROMs with vasm. 
While here add first such ROM, for nop instruction test.
 2017-01-18 23:47:55 +01:00
Radosław Kujawa
52ce9bff8c Preliminary support for emulation of instructions. 
Some refactoring while here.
 2017-01-18 17:18:19 +01:00
Radosław Kujawa
5861d40352 When linking against static lib, the order matters. 2017-01-16 23:56:10 +01:00
Radosław Kujawa
a0821195c7 Also build static library and use it for tests. 2017-01-16 23:54:46 +01:00
Radosław Kujawa
0a43717337 Add first test cases (for bus access). 2017-01-16 22:54:51 +01:00