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mirror of https://github.com/rkujawa/rk65c02.git synced 2024-12-13 01:29:57 +00:00
Commit Graph

37 Commits

Author SHA1 Message Date
Radosław Kujawa
ae3e782b74 Use boehm gc to manage memory.
I'm less likely to fuck this up now.
2018-03-26 12:36:47 +02:00
Radosław Kujawa
eeb337a0d6 Don't forget newline when printing regs. 2018-03-24 00:14:41 +01:00
Radosław Kujawa
5fddf2c5dc More refactoring and improvements to logging! 2018-03-23 13:37:07 +01:00
Radosław Kujawa
5cb6f3488e Further improvements and refactoring to logging. 2018-03-22 15:08:51 +01:00
Radosław Kujawa
47aca32da7 Add minimal logging functionality. 2018-03-21 16:22:29 +01:00
Radosław Kujawa
de1ab25427 Make runtime disassembly optional. 2017-02-15 21:38:51 +01:00
Radosław Kujawa
0b83a263d7 Introduce trace functionality. 2017-02-15 21:32:12 +01:00
Radosław Kujawa
6afb4531d5 The rk65c02_exec should return immediately after hitting breakpoint. 2017-02-15 19:56:22 +01:00
Radosław Kujawa
3363959b87 Add breakpoints. 2017-02-14 11:17:40 +01:00
Radosław Kujawa
4c7a15f524 Add emulation of WAI instruction. 2017-02-09 21:53:45 +01:00
Radosław Kujawa
299b7ee7d8 Add functions to dump stack.
Always useful.
2017-02-06 23:16:00 +01:00
Radosław Kujawa
ac48e5435f Add preliminary support for interrupts. 2017-02-04 21:44:13 +01:00
Radosław Kujawa
51b47d707b Set reason for stopping the emulation when stepping. 2017-02-03 22:21:43 +01:00
Radosław Kujawa
941036615e Add some null pointer checking asserts. 2017-02-02 14:43:44 +01:00
Radosław Kujawa
436810b79f The overflow flag should be represented by "V". 2017-02-01 22:11:24 +01:00
Radosław Kujawa
b21d884f8b Clear the decimal flag on initialisation. 2017-01-31 00:31:04 +01:00
Radosław Kujawa
05cedfb1f5 Also print program counter when dumping regs. 2017-01-27 22:28:09 +01:00
Radosław Kujawa
2430cfd722 Branch and jump instrucitons need special PC treatment. 2017-01-27 20:43:08 +01:00
Radosław Kujawa
1f581d3fd3 Add function to dump registers state onto stdout. 2017-01-27 11:27:14 +01:00
Radosław Kujawa
0c63342ad7 Add comments explaing what these functions do. 2017-01-27 10:13:32 +01:00
Radosław Kujawa
1da576c821 Merge branch 'master' of github.com:rkujawa/rk65c02 2017-01-26 17:27:22 +01:00
Radosław Kujawa
80b6848108 Preliminary support for stepping. 2017-01-26 13:11:00 +01:00
Radosław Kujawa
941e89173a Add struct with info about reason for stopping emulation. 2017-01-26 12:52:40 +01:00
Radosław Kujawa
285d2ee828 Initial state of the CPU has IRQ disable bit set. 2017-01-25 21:17:18 +01:00
Radosław Kujawa
5eede9333b Add emulation of PHP, PLP instructions and test cases for them. 2017-01-22 23:01:24 +01:00
Radosław Kujawa
473e0e2636 Add INX, INY emulation and test cases.
Some comments while here.
2017-01-22 13:07:21 +01:00
Radosław Kujawa
e763ca0d3a Avoid getting instruction definition again when emulating.
While here try to make program counter incrementation more universal
and flexible.
2017-01-22 11:07:19 +01:00
Radosław Kujawa
5ca671aecb Print value of PC register when unimplemented opcode encountered. 2017-01-21 09:13:43 +01:00
Radosław Kujawa
51de051e19 Stop on unimplemented instruction. 2017-01-20 23:18:00 +01:00
Radosław Kujawa
bcedb50e48 Clean up. 2017-01-20 09:11:22 +01:00
Radosław Kujawa
52ce9bff8c Preliminary support for emulation of instructions.
Some refactoring while here.
2017-01-18 17:18:19 +01:00
Radosław Kujawa
f106e227cd Prepare structures for adding emulation of instructions. 2017-01-18 15:45:28 +01:00
Radosław Kujawa
23802b176f Instruction set definition is now private to 65c02isa.c, has API.
Minor refactoring while here, splitting stuff.
2017-01-17 14:29:20 +01:00
Radosław Kujawa
d515954f44 Move reg_state struct to header, rename op to opcode. 2017-01-17 11:18:48 +01:00
Radosław Kujawa
0da3d6dc5f Instruction addressing modes now handled with enum.
While here imlpement instruciton printing for all addressing modes.
2017-01-17 00:42:31 +01:00
Radosław Kujawa
64e71a081f Since this is a library, off with the main function now. 2017-01-16 23:54:24 +01:00
Radosław Kujawa
e7c81c0fbc Initial import, skeleton... 2017-01-16 19:35:28 +01:00