mirror of
https://github.com/rkujawa/rk65c02.git
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a73ebc3024
- interrupts: IRQ vector at $FFFE, vector device at $FFFC, idle_wait + assert_irq - hello_serial: custom bus device at $DE00, guest writes host prints - stepper: rk65c02_step(1) loop with regs and disassembly - jit_bench: min3.rom interpreter vs JIT wall time - breakpoints: debug_breakpoint_add at min3 entry, inspect then continue - README: document new examples, run from examples/ or make run-<name> - Makefile: EXAMPLES and run-* targets for all five Made-with: Cursor
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/*
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* Interrupts example — IRQ vector at $FFFE, assert/deassert, minimal handler.
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*
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* Build: make interrupts interrupts.rom
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* Run: ./interrupts
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*
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* Demonstrates: IRQ vector setup, rk65c02_assert_irq from idle_wait callback,
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* guest CLI + WAI + IRQ handler that increments a counter, then STP.
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* Expected: stop reason STP; IRQ count and wake count at 0x0200/0x0201 both 3.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <time.h>
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#include "bus.h"
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#include "device.h"
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#include "rk65c02.h"
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static const uint16_t load_addr = 0xC000;
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static const uint16_t addr_irq_count = 0x0200;
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static const uint16_t addr_wake_count = 0x0201;
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#define VECTOR_BASE 0xFFFC
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#define ADDR_START 0xC000
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#define ADDR_IRQ_HANDLER 0xC003
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/* 4-byte vector area at $FFFC (reset lo/hi, IRQ lo/hi); default RAM ends at $DFFE. */
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static uint8_t vector_ram[4];
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static uint8_t vector_read_1(void *config, uint16_t doff) { (void)config; return vector_ram[doff]; }
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static void vector_write_1(void *config, uint16_t doff, uint8_t val) { (void)config; vector_ram[doff] = val; }
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static device_t vector_device = {
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.name = "vector",
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.size = 4,
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.read_1 = vector_read_1,
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.write_1 = vector_write_1,
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.finish = NULL,
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.config = NULL,
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.aux = NULL
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};
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struct irq_host_state {
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uint32_t wait_calls;
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};
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static void
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on_idle_wait(rk65c02emu_t *e, void *ctx)
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{
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struct irq_host_state *hs = ctx;
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struct timespec req = { .tv_sec = 0, .tv_nsec = 5000000 }; /* 5 ms */
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(void)nanosleep(&req, NULL);
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rk65c02_assert_irq(e);
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hs->wait_calls++;
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}
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int
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main(void)
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{
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bus_t bus;
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rk65c02emu_t e;
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struct irq_host_state host;
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uint8_t irq_count, wake_count;
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bus = bus_init_with_default_devs();
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bus_device_add(&bus, &vector_device, VECTOR_BASE);
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if (!bus_load_file(&bus, load_addr, "interrupts.rom")) {
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fprintf(stderr, "FAIL: could not load interrupts.rom\n");
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bus_finish(&bus);
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return 1;
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}
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/* Set reset vector to start, IRQ vector to irq_handler. */
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vector_ram[0] = (uint8_t)(ADDR_START & 0xFF);
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vector_ram[1] = (uint8_t)(ADDR_START >> 8);
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vector_ram[2] = (uint8_t)(ADDR_IRQ_HANDLER & 0xFF);
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vector_ram[3] = (uint8_t)(ADDR_IRQ_HANDLER >> 8);
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e = rk65c02_init(&bus);
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e.regs.SP = 0xFF;
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e.regs.PC = ADDR_START;
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host.wait_calls = 0;
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rk65c02_idle_wait_set(&e, on_idle_wait, &host);
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rk65c02_start(&e);
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irq_count = bus_read_1(e.bus, addr_irq_count);
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wake_count = bus_read_1(e.bus, addr_wake_count);
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bus_finish(&bus);
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printf("Stop reason: %s\n", rk65c02_stop_reason_string(e.stopreason));
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printf("IRQ count at $%04x: %u, wake count at $%04x: %u\n",
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addr_irq_count, irq_count, addr_wake_count, wake_count);
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if (e.stopreason != STP) {
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fprintf(stderr, "FAIL: expected STP, got %s\n",
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rk65c02_stop_reason_string(e.stopreason));
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return 1;
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}
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if (irq_count != 3 || wake_count != 3) {
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fprintf(stderr, "FAIL: expected IRQ=3 wake=3, got IRQ=%u wake=%u\n",
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irq_count, wake_count);
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return 1;
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}
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printf("PASS: IRQ vector and handler ran, 3 WAI wakes, STP.\n");
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return 0;
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}
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