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Implemented Zero Page,X, Zero Page,Y, and Indirect addressing mode instructions, along with unit tests.

This commit is contained in:
Seth Morabito 2008-12-29 20:46:48 -08:00
parent 66fc63a36e
commit 107aca7777
6 changed files with 1406 additions and 22 deletions

6
README
View File

@ -52,14 +52,14 @@ ACIAs. More functionality may be considered as time goes on.
o Zero Page
o Accumulator
o Absolute
INCOMPLETE ADDRESSING MODES:
o Indirect [used only by JMP]
o Zero Page, X-indexed
o Zero Page, Y-indexed
INCOMPLETE ADDRESSING MODES:
o Relative
o Absolute, X-indexed
o Absolute, Y-indexed
o Indirect
o Indexed Indirect [ (Indirect ,X) ]
o Indirect Indexed [ (Indirect),Y ]

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@ -192,9 +192,15 @@ public class Cpu implements InstructionTable {
break;
case 0x11: // TODO: implement
break;
case 0x15: // TODO: implement
case 0x15: // ORA - Logical Inclusive OR - Zero Page,X
a |= bus.read(zpxAddress(operands[0]));
setArithmeticFlags(a);
break;
case 0x16: // TODO: implement
case 0x16: // ASL - Arithmetic Shift Left - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
k = asl(j);
bus.write(zpxAddress(operands[0]), k);
setArithmeticFlags(k);
break;
case 0x18: // CLC - Clear Carry Flag - Implied
clearCarryFlag();
@ -265,9 +271,16 @@ public class Cpu implements InstructionTable {
break;
case 0x31: // TODO: implement
break;
case 0x35: // TODO: implement
case 0x35: // AND - Logical And - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
a &= j;
setArithmeticFlags(a);
break;
case 0x36: // TODO: implement
case 0x36: // ROL - Rotate Shift Left - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
k = rol(j);
bus.write(zpxAddress(operands[0]), k);
setArithmeticFlags(k);
break;
case 0x38: // SEC - Set Carry Flag - Implied
setCarryFlag();
@ -327,9 +340,15 @@ public class Cpu implements InstructionTable {
break;
case 0x51: // TODO: implement
break;
case 0x55: // TODO: implement
case 0x55: // EOR - Exclusive OR - Zero Page,X
a ^= bus.read(zpxAddress(operands[0]));
setArithmeticFlags(a);
break;
case 0x56: // TODO: implement
case 0x56: // LSR - Logical Shift Right - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
k = lsr(j);
bus.write(zpxAddress(operands[0]), k);
setArithmeticFlags(k);
break;
case 0x58: // CLI - Clear Interrupt Disable - Implied
clearIrqDisableFlag();
@ -377,7 +396,25 @@ public class Cpu implements InstructionTable {
a = ror(a);
setArithmeticFlags(a);
break;
case 0x6c: // TODO: implement
case 0x6c: // JMP - Jump - Indirect
lo = address(operands[0], operands[1]); // Address of low byte
hi = lo+1; // Address of high byte
pc = address(bus.read(lo), bus.read(hi));
/* TODO: For accuracy, allow a flag to enable broken behavior
* of early 6502s:
*
* "An original 6502 has does not correctly fetch the target
* address if the indirect vector falls on a page boundary
* (e.g. $xxFF where xx is and value from $00 to $FF). In this
* case fetches the LSB from $xxFF as expected but takes the MSB
* from $xx00. This is fixed in some later chips like the 65SC02
* so for compatibility always ensure the indirect vector is not
* at the end of the page."
* (http://www.obelisk.demon.co.uk/6502/reference.html#JMP)
*/
break;
case 0x6d: // ADC - Add with Carry - Absolute
j = bus.read(address(operands[0], operands[1]));
@ -398,9 +435,19 @@ public class Cpu implements InstructionTable {
break;
case 0x71: // TODO: implement
break;
case 0x75: // TODO: implement
case 0x75: // ADC - Add with Carry - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
if (decimalModeFlag) {
a = adcDecimal(a, j);
} else {
a = adc(a, j);
}
break;
case 0x76: // TODO: implement
case 0x76: // ROR - Rotate Right - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
k = ror(j);
bus.write(zpxAddress(operands[0]), k);
setArithmeticFlags(k);
break;
case 0x78: // SEI - Set Interrupt Disable - Implied
setIrqDisableFlag();
@ -451,11 +498,17 @@ public class Cpu implements InstructionTable {
break;
case 0x91: // TODO: implement
break;
case 0x94: // TODO: implement
case 0x94: // STY - Store Y Register - Zero Page,X
bus.write(zpxAddress(operands[0]), y);
setArithmeticFlags(y);
break;
case 0x95: // TODO: implement
case 0x95: // STA - Store Accumulator - Zero Page,X
bus.write(zpxAddress(operands[0]), a);
setArithmeticFlags(a);
break;
case 0x96: // TODO: implement
case 0x96: // STX - Store X Register - Zero Page,Y
bus.write(zpyAddress(operands[0]), x);
setArithmeticFlags(x);
break;
case 0x98: // TYA - Transfer Y to Accumulator - Implied
a = y;
@ -518,11 +571,17 @@ public class Cpu implements InstructionTable {
break;
case 0xb1: // TODO: implement
break;
case 0xb4: // TODO: implement
case 0xb4: // LDY - Load Y Register - Zero Page,X
y = bus.read(zpxAddress(operands[0]));
setArithmeticFlags(y);
break;
case 0xb5: // TODO: implement
case 0xb5: // LDA - Load Accumulator - Zero Page,X
a = bus.read(zpxAddress(operands[0]));
setArithmeticFlags(a);
break;
case 0xb6: // TODO: implement
case 0xb6: // LDX - Load X Register - Zero Page,Y
x = bus.read(zpyAddress(operands[0]));
setArithmeticFlags(x);
break;
case 0xb8: // CLV - Clear Overflow Flag - Implied
clearOverflowFlag();
@ -587,9 +646,14 @@ public class Cpu implements InstructionTable {
break;
case 0xd1: // TODO: implement
break;
case 0xd5: // TODO: implement
case 0xd5: // CMP - Compare Accumulator - Zero Page,X
cmp(a, bus.read(zpxAddress(operands[0])));
break;
case 0xd6: // TODO: implement
case 0xd6: // DEC - Decrement Memory - Zero Page, X
j = bus.read(zpxAddress(operands[0]));
k = --j & 0xff;
bus.write(zpxAddress(operands[0]), k);
setArithmeticFlags(k);
break;
case 0xd8: // CLD - Clear Decimal Mode - Implied
clearDecimalModeFlag();
@ -659,9 +723,19 @@ public class Cpu implements InstructionTable {
break;
case 0xf1: // TODO: implement
break;
case 0xf5: // TODO: implement
case 0xf5: // SBC - Subtract with Carry - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
if (decimalModeFlag) {
a = sbcDecimal(a, j);
} else {
a = sbc(a, j);
}
break;
case 0xf6: // TODO: implement
case 0xf6: // INC - Increment Memory Location - Zero Page,X
j = bus.read(zpxAddress(operands[0]));
k = ++j & 0xff;
bus.write(zpxAddress(operands[0]), k);
setArithmeticFlags(k);
break;
case 0xf8: // SED - Set Decimal Flag - Implied
setDecimalModeFlag();
@ -1387,6 +1461,20 @@ public class Cpu implements InstructionTable {
return ((hiByte<<8)|lowByte);
}
/**
* Given a single byte, compute the Zero Page,X offset address.
*/
int zpxAddress(int zp) {
return (zp+getXRegister())&0xff;
}
/**
* Given a single byte, compute the Zero Page,Y offset address.
*/
int zpyAddress(int zp) {
return (zp+getYRegister())&0xff;
}
/**
* Given an opcode and its operands, return a formatted name.
*

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@ -0,0 +1,53 @@
package com.loomcom.symon;
import com.loomcom.symon.devices.Memory;
import com.loomcom.symon.exceptions.MemoryRangeException;
import junit.framework.TestCase;
public class CpuIndirectModeTest extends TestCase {
protected Cpu cpu;
protected Bus bus;
protected Memory mem;
protected void setUp() throws Exception {
this.cpu = new Cpu();
this.bus = new Bus(0x0000, 0xffff);
this.mem = new Memory(0x0000, 0x10000);
bus.addCpu(cpu);
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
cpu.reset();
// Assert initial state
assertEquals(0, cpu.getAccumulator());
assertEquals(0, cpu.getXRegister());
assertEquals(0, cpu.getYRegister());
assertEquals(0x200, cpu.getProgramCounter());
assertEquals(0xff, cpu.getStackPointer());
assertEquals(0x20, cpu.getProcessorStatus());
}
/*
* The following opcodes are tested for correctness in this file:
*
* JMP - $6c
*
*/
/* JMP - Jump - $6c */
public void test_JMP() {
bus.write(0x3400, 0x00);
bus.write(0x3401, 0x54);
bus.loadProgram(0x6c, 0x00, 0x34);
cpu.step();
assertEquals(0x5400, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
}

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@ -355,4 +355,44 @@ public class CpuTest extends TestCase {
assertEquals(0xffff, cpu.address(0xff, 0xff));
}
public void testZpxAddress() {
cpu.setXRegister(0x00);
assertEquals(0x10, cpu.zpxAddress(0x10));
cpu.setXRegister(0x10);
assertEquals(0x20, cpu.zpxAddress(0x10));
cpu.setXRegister(0x25);
assertEquals(0x35, cpu.zpxAddress(0x10));
cpu.setXRegister(0xf5);
assertEquals(0x05, cpu.zpxAddress(0x10));
cpu.setXRegister(0x00);
assertEquals(0x80, cpu.zpxAddress(0x80));
cpu.setXRegister(0x10);
assertEquals(0x90, cpu.zpxAddress(0x80));
cpu.setXRegister(0x25);
assertEquals(0xa5, cpu.zpxAddress(0x80));
cpu.setXRegister(0x95);
assertEquals(0x15, cpu.zpxAddress(0x80));
}
public void testZpyAddress() {
cpu.setYRegister(0x00);
assertEquals(0x10, cpu.zpyAddress(0x10));
cpu.setYRegister(0x10);
assertEquals(0x20, cpu.zpyAddress(0x10));
cpu.setYRegister(0x25);
assertEquals(0x35, cpu.zpyAddress(0x10));
cpu.setYRegister(0xf5);
assertEquals(0x05, cpu.zpyAddress(0x10));
cpu.setYRegister(0x00);
assertEquals(0x80, cpu.zpyAddress(0x80));
cpu.setYRegister(0x10);
assertEquals(0x90, cpu.zpyAddress(0x80));
cpu.setYRegister(0x25);
assertEquals(0xa5, cpu.zpyAddress(0x80));
cpu.setYRegister(0x95);
assertEquals(0x15, cpu.zpyAddress(0x80));
}
}

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@ -0,0 +1,101 @@
package com.loomcom.symon;
import com.loomcom.symon.devices.Memory;
import com.loomcom.symon.exceptions.MemoryRangeException;
import junit.framework.TestCase;
public class CpuZeroPageYModeTest extends TestCase {
protected Cpu cpu;
protected Bus bus;
protected Memory mem;
protected void setUp() throws Exception {
this.cpu = new Cpu();
this.bus = new Bus(0x0000, 0xffff);
this.mem = new Memory(0x0000, 0x10000);
bus.addCpu(cpu);
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
cpu.reset();
// Assert initial state
assertEquals(0, cpu.getAccumulator());
assertEquals(0, cpu.getXRegister());
assertEquals(0, cpu.getYRegister());
assertEquals(0x200, cpu.getProgramCounter());
assertEquals(0xff, cpu.getStackPointer());
assertEquals(0x20, cpu.getProcessorStatus());
}
/*
* The following opcodes are tested for correctness in this file:
*
* STX - $96
* LDX - $b6
*
*/
/* STX - Store X Register - $96 */
public void test_STX() {
cpu.setYRegister(0x30);
cpu.setXRegister(0x00);
bus.loadProgram(0x96, 0x10); // STX $10,Y
cpu.step();
assertEquals(0x00, bus.read(0x40));
assertTrue(cpu.getZeroFlag());
assertFalse(cpu.getNegativeFlag());
cpu.reset();
cpu.setYRegister(0x30);
cpu.setXRegister(0x0f);
bus.loadProgram(0x96, 0x10); // STX $10,Y
cpu.step();
assertEquals(0x0f, bus.read(0x40));
assertFalse(cpu.getZeroFlag());
assertFalse(cpu.getNegativeFlag());
cpu.reset();
cpu.setYRegister(0x30);
cpu.setXRegister(0x80);
bus.loadProgram(0x96, 0x10); // STX $10,Y
cpu.step();
assertEquals(0x80, bus.read(0x40));
assertFalse(cpu.getZeroFlag());
assertTrue(cpu.getNegativeFlag());
}
/* LDX - Load X Register - $b6 */
public void test_LDX() {
bus.write(0x40, 0x00);
bus.write(0x41, 0x0f);
bus.write(0x42, 0x80);
bus.loadProgram(0xb6, 0x10,
0xb6, 0x11,
0xb6, 0x12);
cpu.setYRegister(0x30);
cpu.step();
assertEquals(0x00, cpu.getXRegister());
assertTrue(cpu.getZeroFlag());
assertFalse(cpu.getNegativeFlag());
cpu.step();
assertEquals(0x0f, cpu.getXRegister());
assertFalse(cpu.getZeroFlag());
assertFalse(cpu.getNegativeFlag());
cpu.step();
assertEquals(0x80, cpu.getXRegister());
assertFalse(cpu.getZeroFlag());
assertTrue(cpu.getNegativeFlag());
}
}