mirror of
https://github.com/sethm/symon.git
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Issue #16: Memory window should not reset device registers
This commit is contained in:
Matt Harlum
parent
9cdd718e8d
commit
96819f1bf7
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@ -168,12 +168,12 @@ public class Bus {
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return true;
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}
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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Device d = deviceAddressArray[address - this.startAddress];
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if (d != null) {
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MemoryRange range = d.getMemoryRange();
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int devAddr = address - range.startAddress();
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return d.read(devAddr) & 0xff;
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return d.read(devAddr, cpuAccess) & 0xff;
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}
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throw new MemoryAccessException("Bus read failed. No device at address " + String.format("$%04X", address));
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@ -114,7 +114,7 @@ public class Cpu implements InstructionTable {
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state.sp = 0xff;
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// Set the PC to the address stored in the reset vector
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state.pc = Utils.address(bus.read(RST_VECTOR_L), bus.read(RST_VECTOR_H));
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state.pc = Utils.address(bus.read(RST_VECTOR_L, true), bus.read(RST_VECTOR_H, true));
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// Clear instruction register.
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state.ir = 0;
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@ -168,7 +168,7 @@ public class Cpu implements InstructionTable {
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}
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// Fetch memory location for this instruction.
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state.ir = bus.read(state.pc);
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state.ir = bus.read(state.pc, true);
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int irAddressMode = (state.ir >> 2) & 0x07; // Bits 3-5 of IR: [ | | |X|X|X| | ]
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int irOpMode = state.ir & 0x03; // Bits 6-7 of IR: [ | | | | | |X|X]
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@ -179,7 +179,7 @@ public class Cpu implements InstructionTable {
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// Decode the instruction and operands
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state.instSize = Cpu.instructionSizes[state.ir];
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for (int i = 0; i < state.instSize - 1; i++) {
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state.args[i] = bus.read(state.pc);
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state.args[i] = bus.read(state.pc, true);
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// Increment PC after reading
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incrementPC();
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}
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@ -224,7 +224,7 @@ public class Cpu implements InstructionTable {
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switch (irAddressMode) {
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case 0: // (Zero Page,X)
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tmp = (state.args[0] + state.x) & 0xff;
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effectiveAddress = Utils.address(bus.read(tmp), bus.read(tmp + 1));
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effectiveAddress = Utils.address(bus.read(tmp, true), bus.read(tmp + 1, true));
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break;
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case 1: // Zero Page
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effectiveAddress = state.args[0];
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@ -236,8 +236,8 @@ public class Cpu implements InstructionTable {
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effectiveAddress = Utils.address(state.args[0], state.args[1]);
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break;
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case 4: // (Zero Page),Y
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tmp = Utils.address(bus.read(state.args[0]),
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bus.read((state.args[0] + 1) & 0xff));
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tmp = Utils.address(bus.read(state.args[0], true),
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bus.read((state.args[0] + 1) & 0xff, true));
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effectiveAddress = (tmp + state.y) & 0xffff;
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break;
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case 5: // Zero Page,X
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@ -409,7 +409,7 @@ public class Cpu implements InstructionTable {
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hi = lo + 1;
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}
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state.pc = Utils.address(bus.read(lo), bus.read(hi));
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state.pc = Utils.address(bus.read(lo, true), bus.read(hi, true));
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/* TODO: For accuracy, allow a flag to enable broken behavior of early 6502s:
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*
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* "An original 6502 has does not correctly fetch the target
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@ -436,7 +436,7 @@ public class Cpu implements InstructionTable {
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case 0x15: // Zero Page,X
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case 0x19: // Absolute,Y
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case 0x1d: // Absolute,X
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state.a |= bus.read(effectiveAddress);
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state.a |= bus.read(effectiveAddress, true);
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setArithmeticFlags(state.a);
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break;
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@ -450,7 +450,7 @@ public class Cpu implements InstructionTable {
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case 0x0e: // Absolute
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case 0x16: // Zero Page,X
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case 0x1e: // Absolute,X
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tmp = asl(bus.read(effectiveAddress));
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tmp = asl(bus.read(effectiveAddress, true));
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bus.write(effectiveAddress, tmp);
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setArithmeticFlags(tmp);
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break;
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@ -459,7 +459,7 @@ public class Cpu implements InstructionTable {
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/** BIT - Bit Test ******************************************************/
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case 0x24: // Zero Page
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case 0x2c: // Absolute
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tmp = bus.read(effectiveAddress);
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tmp = bus.read(effectiveAddress, true);
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setZeroFlag((state.a & tmp) == 0);
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setNegativeFlag((tmp & 0x80) != 0);
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setOverflowFlag((tmp & 0x40) != 0);
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@ -478,7 +478,7 @@ public class Cpu implements InstructionTable {
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case 0x35: // Zero Page,X
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case 0x39: // Absolute,Y
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case 0x3d: // Absolute,X
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state.a &= bus.read(effectiveAddress);
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state.a &= bus.read(effectiveAddress, true);
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setArithmeticFlags(state.a);
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break;
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@ -492,7 +492,7 @@ public class Cpu implements InstructionTable {
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case 0x2e: // Absolute
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case 0x36: // Zero Page,X
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case 0x3e: // Absolute,X
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tmp = rol(bus.read(effectiveAddress));
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tmp = rol(bus.read(effectiveAddress, true));
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bus.write(effectiveAddress, tmp);
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setArithmeticFlags(tmp);
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break;
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@ -510,7 +510,7 @@ public class Cpu implements InstructionTable {
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case 0x55: // Zero Page,X
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case 0x59: // Absolute,Y
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case 0x5d: // Absolute,X
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state.a ^= bus.read(effectiveAddress);
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state.a ^= bus.read(effectiveAddress, true);
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setArithmeticFlags(state.a);
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break;
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@ -524,7 +524,7 @@ public class Cpu implements InstructionTable {
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case 0x4e: // Absolute
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case 0x56: // Zero Page,X
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case 0x5e: // Absolute,X
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tmp = lsr(bus.read(effectiveAddress));
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tmp = lsr(bus.read(effectiveAddress, true));
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bus.write(effectiveAddress, tmp);
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setArithmeticFlags(tmp);
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break;
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@ -546,9 +546,9 @@ public class Cpu implements InstructionTable {
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case 0x79: // Absolute,Y
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case 0x7d: // Absolute,X
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if (state.decimalModeFlag) {
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state.a = adcDecimal(state.a, bus.read(effectiveAddress));
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state.a = adcDecimal(state.a, bus.read(effectiveAddress, true));
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} else {
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state.a = adc(state.a, bus.read(effectiveAddress));
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state.a = adc(state.a, bus.read(effectiveAddress, true));
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}
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break;
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@ -562,7 +562,7 @@ public class Cpu implements InstructionTable {
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case 0x6e: // Absolute
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case 0x76: // Zero Page,X
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case 0x7e: // Absolute,X
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tmp = ror(bus.read(effectiveAddress));
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tmp = ror(bus.read(effectiveAddress, true));
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bus.write(effectiveAddress, tmp);
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setArithmeticFlags(tmp);
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break;
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@ -605,7 +605,7 @@ public class Cpu implements InstructionTable {
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case 0xac: // Absolute
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case 0xb4: // Zero Page,X
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case 0xbc: // Absolute,X
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state.y = bus.read(effectiveAddress);
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state.y = bus.read(effectiveAddress, true);
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setArithmeticFlags(state.y);
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break;
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@ -619,7 +619,7 @@ public class Cpu implements InstructionTable {
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case 0xae: // Absolute
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case 0xb6: // Zero Page,Y
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case 0xbe: // Absolute,Y
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state.x = bus.read(effectiveAddress);
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state.x = bus.read(effectiveAddress, true);
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setArithmeticFlags(state.x);
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break;
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@ -636,7 +636,7 @@ public class Cpu implements InstructionTable {
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case 0xb5: // Zero Page,X
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case 0xb9: // Absolute,Y
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case 0xbd: // Absolute,X
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state.a = bus.read(effectiveAddress);
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state.a = bus.read(effectiveAddress, true);
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setArithmeticFlags(state.a);
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break;
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@ -647,7 +647,7 @@ public class Cpu implements InstructionTable {
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break;
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case 0xc4: // Zero Page
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case 0xcc: // Absolute
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cmp(state.y, bus.read(effectiveAddress));
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cmp(state.y, bus.read(effectiveAddress, true));
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break;
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@ -662,7 +662,7 @@ public class Cpu implements InstructionTable {
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case 0xd5: // Zero Page,X
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case 0xd9: // Absolute,Y
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case 0xdd: // Absolute,X
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cmp(state.a, bus.read(effectiveAddress));
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cmp(state.a, bus.read(effectiveAddress, true));
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break;
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@ -671,7 +671,7 @@ public class Cpu implements InstructionTable {
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case 0xce: // Absolute
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case 0xd6: // Zero Page,X
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case 0xde: // Absolute,X
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tmp = (bus.read(effectiveAddress) - 1) & 0xff;
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tmp = (bus.read(effectiveAddress, true) - 1) & 0xff;
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bus.write(effectiveAddress, tmp);
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setArithmeticFlags(tmp);
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break;
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@ -683,7 +683,7 @@ public class Cpu implements InstructionTable {
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break;
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case 0xe4: // Zero Page
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case 0xec: // Absolute
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cmp(state.x, bus.read(effectiveAddress));
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cmp(state.x, bus.read(effectiveAddress, true));
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break;
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@ -703,9 +703,9 @@ public class Cpu implements InstructionTable {
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case 0xf9: // Absolute,Y
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case 0xfd: // Absolute,X
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if (state.decimalModeFlag) {
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state.a = sbcDecimal(state.a, bus.read(effectiveAddress));
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state.a = sbcDecimal(state.a, bus.read(effectiveAddress, true));
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} else {
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state.a = sbc(state.a, bus.read(effectiveAddress));
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state.a = sbc(state.a, bus.read(effectiveAddress, true));
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}
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break;
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@ -715,7 +715,7 @@ public class Cpu implements InstructionTable {
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case 0xee: // Absolute
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case 0xf6: // Zero Page,X
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case 0xfe: // Absolute,X
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tmp = (bus.read(effectiveAddress) + 1) & 0xff;
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tmp = (bus.read(effectiveAddress, true) + 1) & 0xff;
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bus.write(effectiveAddress, tmp);
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setArithmeticFlags(tmp);
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break;
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@ -734,11 +734,11 @@ public class Cpu implements InstructionTable {
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}
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private void peekAhead() throws MemoryAccessException {
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state.nextIr = bus.read(state.pc);
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state.nextIr = bus.read(state.pc, true);
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int nextInstSize = Cpu.instructionSizes[state.nextIr];
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for (int i = 1; i < nextInstSize; i++) {
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int nextRead = (state.pc + i) % bus.endAddress();
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state.nextArgs[i-1] = bus.read(nextRead);
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state.nextArgs[i-1] = bus.read(nextRead, true);
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}
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}
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@ -783,7 +783,7 @@ public class Cpu implements InstructionTable {
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setIrqDisableFlag();
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// Load interrupt vector address into PC
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state.pc = Utils.address(bus.read(vectorLow), bus.read(vectorHigh));
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state.pc = Utils.address(bus.read(vectorLow, true), bus.read(vectorHigh, true));
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}
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/**
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@ -1290,14 +1290,14 @@ public class Cpu implements InstructionTable {
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++state.sp;
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}
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return bus.read(0x100 + state.sp);
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return bus.read(0x100 + state.sp, true);
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}
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/**
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* Peek at the value currently at the top of the stack
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*/
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int stackPeek() throws MemoryAccessException {
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return bus.read(0x100 + state.sp + 1);
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return bus.read(0x100 + state.sp + 1, true);
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}
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/*
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@ -1435,12 +1435,12 @@ public class Cpu implements InstructionTable {
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* @return String containing the disassembled instruction and operands.
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*/
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public String disassembleOpAtAddress(int address) throws MemoryAccessException {
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int opCode = bus.read(address);
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int opCode = bus.read(address, true);
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int args[] = new int[2];
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int size = Cpu.instructionSizes[opCode];
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for (int i = 1; i < size; i++) {
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int nextRead = (address + i) % bus.endAddress();
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args[i-1] = bus.read(nextRead);
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args[i-1] = bus.read(nextRead, true);
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}
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return disassembleOp(opCode, args);
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@ -348,7 +348,7 @@ public class Simulator {
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// output ready.
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if (machine.getAcia() != null && machine.getAcia().hasTxChar()) {
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// This is thread-safe
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console.print(Character.toString((char) machine.getAcia().txRead()));
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console.print(Character.toString((char) machine.getAcia().txRead(true)));
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console.repaint();
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}
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@ -107,10 +107,12 @@ public abstract class Acia extends Device {
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return name + "@" + String.format("%04X", baseAddress);
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}
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public synchronized int rxRead() {
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lastRxRead = System.nanoTime();
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overrun = false;
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rxFull = false;
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public synchronized int rxRead(boolean cpuAccess) {
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if (cpuAccess) {
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lastRxRead = System.nanoTime();
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overrun = false;
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rxFull = false;
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}
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return rxChar;
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}
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@ -128,13 +130,14 @@ public abstract class Acia extends Device {
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rxChar = data;
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}
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public synchronized int txRead() {
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txEmpty = true;
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public synchronized int txRead(boolean cpuAccess) {
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if (cpuAccess) {
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txEmpty = true;
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if (transmitIrqEnabled) {
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if (transmitIrqEnabled) {
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getBus().assertIrq();
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}
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}
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return txChar;
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}
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@ -56,10 +56,10 @@ public class Acia6551 extends Acia {
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}
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@Override
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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switch (address) {
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case DATA_REG:
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return rxRead();
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return rxRead(cpuAccess);
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case STAT_REG:
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return statusReg();
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case CMND_REG:
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@ -53,10 +53,10 @@ public class Acia6850 extends Acia {
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}
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@Override
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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switch (address) {
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case RX_REG:
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return rxRead();
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return rxRead(cpuAccess);
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case STAT_REG:
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return statusReg();
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@ -119,7 +119,7 @@ public class Crtc extends Device {
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}
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@Override
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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switch (address) {
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case REGISTER_RW:
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switch (currentRegister) {
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@ -142,7 +142,7 @@ public class Crtc extends Device {
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public int getCharAtAddress(int address) throws MemoryAccessException {
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// TODO: Row/Column addressing
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return memory.read(address);
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return memory.read(address, false);
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}
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public int getHorizontalDisplayed() {
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@ -72,7 +72,7 @@ public abstract class Device implements Comparable<Device> {
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/* Methods required to be implemented by inheriting classes. */
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public abstract void write(int address, int data) throws MemoryAccessException;
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public abstract int read(int address) throws MemoryAccessException;
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public abstract int read(int address, boolean cpuAccess) throws MemoryAccessException;
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public abstract String toString();
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@ -94,7 +94,7 @@ public class Memory extends Device {
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}
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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return this.mem[address];
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}
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@ -94,7 +94,7 @@ public class SdController extends Device {
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}
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@Override
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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switch (address) {
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case 0:
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return readData();
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@ -75,7 +75,7 @@ public class Via6522 extends Pia {
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}
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@Override
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public int read(int address) throws MemoryAccessException {
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public int read(int address, boolean cpuAccess) throws MemoryAccessException {
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Register[] registers = Register.values();
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if (address >= registers.length) {
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@ -331,10 +331,10 @@ public class MemoryWindow extends JFrame implements ActionListener {
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return Utils.wordToHex(fullAddress(row, 1));
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} else if (column < 9) {
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// Display hex value of the data
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return Utils.byteToHex(bus.read(fullAddress(row, column)));
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return Utils.byteToHex(bus.read(fullAddress(row, column), false));
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} else {
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// Display the ASCII equivalent (if printable)
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||||
return Utils.byteToAscii(bus.read(fullAddress(row, column - 8)));
|
||||
return Utils.byteToAscii(bus.read(fullAddress(row, column - 8), false));
|
||||
}
|
||||
} catch (MemoryAccessException ex) {
|
||||
return "??";
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@ public class AciaTest {
|
|||
verify(mockBus, never()).assertIrq();
|
||||
|
||||
// Transmission should cause IRQ
|
||||
acia.txRead();
|
||||
acia.txRead(true);
|
||||
|
||||
verify(mockBus, atLeastOnce()).assertIrq();
|
||||
}
|
||||
|
|
@ -74,7 +74,7 @@ public class AciaTest {
|
|||
acia.write(0, 'a');
|
||||
|
||||
// Transmission should cause IRQ
|
||||
acia.txRead();
|
||||
acia.txRead(true);
|
||||
|
||||
verify(mockBus, never()).assertIrq();
|
||||
}
|
||||
|
|
@ -83,7 +83,7 @@ public class AciaTest {
|
|||
public void newAciaShouldHaveTxEmptyStatus() throws Exception {
|
||||
Acia acia = new Acia6551(0x000);
|
||||
|
||||
assertEquals(0x10, acia.read(0x0001));
|
||||
assertEquals(0x10, acia.read(0x0001, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -91,7 +91,7 @@ public class AciaTest {
|
|||
Acia acia = new Acia6551(0x000);
|
||||
|
||||
acia.txWrite('a');
|
||||
assertEquals(0x00, acia.read(0x0001));
|
||||
assertEquals(0x00, acia.read(0x0001, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -99,7 +99,7 @@ public class AciaTest {
|
|||
Acia acia = new Acia6551(0x000);
|
||||
|
||||
acia.rxWrite('a');
|
||||
assertEquals(0x18, acia.read(0x0001));
|
||||
assertEquals(0x18, acia.read(0x0001, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -110,7 +110,7 @@ public class AciaTest {
|
|||
acia.rxWrite('a');
|
||||
acia.txWrite('b');
|
||||
|
||||
assertEquals(0x08, acia.read(0x0001));
|
||||
assertEquals(0x08, acia.read(0x0001, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -123,14 +123,31 @@ public class AciaTest {
|
|||
acia.rxWrite('a');
|
||||
acia.rxWrite('b');
|
||||
|
||||
assertEquals(0x04, acia.read(0x0001) & 0x04);
|
||||
assertEquals(0x04, acia.read(0x0001, true) & 0x04);
|
||||
|
||||
// read should reset
|
||||
acia.rxRead();
|
||||
assertEquals(0x00, acia.read(0x0001) & 0x04);
|
||||
acia.rxRead(true);
|
||||
assertEquals(0x00, acia.read(0x0001, true) & 0x04);
|
||||
|
||||
}
|
||||
|
||||
@Test
|
||||
public void aciaShouldOverrunAndMemoryWindowReadShouldNotReset()
|
||||
throws Exception {
|
||||
|
||||
Acia acia = new Acia6551(0x0000);
|
||||
|
||||
// overrun ACIA
|
||||
acia.rxWrite('a');
|
||||
acia.rxWrite('b');
|
||||
|
||||
assertEquals(0x04, acia.read(0x0001, true) & 0x04);
|
||||
|
||||
// memory window read should not reset
|
||||
acia.rxRead(false);
|
||||
assertEquals(0x04, acia.read(0x0001, true) & 0x04);
|
||||
|
||||
}
|
||||
|
||||
@Test
|
||||
public void readingBuffersShouldResetStatus()
|
||||
|
|
@ -141,11 +158,28 @@ public class AciaTest {
|
|||
acia.txWrite('b');
|
||||
|
||||
|
||||
assertEquals(0x08, acia.read(0x0001));
|
||||
assertEquals(0x08, acia.read(0x0001, true));
|
||||
|
||||
assertEquals('a', acia.rxRead());
|
||||
assertEquals('b', acia.txRead());
|
||||
assertEquals('a', acia.rxRead(true));
|
||||
assertEquals('b', acia.txRead(true));
|
||||
|
||||
assertEquals(0x10, acia.read(0x0001));
|
||||
assertEquals(0x10, acia.read(0x0001, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
public void A()
|
||||
throws Exception {
|
||||
Acia acia = new Acia6551(0x0000);
|
||||
|
||||
acia.rxWrite('a');
|
||||
acia.txWrite('b');
|
||||
|
||||
|
||||
assertEquals(0x08, acia.read(0x0001, true));
|
||||
|
||||
assertEquals('a', acia.rxRead(false));
|
||||
assertEquals('b', acia.txRead(false));
|
||||
|
||||
assertEquals(0x08, acia.read(0x0001, true));
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@ public class AciaTest6850 {
|
|||
verify(mockBus, never()).assertIrq();
|
||||
|
||||
// Transmission should cause IRQ
|
||||
acia.txRead();
|
||||
acia.txRead(true);
|
||||
|
||||
verify(mockBus, atLeastOnce()).assertIrq();
|
||||
}
|
||||
|
|
@ -86,7 +86,7 @@ public class AciaTest6850 {
|
|||
acia.write(DATA_REG, 'a');
|
||||
|
||||
// Transmission should cause IRQ
|
||||
acia.txRead();
|
||||
acia.txRead(true);
|
||||
|
||||
verify(mockBus, never()).assertIrq();
|
||||
}
|
||||
|
|
@ -95,7 +95,7 @@ public class AciaTest6850 {
|
|||
public void newAciaShouldHaveTxEmptyStatus() throws Exception {
|
||||
Acia acia = newAcia();
|
||||
|
||||
assertEquals(0x02, acia.read(CMD_STAT_REG) & 0x02);
|
||||
assertEquals(0x02, acia.read(CMD_STAT_REG, true) & 0x02);
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -103,7 +103,7 @@ public class AciaTest6850 {
|
|||
Acia acia = newAcia();
|
||||
|
||||
acia.txWrite('a');
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG) & 0x02);
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x02);
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -112,7 +112,7 @@ public class AciaTest6850 {
|
|||
|
||||
acia.rxWrite('a');
|
||||
|
||||
assertEquals(0x01, acia.read(CMD_STAT_REG) & 0x01);
|
||||
assertEquals(0x01, acia.read(CMD_STAT_REG, true) & 0x01);
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -123,7 +123,7 @@ public class AciaTest6850 {
|
|||
acia.rxWrite('a');
|
||||
acia.txWrite('b');
|
||||
|
||||
assertEquals(0x01, acia.read(CMD_STAT_REG) & 0x03);
|
||||
assertEquals(0x01, acia.read(CMD_STAT_REG, true) & 0x03);
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -136,11 +136,11 @@ public class AciaTest6850 {
|
|||
acia.rxWrite('a');
|
||||
acia.rxWrite('b');
|
||||
|
||||
assertEquals(0x20, acia.read(CMD_STAT_REG) & 0x20);
|
||||
assertEquals(0x20, acia.read(CMD_STAT_REG, true) & 0x20);
|
||||
|
||||
// read should reset
|
||||
acia.rxRead();
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG) & 0x20);
|
||||
acia.rxRead(true);
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x20);
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -149,15 +149,15 @@ public class AciaTest6850 {
|
|||
throws Exception {
|
||||
Acia acia = newAcia();
|
||||
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG) & 0x01);
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x01);
|
||||
|
||||
acia.rxWrite('a');
|
||||
|
||||
assertEquals(0x01, acia.read(CMD_STAT_REG) & 0x01);
|
||||
assertEquals(0x01, acia.read(CMD_STAT_REG, true) & 0x01);
|
||||
|
||||
acia.rxRead();
|
||||
acia.rxRead(true);
|
||||
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG) & 0x01);
|
||||
assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x01);
|
||||
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -121,31 +121,31 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
0x0e, 0x04, 0x12); // ASL $1204
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x7f00));
|
||||
assertEquals(0x00, bus.read(0x7f00, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x7f01));
|
||||
assertEquals(0x02, bus.read(0x7f01, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x3502));
|
||||
assertEquals(0x04, bus.read(0x3502, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x88, bus.read(0x3503));
|
||||
assertEquals(0x88, bus.read(0x3503, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1204));
|
||||
assertEquals(0x00, bus.read(0x1204, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
|
@ -165,8 +165,8 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
|
||||
// Old PC-1 should be on stack (i.e.: address of third byte of the
|
||||
// JSR instruction, 0x0204)
|
||||
assertEquals(0x02, bus.read(0x1ff));
|
||||
assertEquals(0x04, bus.read(0x1fe));
|
||||
assertEquals(0x02, bus.read(0x1ff, true));
|
||||
assertEquals(0x04, bus.read(0x1fe, true));
|
||||
|
||||
// No flags should have changed.
|
||||
assertEquals(0x20, cpu.getProcessorStatus());
|
||||
|
|
@ -295,61 +295,61 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
0x2e, 0x01, 0x12); // ROL $1201 (m=%10000001, c=0)
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1200));
|
||||
assertEquals(0x00, bus.read(0x1200, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x1201));
|
||||
assertEquals(0x02, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step(2);
|
||||
assertEquals(0x05, bus.read(0x1201));
|
||||
assertEquals(0x05, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x0a, bus.read(0x1201));
|
||||
assertEquals(0x0a, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x14, bus.read(0x1201));
|
||||
assertEquals(0x14, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x28, bus.read(0x1201));
|
||||
assertEquals(0x28, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x50, bus.read(0x1201));
|
||||
assertEquals(0x50, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xa0, bus.read(0x1201));
|
||||
assertEquals(0xa0, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x1201));
|
||||
assertEquals(0x40, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x81, bus.read(0x1201));
|
||||
assertEquals(0x81, bus.read(0x1201, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -418,38 +418,38 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
0x4e, 0x05, 0x12); // LSR $1205
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1200));
|
||||
assertEquals(0x00, bus.read(0x1200, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1201));
|
||||
assertEquals(0x00, bus.read(0x1201, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x1202));
|
||||
assertEquals(0x01, bus.read(0x1202, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x22, bus.read(0x1203));
|
||||
assertEquals(0x22, bus.read(0x1203, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x1204));
|
||||
assertEquals(0x40, bus.read(0x1204, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
// Setting Carry should not affect the result.
|
||||
cpu.step(2);
|
||||
assertEquals(0x01, bus.read(0x1205));
|
||||
assertEquals(0x01, bus.read(0x1205, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -654,61 +654,61 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
0x6e, 0x11, 0x12); // ROR $1201 (m=%00010000, c=0)
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1210));
|
||||
assertEquals(0x00, bus.read(0x1210, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x08, bus.read(0x1211));
|
||||
assertEquals(0x08, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x1211));
|
||||
assertEquals(0x04, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x1211));
|
||||
assertEquals(0x02, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x1211));
|
||||
assertEquals(0x01, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1211));
|
||||
assertEquals(0x00, bus.read(0x1211, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x1211));
|
||||
assertEquals(0x80, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x1211));
|
||||
assertEquals(0x40, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x20, bus.read(0x1211));
|
||||
assertEquals(0x20, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x10, bus.read(0x1211));
|
||||
assertEquals(0x10, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -720,7 +720,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setYRegister(0x00);
|
||||
bus.loadProgram(0x8c, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1210));
|
||||
assertEquals(0x00, bus.read(0x1210, true));
|
||||
// STY should have NO effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -730,7 +730,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setYRegister(0x0f);
|
||||
bus.loadProgram(0x8c, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x1210));
|
||||
assertEquals(0x0f, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -739,7 +739,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setYRegister(0x80);
|
||||
bus.loadProgram(0x8c, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x1210));
|
||||
assertEquals(0x80, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -750,7 +750,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x00);
|
||||
bus.loadProgram(0x8d, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1210));
|
||||
assertEquals(0x00, bus.read(0x1210, true));
|
||||
// STA should have NO effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -760,7 +760,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x0f);
|
||||
bus.loadProgram(0x8d, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x1210));
|
||||
assertEquals(0x0f, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -769,7 +769,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x80);
|
||||
bus.loadProgram(0x8d, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x1210));
|
||||
assertEquals(0x80, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -780,7 +780,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setXRegister(0x00);
|
||||
bus.loadProgram(0x8e, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1210));
|
||||
assertEquals(0x00, bus.read(0x1210, true));
|
||||
// STX should have NO effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -790,7 +790,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setXRegister(0x0f);
|
||||
bus.loadProgram(0x8e, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x1210));
|
||||
assertEquals(0x0f, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -799,7 +799,7 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
cpu.setXRegister(0x80);
|
||||
bus.loadProgram(0x8e, 0x10, 0x12);
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x1210));
|
||||
assertEquals(0x80, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -957,22 +957,22 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
0xce, 0x13, 0x12); // DEC $1213
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xff, bus.read(0x1210));
|
||||
assertEquals(0xff, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1211));
|
||||
assertEquals(0x00, bus.read(0x1211, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x7f, bus.read(0x1212));
|
||||
assertEquals(0x7f, bus.read(0x1212, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xfe, bus.read(0x1213));
|
||||
assertEquals(0xfe, bus.read(0x1213, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -1213,17 +1213,17 @@ public class CpuAbsoluteModeTest extends TestCase {
|
|||
0xee, 0x12, 0x12); // INC $1212
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x1210));
|
||||
assertEquals(0x01, bus.read(0x1210, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x1211));
|
||||
assertEquals(0x80, bus.read(0x1211, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1212));
|
||||
assertEquals(0x00, bus.read(0x1212, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
|
|||
|
|
@ -117,31 +117,31 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
0x1e, 0x04, 0x2c); // ASL $2c04,X
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x2c30));
|
||||
assertEquals(0x00, bus.read(0x2c30, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x2c31));
|
||||
assertEquals(0x02, bus.read(0x2c31, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x2c32));
|
||||
assertEquals(0x04, bus.read(0x2c32, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x88, bus.read(0x2c33));
|
||||
assertEquals(0x88, bus.read(0x2c33, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x2c34));
|
||||
assertEquals(0x00, bus.read(0x2c34, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
|
@ -229,61 +229,61 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
0x3e, 0x01, 0x10); // ROL $1001,X (m=%10000001, c=0)
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x1070));
|
||||
assertEquals(0x00, bus.read(0x1070, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x1071));
|
||||
assertEquals(0x02, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step(2);
|
||||
assertEquals(0x05, bus.read(0x1071));
|
||||
assertEquals(0x05, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x0a, bus.read(0x1071));
|
||||
assertEquals(0x0a, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x14, bus.read(0x1071));
|
||||
assertEquals(0x14, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x28, bus.read(0x1071));
|
||||
assertEquals(0x28, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x50, bus.read(0x1071));
|
||||
assertEquals(0x50, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xa0, bus.read(0x1071));
|
||||
assertEquals(0xa0, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x1071));
|
||||
assertEquals(0x40, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x81, bus.read(0x1071));
|
||||
assertEquals(0x81, bus.read(0x1071, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -346,38 +346,38 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
0x5e, 0x05, 0xab); // LSR $ab05,X
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab30));
|
||||
assertEquals(0x00, bus.read(0xab30, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab31));
|
||||
assertEquals(0x00, bus.read(0xab31, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0xab32));
|
||||
assertEquals(0x01, bus.read(0xab32, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x22, bus.read(0xab33));
|
||||
assertEquals(0x22, bus.read(0xab33, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0xab34));
|
||||
assertEquals(0x40, bus.read(0xab34, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
// Setting Carry should not affect the result.
|
||||
cpu.step(2);
|
||||
assertEquals(0x01, bus.read(0xab35));
|
||||
assertEquals(0x01, bus.read(0xab35, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -609,61 +609,61 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
cpu.setXRegister(0x30);
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab40));
|
||||
assertEquals(0x00, bus.read(0xab40, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x08, bus.read(0xab41));
|
||||
assertEquals(0x08, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0xab41));
|
||||
assertEquals(0x04, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0xab41));
|
||||
assertEquals(0x02, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0xab41));
|
||||
assertEquals(0x01, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab41));
|
||||
assertEquals(0x00, bus.read(0xab41, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0xab41));
|
||||
assertEquals(0x80, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0xab41));
|
||||
assertEquals(0x40, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x20, bus.read(0xab41));
|
||||
assertEquals(0x20, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x10, bus.read(0xab41));
|
||||
assertEquals(0x10, bus.read(0xab41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -677,7 +677,7 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x00);
|
||||
bus.loadProgram(0x9d, 0x10, 0xab); // STA $ab10,X
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab40));
|
||||
assertEquals(0x00, bus.read(0xab40, true));
|
||||
// STA should have NO affect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -688,7 +688,7 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x0f);
|
||||
bus.loadProgram(0x9d, 0x10, 0xab); // STA $ab10,X
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0xab40));
|
||||
assertEquals(0x0f, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -698,7 +698,7 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x80);
|
||||
bus.loadProgram(0x9d, 0x10, 0xab); // STA $ab10,X
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0xab40));
|
||||
assertEquals(0x80, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -808,22 +808,22 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
cpu.setXRegister(0x30);
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xff, bus.read(0xab40));
|
||||
assertEquals(0xff, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab41));
|
||||
assertEquals(0x00, bus.read(0xab41, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x7f, bus.read(0xab42));
|
||||
assertEquals(0x7f, bus.read(0xab42, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xfe, bus.read(0xab43));
|
||||
assertEquals(0xfe, bus.read(0xab43, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -1051,17 +1051,17 @@ public class CpuAbsoluteXModeTest extends TestCase {
|
|||
0xfe, 0x12, 0xab); // INC $ab12,X
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0xab30));
|
||||
assertEquals(0x01, bus.read(0xab30, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0xab31));
|
||||
assertEquals(0x80, bus.read(0xab31, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab32));
|
||||
assertEquals(0x00, bus.read(0xab32, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
|
|||
|
|
@ -411,7 +411,7 @@ public class CpuAbsoluteYModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x00);
|
||||
bus.loadProgram(0x99, 0x10, 0xab); // STA $ab10,Y
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab40));
|
||||
assertEquals(0x00, bus.read(0xab40, true));
|
||||
// STA should have NO effect on flags
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -423,7 +423,7 @@ public class CpuAbsoluteYModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x0f);
|
||||
bus.loadProgram(0x99, 0x10, 0xab); // STA $ab10,Y
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0xab40));
|
||||
assertEquals(0x0f, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -433,7 +433,7 @@ public class CpuAbsoluteYModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x80);
|
||||
bus.loadProgram(0x99, 0x10, 0xab); // STA $ab10,Y
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0xab40));
|
||||
assertEquals(0x80, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
|
|||
|
|
@ -101,10 +101,10 @@ public class CpuImpliedModeTest {
|
|||
cpu.step(); // Triggers the BRK
|
||||
|
||||
// Was at PC = 0x204. PC+1 should now be on the stack
|
||||
assertEquals(0x02, bus.read(0x1ff)); // PC high byte
|
||||
assertEquals(0x05, bus.read(0x1fe)); // PC low byte
|
||||
assertEquals(0x02, bus.read(0x1ff, true)); // PC high byte
|
||||
assertEquals(0x05, bus.read(0x1fe, true)); // PC low byte
|
||||
assertEquals(0x20 | Cpu.P_CARRY | Cpu.P_OVERFLOW | Cpu.P_BREAK,
|
||||
bus.read(0x1fd)); // Processor Status, with B set
|
||||
bus.read(0x1fd, true)); // Processor Status, with B set
|
||||
|
||||
// Interrupt vector held 0x1234, so we should be there.
|
||||
assertEquals(0x1234, cpu.getProgramCounter());
|
||||
|
|
@ -149,10 +149,10 @@ public class CpuImpliedModeTest {
|
|||
|
||||
|
||||
// Was at PC = 0x204. PC+1 should now be on the stack
|
||||
assertEquals(0x02, bus.read(0x1ff)); // PC high byte
|
||||
assertEquals(0x05, bus.read(0x1fe)); // PC low byte
|
||||
assertEquals(0x02, bus.read(0x1ff, true)); // PC high byte
|
||||
assertEquals(0x05, bus.read(0x1fe, true)); // PC low byte
|
||||
assertEquals(0x20 | Cpu.P_CARRY | Cpu.P_OVERFLOW | Cpu.P_BREAK | Cpu.P_IRQ_DISABLE,
|
||||
bus.read(0x1fd)); // Processor Status, with B set
|
||||
bus.read(0x1fd, true)); // Processor Status, with B set
|
||||
|
||||
// Interrupt vector held 0x1234, so we should be there.
|
||||
assertEquals(0x1234, cpu.getProgramCounter());
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ public class CpuIndexedIndirectModeTest {
|
|||
cpu.step(1);
|
||||
|
||||
assertEquals(0x35, cpu.getAccumulator());
|
||||
assertEquals(0x31, bus.read(0xc51f));
|
||||
assertEquals(0x31, bus.read(0xc51f, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -103,6 +103,6 @@ public class CpuIndexedIndirectModeTest {
|
|||
cpu.step(1);
|
||||
|
||||
assertEquals(0x11, cpu.getAccumulator());
|
||||
assertEquals(0x31, bus.read(0xc51f));
|
||||
assertEquals(0x31, bus.read(0xc51f, true));
|
||||
}
|
||||
}
|
||||
|
|
@ -62,7 +62,7 @@ public class CpuIndirectIndexedModeTest {
|
|||
cpu.step(1);
|
||||
|
||||
assertEquals(0xf3, cpu.getAccumulator());
|
||||
assertEquals(0xe3, bus.read(0xd828));
|
||||
assertEquals(0xe3, bus.read(0xd828, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -78,7 +78,7 @@ public class CpuIndirectIndexedModeTest {
|
|||
cpu.step(1);
|
||||
|
||||
assertEquals(0x22, cpu.getAccumulator());
|
||||
assertEquals(0xe3, bus.read(0xd828));
|
||||
assertEquals(0xe3, bus.read(0xd828, true));
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -411,7 +411,7 @@ public class CpuIndirectXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x00);
|
||||
bus.loadProgram(0x9d, 0x10, 0xab); // STA $ab10,X
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0xab40));
|
||||
assertEquals(0x00, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -422,7 +422,7 @@ public class CpuIndirectXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x0f);
|
||||
bus.loadProgram(0x9d, 0x10, 0xab); // STA $ab10,X
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0xab40));
|
||||
assertEquals(0x0f, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -432,7 +432,7 @@ public class CpuIndirectXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x80);
|
||||
bus.loadProgram(0x9d, 0x10, 0xab); // STA $ab10,X
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0xab40));
|
||||
assertEquals(0x80, bus.read(0xab40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
|
|||
|
|
@ -71,61 +71,61 @@ public class CpuTest extends TestCase {
|
|||
|
||||
public void testStackPush() throws MemoryAccessException {
|
||||
assertEquals(0xff, cpu.getStackPointer());
|
||||
assertEquals(0x00, bus.read(0x1ff));
|
||||
assertEquals(0x00, bus.read(0x1ff, true));
|
||||
|
||||
cpu.stackPush(0x06);
|
||||
assertEquals(0xfe, cpu.getStackPointer());
|
||||
assertEquals(0x06, bus.read(0x1ff));
|
||||
assertEquals(0x06, bus.read(0x1ff, true));
|
||||
|
||||
cpu.stackPush(0x05);
|
||||
assertEquals(0xfd, cpu.getStackPointer());
|
||||
assertEquals(0x06, bus.read(0x1ff));
|
||||
assertEquals(0x05, bus.read(0x1fe));
|
||||
assertEquals(0x06, bus.read(0x1ff, true));
|
||||
assertEquals(0x05, bus.read(0x1fe, true));
|
||||
|
||||
cpu.stackPush(0x04);
|
||||
assertEquals(0xfc, cpu.getStackPointer());
|
||||
assertEquals(0x06, bus.read(0x1ff));
|
||||
assertEquals(0x05, bus.read(0x1fe));
|
||||
assertEquals(0x04, bus.read(0x1fd));
|
||||
assertEquals(0x06, bus.read(0x1ff, true));
|
||||
assertEquals(0x05, bus.read(0x1fe, true));
|
||||
assertEquals(0x04, bus.read(0x1fd, true));
|
||||
|
||||
cpu.stackPush(0x03);
|
||||
assertEquals(0xfb, cpu.getStackPointer());
|
||||
assertEquals(0x06, bus.read(0x1ff));
|
||||
assertEquals(0x05, bus.read(0x1fe));
|
||||
assertEquals(0x04, bus.read(0x1fd));
|
||||
assertEquals(0x03, bus.read(0x1fc));
|
||||
assertEquals(0x06, bus.read(0x1ff, true));
|
||||
assertEquals(0x05, bus.read(0x1fe, true));
|
||||
assertEquals(0x04, bus.read(0x1fd, true));
|
||||
assertEquals(0x03, bus.read(0x1fc, true));
|
||||
|
||||
cpu.stackPush(0x02);
|
||||
assertEquals(0xfa, cpu.getStackPointer());
|
||||
assertEquals(0x06, bus.read(0x1ff));
|
||||
assertEquals(0x05, bus.read(0x1fe));
|
||||
assertEquals(0x04, bus.read(0x1fd));
|
||||
assertEquals(0x03, bus.read(0x1fc));
|
||||
assertEquals(0x02, bus.read(0x1fb));
|
||||
assertEquals(0x06, bus.read(0x1ff, true));
|
||||
assertEquals(0x05, bus.read(0x1fe, true));
|
||||
assertEquals(0x04, bus.read(0x1fd, true));
|
||||
assertEquals(0x03, bus.read(0x1fc, true));
|
||||
assertEquals(0x02, bus.read(0x1fb, true));
|
||||
|
||||
cpu.stackPush(0x01);
|
||||
assertEquals(0xf9, cpu.getStackPointer());
|
||||
assertEquals(0x06, bus.read(0x1ff));
|
||||
assertEquals(0x05, bus.read(0x1fe));
|
||||
assertEquals(0x04, bus.read(0x1fd));
|
||||
assertEquals(0x03, bus.read(0x1fc));
|
||||
assertEquals(0x02, bus.read(0x1fb));
|
||||
assertEquals(0x01, bus.read(0x1fa));
|
||||
assertEquals(0x06, bus.read(0x1ff, true));
|
||||
assertEquals(0x05, bus.read(0x1fe, true));
|
||||
assertEquals(0x04, bus.read(0x1fd, true));
|
||||
assertEquals(0x03, bus.read(0x1fc, true));
|
||||
assertEquals(0x02, bus.read(0x1fb, true));
|
||||
assertEquals(0x01, bus.read(0x1fa, true));
|
||||
}
|
||||
|
||||
public void testStackPushWrapsAroundToStackTop() throws MemoryAccessException {
|
||||
cpu.setStackPointer(0x01);
|
||||
|
||||
cpu.stackPush(0x01);
|
||||
assertEquals(0x01, bus.read(0x101));
|
||||
assertEquals(0x01, bus.read(0x101, true));
|
||||
assertEquals(0x00, cpu.getStackPointer());
|
||||
|
||||
cpu.stackPush(0x02);
|
||||
assertEquals(0x02, bus.read(0x100));
|
||||
assertEquals(0x02, bus.read(0x100, true));
|
||||
assertEquals(0xff, cpu.getStackPointer());
|
||||
|
||||
cpu.stackPush(0x03);
|
||||
assertEquals(0x03, bus.read(0x1ff));
|
||||
assertEquals(0x03, bus.read(0x1ff, true));
|
||||
assertEquals(0xfe, cpu.getStackPointer());
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -119,31 +119,31 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
0x06, 0x04);
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x0000));
|
||||
assertEquals(0x00, bus.read(0x0000, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x0001));
|
||||
assertEquals(0x02, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x0002));
|
||||
assertEquals(0x04, bus.read(0x0002, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x88, bus.read(0x0003));
|
||||
assertEquals(0x88, bus.read(0x0003, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x0004));
|
||||
assertEquals(0x00, bus.read(0x0004, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
|
@ -274,61 +274,61 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
0x26, 0x01); // ROL $01 (m=%10000001, c=0)
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x0000));
|
||||
assertEquals(0x00, bus.read(0x0000, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x0001));
|
||||
assertEquals(0x02, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step(2);
|
||||
assertEquals(0x05, bus.read(0x0001));
|
||||
assertEquals(0x05, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x0a, bus.read(0x0001));
|
||||
assertEquals(0x0a, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x14, bus.read(0x0001));
|
||||
assertEquals(0x14, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x28, bus.read(0x0001));
|
||||
assertEquals(0x28, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x50, bus.read(0x0001));
|
||||
assertEquals(0x50, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xa0, bus.read(0x0001));
|
||||
assertEquals(0xa0, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x0001));
|
||||
assertEquals(0x40, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x81, bus.read(0x0001));
|
||||
assertEquals(0x81, bus.read(0x0001, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -387,38 +387,38 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
0x46, 0x05); // LSR $05
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x0000));
|
||||
assertEquals(0x00, bus.read(0x0000, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x0001));
|
||||
assertEquals(0x00, bus.read(0x0001, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x0002));
|
||||
assertEquals(0x01, bus.read(0x0002, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x22, bus.read(0x0003));
|
||||
assertEquals(0x22, bus.read(0x0003, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x0004));
|
||||
assertEquals(0x40, bus.read(0x0004, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
// Setting Carry should not affect the result.
|
||||
cpu.step(2);
|
||||
assertEquals(0x01, bus.read(0x0005));
|
||||
assertEquals(0x01, bus.read(0x0005, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -623,61 +623,61 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
0x66, 0x11); // ROR $01 (m=%00010000, c=0)
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x10));
|
||||
assertEquals(0x00, bus.read(0x10, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x08, bus.read(0x11));
|
||||
assertEquals(0x08, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x11));
|
||||
assertEquals(0x04, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x11));
|
||||
assertEquals(0x02, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x11));
|
||||
assertEquals(0x01, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x11));
|
||||
assertEquals(0x00, bus.read(0x11, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x11));
|
||||
assertEquals(0x80, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x11));
|
||||
assertEquals(0x40, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x20, bus.read(0x11));
|
||||
assertEquals(0x20, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x10, bus.read(0x11));
|
||||
assertEquals(0x10, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -689,7 +689,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setYRegister(0x00);
|
||||
bus.loadProgram(0x84, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x10));
|
||||
assertEquals(0x00, bus.read(0x10, true));
|
||||
// Should have no effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -699,7 +699,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setYRegister(0x0f);
|
||||
bus.loadProgram(0x84, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x10));
|
||||
assertEquals(0x0f, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -708,7 +708,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setYRegister(0x80);
|
||||
bus.loadProgram(0x84, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x10));
|
||||
assertEquals(0x80, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -719,7 +719,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x00);
|
||||
bus.loadProgram(0x85, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x10));
|
||||
assertEquals(0x00, bus.read(0x10, true));
|
||||
// Should have no effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -729,7 +729,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x0f);
|
||||
bus.loadProgram(0x85, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x10));
|
||||
assertEquals(0x0f, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -738,7 +738,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x80);
|
||||
bus.loadProgram(0x85, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x10));
|
||||
assertEquals(0x80, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -749,7 +749,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setXRegister(0x00);
|
||||
bus.loadProgram(0x86, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x10));
|
||||
assertEquals(0x00, bus.read(0x10, true));
|
||||
// Should have no effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -759,7 +759,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setXRegister(0x0f);
|
||||
bus.loadProgram(0x86, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x10));
|
||||
assertEquals(0x0f, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -768,7 +768,7 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
cpu.setXRegister(0x80);
|
||||
bus.loadProgram(0x86, 0x10);
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x10));
|
||||
assertEquals(0x80, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -926,22 +926,22 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
0xc6, 0x13); // DEC $13
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xff, bus.read(0x10));
|
||||
assertEquals(0xff, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x11));
|
||||
assertEquals(0x00, bus.read(0x11, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x7f, bus.read(0x12));
|
||||
assertEquals(0x7f, bus.read(0x12, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xfe, bus.read(0x13));
|
||||
assertEquals(0xfe, bus.read(0x13, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -1182,17 +1182,17 @@ public class CpuZeroPageModeTest extends TestCase {
|
|||
0xe6, 0x12); // INC $12
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x10));
|
||||
assertEquals(0x01, bus.read(0x10, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x11));
|
||||
assertEquals(0x80, bus.read(0x11, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x12));
|
||||
assertEquals(0x00, bus.read(0x12, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
|
|||
|
|
@ -131,38 +131,38 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
0x16, 0xd2); // ASL $d2,X
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x30));
|
||||
assertEquals(0x00, bus.read(0x30, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x31));
|
||||
assertEquals(0x02, bus.read(0x31, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x32));
|
||||
assertEquals(0x04, bus.read(0x32, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x88, bus.read(0x33));
|
||||
assertEquals(0x88, bus.read(0x33, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x34));
|
||||
assertEquals(0x00, bus.read(0x34, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
// Should wrap around, d2 + 30 = 02
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x02));
|
||||
assertEquals(0x02, bus.read(0x02, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -251,61 +251,61 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
0x36, 0x01); // ROL $01,X (m=%10000001, c=0)
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x70));
|
||||
assertEquals(0x00, bus.read(0x70, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x71));
|
||||
assertEquals(0x02, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step(2);
|
||||
assertEquals(0x05, bus.read(0x71));
|
||||
assertEquals(0x05, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x0a, bus.read(0x71));
|
||||
assertEquals(0x0a, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x14, bus.read(0x71));
|
||||
assertEquals(0x14, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x28, bus.read(0x71));
|
||||
assertEquals(0x28, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x50, bus.read(0x71));
|
||||
assertEquals(0x50, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xa0, bus.read(0x71));
|
||||
assertEquals(0xa0, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x71));
|
||||
assertEquals(0x40, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x81, bus.read(0x71));
|
||||
assertEquals(0x81, bus.read(0x71, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -368,38 +368,38 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
0x56, 0x05); // LSR $05,X
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x30));
|
||||
assertEquals(0x00, bus.read(0x30, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x31));
|
||||
assertEquals(0x00, bus.read(0x31, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x32));
|
||||
assertEquals(0x01, bus.read(0x32, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x22, bus.read(0x33));
|
||||
assertEquals(0x22, bus.read(0x33, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x34));
|
||||
assertEquals(0x40, bus.read(0x34, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
// Setting Carry should not affect the result.
|
||||
cpu.step(2);
|
||||
assertEquals(0x01, bus.read(0x35));
|
||||
assertEquals(0x01, bus.read(0x35, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -641,61 +641,61 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setXRegister(0x30);
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x40));
|
||||
assertEquals(0x00, bus.read(0x40, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x08, bus.read(0x41));
|
||||
assertEquals(0x08, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x04, bus.read(0x41));
|
||||
assertEquals(0x04, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x02, bus.read(0x41));
|
||||
assertEquals(0x02, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x41));
|
||||
assertEquals(0x01, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x41));
|
||||
assertEquals(0x00, bus.read(0x41, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertTrue(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x41));
|
||||
assertEquals(0x80, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x40, bus.read(0x41));
|
||||
assertEquals(0x40, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x20, bus.read(0x41));
|
||||
assertEquals(0x20, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x10, bus.read(0x41));
|
||||
assertEquals(0x10, bus.read(0x41, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
assertFalse(cpu.getCarryFlag());
|
||||
|
|
@ -708,7 +708,7 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setYRegister(0x00);
|
||||
bus.loadProgram(0x94, 0x10); // STY $10,X
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x40));
|
||||
assertEquals(0x00, bus.read(0x40, true));
|
||||
// Should have no effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -719,7 +719,7 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setYRegister(0x0f);
|
||||
bus.loadProgram(0x94, 0x10); // STY $10,X
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x40));
|
||||
assertEquals(0x0f, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -729,7 +729,7 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setYRegister(0x80);
|
||||
bus.loadProgram(0x94, 0x10); // STY $10,X
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x40));
|
||||
assertEquals(0x80, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -742,7 +742,7 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x00);
|
||||
bus.loadProgram(0x95, 0x10); // STA $10,X
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x40));
|
||||
assertEquals(0x00, bus.read(0x40, true));
|
||||
// Should have no effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -753,7 +753,7 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x0f);
|
||||
bus.loadProgram(0x95, 0x10); // STA $10,X
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x40));
|
||||
assertEquals(0x0f, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -763,7 +763,7 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setAccumulator(0x80);
|
||||
bus.loadProgram(0x95, 0x10); // STA $10,X
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x40));
|
||||
assertEquals(0x80, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -873,22 +873,22 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
cpu.setXRegister(0x30);
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xff, bus.read(0x40));
|
||||
assertEquals(0xff, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x41));
|
||||
assertEquals(0x00, bus.read(0x41, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x7f, bus.read(0x42));
|
||||
assertEquals(0x7f, bus.read(0x42, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0xfe, bus.read(0x43));
|
||||
assertEquals(0xfe, bus.read(0x43, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
@ -1116,17 +1116,17 @@ public class CpuZeroPageXModeTest extends TestCase {
|
|||
0xf6, 0x12); // INC $12,X
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x01, bus.read(0x30));
|
||||
assertEquals(0x01, bus.read(0x30, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x31));
|
||||
assertEquals(0x80, bus.read(0x31, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertTrue(cpu.getNegativeFlag());
|
||||
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x32));
|
||||
assertEquals(0x00, bus.read(0x32, true));
|
||||
assertTrue(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@ public class CpuZeroPageYModeTest extends TestCase {
|
|||
cpu.setXRegister(0x00);
|
||||
bus.loadProgram(0x96, 0x10); // STX $10,Y
|
||||
cpu.step();
|
||||
assertEquals(0x00, bus.read(0x40));
|
||||
assertEquals(0x00, bus.read(0x40, true));
|
||||
// Should have no effect on flags.
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
|
@ -57,7 +57,7 @@ public class CpuZeroPageYModeTest extends TestCase {
|
|||
cpu.setXRegister(0x0f);
|
||||
bus.loadProgram(0x96, 0x10); // STX $10,Y
|
||||
cpu.step();
|
||||
assertEquals(0x0f, bus.read(0x40));
|
||||
assertEquals(0x0f, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
|
||||
|
|
@ -66,7 +66,7 @@ public class CpuZeroPageYModeTest extends TestCase {
|
|||
cpu.setXRegister(0x80);
|
||||
bus.loadProgram(0x96, 0x10); // STX $10,Y
|
||||
cpu.step();
|
||||
assertEquals(0x80, bus.read(0x40));
|
||||
assertEquals(0x80, bus.read(0x40, true));
|
||||
assertFalse(cpu.getZeroFlag());
|
||||
assertFalse(cpu.getNegativeFlag());
|
||||
}
|
||||
|
|
|
|||
|
|
@ -242,19 +242,19 @@ public class CrtcTest {
|
|||
crtc.write(0, 12); // High byte
|
||||
|
||||
crtc.write(1, 0x03);
|
||||
assertEquals(0, crtc.read(1));
|
||||
assertEquals(0, crtc.read(1, true));
|
||||
|
||||
crtc.write(1, 0x70);
|
||||
assertEquals(0, crtc.read(1));
|
||||
assertEquals(0, crtc.read(1, true));
|
||||
|
||||
|
||||
crtc.write(0, 13); // Low byte
|
||||
|
||||
crtc.write(1, 0xff);
|
||||
assertEquals(0, crtc.read(1));
|
||||
assertEquals(0, crtc.read(1, true));
|
||||
|
||||
crtc.write(1, 0x0e);
|
||||
assertEquals(0, crtc.read(1));
|
||||
assertEquals(0, crtc.read(1, true));
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -278,10 +278,10 @@ public class CrtcTest {
|
|||
crtc.write(0, 14);
|
||||
|
||||
crtc.write(1, 0x3f);
|
||||
assertEquals(0x3f, crtc.read(1));
|
||||
assertEquals(0x3f, crtc.read(1, true));
|
||||
|
||||
crtc.write(1, 0x70);
|
||||
assertEquals(0x70, crtc.read(1));
|
||||
assertEquals(0x70, crtc.read(1, true));
|
||||
}
|
||||
|
||||
@Test
|
||||
|
|
@ -313,13 +313,13 @@ public class CrtcTest {
|
|||
crtc.write(0, 15);
|
||||
|
||||
crtc.write(1, 0x00);
|
||||
assertEquals(0x00, crtc.read(1));
|
||||
assertEquals(0x00, crtc.read(1, true));
|
||||
|
||||
crtc.write(1, 0x1f);
|
||||
assertEquals(0x1f, crtc.read(1));
|
||||
assertEquals(0x1f, crtc.read(1, true));
|
||||
|
||||
crtc.write(1, 0xff);
|
||||
assertEquals(0xff, crtc.read(1));
|
||||
assertEquals(0xff, crtc.read(1, true));
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user