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Add NMI flag to CPU
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0c5035fc56
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@ -151,15 +151,27 @@ public class Bus {
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throw new MemoryAccessException("Bus write failed. No device at address " + String.format("$%04X", address));
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}
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public void assertInterrupt() {
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public void assertIrq() {
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if (cpu != null) {
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cpu.assertInterrupt();
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cpu.assertIrq();
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}
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}
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public void clearInterrupt() {
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public void clearIrq() {
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if (cpu != null) {
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cpu.clearInterrupt();
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cpu.clearIrq();
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}
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}
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public void assertNmi() {
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if (cpu != null) {
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cpu.assertNmi();
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}
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}
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public void clearNmi() {
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if (cpu != null) {
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cpu.clearNmi();
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}
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}
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@ -133,7 +133,7 @@ public class Cpu implements InstructionTable {
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state.overflowFlag = false;
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state.negativeFlag = false;
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state.interruptAsserted = false;
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state.irqAsserted = false;
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// Clear illegal opcode trap.
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state.opTrap = false;
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@ -154,7 +154,7 @@ public class Cpu implements InstructionTable {
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}
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/**
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* Performs an individual machine cycle.
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* Performs an individual instruction cycle.
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*/
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public void step() throws MemoryAccessException {
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// Store the address from which the IR was read, for debugging
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@ -1168,15 +1168,29 @@ public class Cpu implements InstructionTable {
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/**
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* Simulate transition from logic-high to logic-low on the INT line.
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*/
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public void assertInterrupt() {
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state.interruptAsserted = true;
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public void assertIrq() {
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state.irqAsserted = true;
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}
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/**
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* Simulate transition from logic-low to logic-high of the INT line.
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*/
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public void clearInterrupt() {
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state.interruptAsserted = false;
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public void clearIrq() {
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state.irqAsserted = false;
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}
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/**
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* Simulate transition from logic-high to logic-low on the NMI line.
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*/
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public void assertNmi() {
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state.nmiAsserted = true;
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}
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/**
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* Simulate transition from logic-low to logic-high of the NMI line.
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*/
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public void clearNmi() {
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state.nmiAsserted = false;
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}
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/**
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@ -1323,8 +1337,8 @@ public class Cpu implements InstructionTable {
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public int[] args = new int[2];
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public int instSize;
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public boolean opTrap;
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/* True if the INT line was held low */
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public boolean interruptAsserted;
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public boolean irqAsserted;
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public boolean nmiAsserted;
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/* Status Flag Register bits */
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public boolean carryFlag;
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@ -1361,7 +1375,7 @@ public class Cpu implements InstructionTable {
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this.args[1] = s.args[1];
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this.instSize = s.instSize;
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this.opTrap = s.opTrap;
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this.interruptAsserted = s.interruptAsserted;
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this.irqAsserted = s.irqAsserted;
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this.carryFlag = s.carryFlag;
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this.negativeFlag = s.negativeFlag;
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this.zeroFlag = s.zeroFlag;
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@ -1370,7 +1384,7 @@ public class Cpu implements InstructionTable {
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this.breakFlag = s.breakFlag;
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this.overflowFlag = s.overflowFlag;
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this.stepCounter = s.stepCounter;
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}
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}
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/**
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* Returns a string formatted for the trace log.
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@ -119,20 +119,36 @@ public class BusTest extends TestCase {
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assertTrue("Address space should have been complete!", b.isComplete());
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}
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public void testSetAndClearInterrupt() throws Exception {
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public void testSetAndClearIrq() throws Exception {
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Bus b = new Bus(0x0000, 0xffff);
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Cpu c = new Cpu();
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b.addCpu(c);
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assertFalse(c.getCpuState().interruptAsserted);
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assertFalse(c.getCpuState().irqAsserted);
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b.assertInterrupt();
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b.assertIrq();
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assertTrue(c.getCpuState().interruptAsserted);
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assertTrue(c.getCpuState().irqAsserted);
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b.clearInterrupt();
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b.clearIrq();
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assertFalse(c.getCpuState().interruptAsserted);
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assertFalse(c.getCpuState().irqAsserted);
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}
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public void testSetAndClearNmi() throws Exception {
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Bus b = new Bus(0x0000, 0xffff);
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Cpu c = new Cpu();
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b.addCpu(c);
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assertFalse(c.getCpuState().nmiAsserted);
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b.assertNmi();
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assertTrue(c.getCpuState().nmiAsserted);
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b.clearNmi();
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assertFalse(c.getCpuState().nmiAsserted);
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}
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}
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