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This is something of a "Work in Progress" checkpoint of several features that are all half baked: 1. Allow loading of 16KB ROM files at address $C000 at run-time, not just at startup. See the "Load ROM..." File menu item. 2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU implementation can match the behavior of either an early NMOS 6502, late NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so far. 3. Adds a completely bogus implementation of the 6522 VIA (it does absolutely nothing right now). 4. Changes the address of the ACIA in the simulated system to match a real hardware implementation I put together.
19 lines
386 B
Plaintext
19 lines
386 B
Plaintext
MEMORY {
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RAM1: start = $0000, size = $8000;
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ROM1: start = $C000, size = $3F00, fill = yes;
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MONITOR: start = $FF00, size = $FA, fill = yes;
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ROMV: start = $FFFA, size = $6, file = %O, fill = yes;
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}
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SEGMENTS {
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CODE: load = ROM1, type = ro;
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DATA: load = ROM1, type = ro;
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MONITOR: load = MONITOR, type = ro;
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VECTORS: load = ROMV, type = ro;
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}
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SYMBOLS {
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__STACKSIZE__ = $0300;
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}
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