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When describing the CPU's reset pin, the W65C02S data sheet says: > All Registers are initialized by software except the Decimal and Interrupt > disable mode select bits of the Processor Status Register (P) are initialized > by hardware. It then has a diagram of the power-on state of the processor status register: > 7 6 5 4 3 2 1 0 > * * 1 1 0 1 * * > N V - B D I Z C > > * = software initialized Confusingly the text indicates that only the D and I flags are initialised by hardware, while the diagram indicates that the B flag is initialised too. Meanwhile, https://www.nesdev.org/wiki/CPU_power_up_state says that the power-on state of the NES CPU is $34 (exactly matching the diagram above) but https://www.nesdev.org/wiki/Status_flags#The_B_flag says that the B flag does not physically exist within P register, it's only relevant in the copy of P that gets pushed to the stack by BRK (set), PHP (set), or an interrupt signal (cleared). As a result, the most sensible power-on state for the processor status register is with the "interrupt disable" flag set and everything else cleared. |
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| .. | ||
| Acia6850Test.java | ||
| AciaTest.java | ||
| BusTest.java | ||
| Cpu65C02AbsoluteModeTest.java | ||
| Cpu65C02AbsoluteXModeTest.java | ||
| Cpu65C02ImmediateModeTest.java | ||
| Cpu65C02ImpliedModeTest.java | ||
| Cpu65C02ZeroPageModeTest.java | ||
| Cpu65C02ZeroPageRelativeTest.java | ||
| Cpu65C02ZeroPageXModeTest.java | ||
| CpuAbsoluteModeTest.java | ||
| CpuAbsoluteXModeTest.java | ||
| CpuAbsoluteYModeTest.java | ||
| CpuAccumulatorModeTest.java | ||
| CpuImmediateModeTest.java | ||
| CpuImpliedModeTest.java | ||
| CpuIndexedIndirectModeTest.java | ||
| CpuIndirectIndexedModeTest.java | ||
| CpuIndirectModeTest.java | ||
| CpuIndirectXModeTest.java | ||
| CpuRelativeModeTest.java | ||
| CpuTest.java | ||
| CpuZeroPageIndirectTest.java | ||
| CpuZeroPageModeTest.java | ||
| CpuZeroPageXModeTest.java | ||
| CpuZeroPageYModeTest.java | ||
| CrtcTest.java | ||
| FifoRingBufferTest.java | ||
| MemoryRangeTest.java | ||
| TestAnsiControlSequenceParser.java | ||
| TestVt100TerminalModel.java | ||
| UtilsTest.java | ||