mirror of https://github.com/sethm/symon.git
134 lines
4.0 KiB
Java
134 lines
4.0 KiB
Java
/*
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* Copyright (c) 2008-2014 Seth J. Morabito <web@loomcom.com>
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* Maik Merten <maikmerten@googlemail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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package com.loomcom.symon.devices;
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import com.loomcom.symon.exceptions.MemoryAccessException;
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import com.loomcom.symon.exceptions.MemoryRangeException;
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/**
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* This is a simulation of the Motorola 6850 ACIA, with limited
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* functionality. Interrupts are not supported.
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* <p/>
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* Unlike a 16550 UART, the 6850 ACIA has only one-byte transmit and
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* receive buffers. It is the programmer's responsibility to check the
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* status (full or empty) for transmit and receive buffers before
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* writing / reading.
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*/
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public class Acia6850 extends Acia {
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public static final int ACIA_SIZE = 2;
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static final int STAT_REG = 0; // read-only
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static final int CTRL_REG = 0; // write-only
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static final int RX_REG = 1; // read-only
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static final int TX_REG = 1; // write-only
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/**
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* Registers. These are ignored in the current implementation.
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*/
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private int commandRegister;
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public Acia6850(int address) throws MemoryRangeException {
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super(address, ACIA_SIZE, "ACIA6850");
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setBaudRate(2400);
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}
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@Override
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public int read(int address) throws MemoryAccessException {
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switch (address) {
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case RX_REG:
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return rxRead();
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case STAT_REG:
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return statusReg();
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default:
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throw new MemoryAccessException("No register.");
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}
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}
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@Override
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public void write(int address, int data) throws MemoryAccessException {
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switch (address) {
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case TX_REG:
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txWrite(data);
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break;
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case CTRL_REG:
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setCommandRegister(data);
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break;
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default:
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throw new MemoryAccessException("No register.");
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}
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}
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private void setCommandRegister(int data) {
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commandRegister = data;
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// Bits 0 & 1 control the master reset
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if((commandRegister & 0x01) != 0 && (commandRegister & 0x02) != 0) {
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reset();
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}
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// Bit 7 controls receiver IRQ behavior
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receiveIrqEnabled = (commandRegister & 0x80) != 0;
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// Bits 5 & 6 controls transmit IRQ behavior
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transmitIrqEnabled = (commandRegister & 0x20) != 0 && (commandRegister & 0x40) == 0;
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}
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/**
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* @return The contents of the status register.
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*/
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@Override
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public int statusReg() {
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// TODO: Parity Error, Framing Error, DTR, DSR, and Interrupt flags.
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int stat = 0;
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if (rxFull && System.nanoTime() >= (lastRxRead + baudRateDelay)) {
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stat |= 0x01;
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}
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if (txEmpty && System.nanoTime() >= (lastTxWrite + baudRateDelay)) {
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stat |= 0x02;
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}
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if (overrun) {
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stat |= 0x20;
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}
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return stat;
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}
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private synchronized void reset() {
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overrun = false;
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rxFull = false;
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txEmpty = true;
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}
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}
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