mirror of
https://github.com/nArnoSNES/tcc-65816.git
synced 2024-06-06 18:29:27 +00:00
164 lines
3.1 KiB
NASM
164 lines
3.1 KiB
NASM
.include "hdr.asm"
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.accu 16
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.index 16
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.16bit
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.section ".text"
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main:
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; sub sp,#__main_locals
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tsa
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sec
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sbc #__main_locals
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tas
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; ld #8448,r0
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ldx #$2100
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; store r 0 fr 0xf2 fc 0x2
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; st16 r0, [sp,2]
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stx 2 + 1, s
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; ld #8482,r0
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ldx #$2122
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; store r 0 fr 0xf2 fc 0x0
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; st16 r0, [sp,0]
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stx 0 + 1, s
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; ld16 [sp,2],r0
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ldx 2 + 1, s
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; ld #128,r1
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ldy #$80
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; store r 1 fr 0x5100 fc 0x2
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; st8 r1, [r0,0]
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sep #$20
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sty 0,x
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rep #$20
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; ld16 [sp,0],r0
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ldx 0 + 1, s
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; ld #224,r1
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ldy #$e0
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; store r 1 fr 0x5100 fc 0x0
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; st8 r1, [r0,0]
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sep #$20
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sty 0,x
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rep #$20
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; ld16 [sp,0],r0
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ldx 0 + 1, s
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; ld #0,r1
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ldy #$0
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; store r 1 fr 0x5100 fc 0x0
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; st8 r1, [r0,0]
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sep #$20
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sty 0,x
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rep #$20
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; ld16 [sp,2],r0
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ldx 2 + 1, s
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; ld #15,r1
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ldy #$f
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; store r 1 fr 0x5100 fc 0x2
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; st8 r1, [r0,0]
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sep #$20
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sty 0,x
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rep #$20
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__local_1: ; at 718
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; ld [string + 0], r0
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ldx string
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; gtst inv 1 t 0 v 0 r 751
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; ld8 [r0,0],r1
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sep #$30
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ldy 0,x
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rep #$30
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; y to accu
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tya
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; gtst inv 1 t 0 v 243 r 836
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; cmp op 0x95 inv 1
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; compare
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cmp #0
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beq __local_0
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; ld [out + 0], r0
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ldx out
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; ld [string + 0], r1
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ldy string
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; store r 0 fr 0x1f2 fc 0xfffffffe
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; st16 r0, [sp,2]
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stx 2 + 1, s
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; mov r1, r0
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tyx
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; store r 0 fr 0x1f2 fc 0xfffffffc
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; st16 r0, [sp,4]
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stx 4 + 1, s
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; ld #1,r0
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ldx #$1
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; add r0, r1
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clc
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tya
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phx
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adc 1,s
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tay
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pla
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; store r 1 fr 0x3f0 fc 0x0
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; ld #string, r2
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ldS #string
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; st16 r1, [r2,0]
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sty 0,S
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; ld16 [sp,4],r0
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ldx 4 + 1, s
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; ld8 [r0,0],r1
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sep #$30
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ldy 0,x
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rep #$30
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; ld16 [sp,2],r0
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ldx 2 + 1, s
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; store r 1 fr 0x100 fc 0xfffffffe
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; st8 r1, [r0,0]
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sep #$20
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sty 0,x
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rep #$20
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; gjmp_addr 718 at 1448
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jmp __local_1
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; gsym_addr t 1448 a 718
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__local_0: ; at 1511
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; gsym_addr t 836 a 1511
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; gsym_addr t 0 a 718
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; ld [d + 10], r0
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ldx d + 10
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; gjmp_addr 0 at 1587
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jmp __local_2
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; gsym_addr t 1587 a 0
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__local_2: ; at 1646
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; gsym_addr t 1587 a 1646
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; add sp, #__main_locals
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tsa
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clc
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adc #__main_locals
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tas
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rts
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.define __main_locals 8
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.ends
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.ramsection "ram.data" bank 0 slot 1
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ramsection.data dsb 0
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string dsb 18
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out dsb 2
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a dsb 100
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b dsb 100
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.ends
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.section ".data"
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startsection.data:
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.dw ramsection.data + $2
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.db $68,$65,$6c,$6c,$6f,$2c,$20,$77,$6f,$72,$6c,$64,$21,$a,$0,$0
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.dw $fffe
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.dw $1
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.db $2,$0,$3,$0,$4,$0,$5,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0
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.dw $6
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.db $7,$0,$8,$0,$9,$0,$a,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0
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endsection.data:
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.ends
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.ramsection ".bss" bank 0 slot 1
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d dsb 100
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.ends
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.section ".rotzdata"
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startsection.rotzdata:
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c: .dw $41
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.db $42,$0,$43,$0,$e,$0,$f,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0,$0
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endsection.rotzdata:
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.ends
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